Commit Graph

74186 Commits

Author SHA1 Message Date
Jordan Justen 4810d02112 nir: Don't set dest in SSBO store glsl_to_nir conversion
This matches the function signature created in
lower_ubo_reference_visitor::ssbo_store which has a void return.

Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-09-29 17:17:20 -07:00
Kenneth Graunke 476e6d732f nir: Use a system value for gl_PrimitiveIDIn.
At least on Intel hardware, gl_PrimitiveIDIn comes in as a special part
of the payload rather than a normal input.  This is typically what we
use system values for.  Dave and Ilia also agree that a system value
would be nicer.

At some point, we should change it at the GLSL IR level as well.  But
that requires changing most of the drivers.  For now, let's at least
make NIR do the right thing, which is easy.

v2: Add a comment about not creating a temporary (suggested by Iago).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-09-29 14:19:32 -07:00
Brian Paul cb758b892a st/mesa: try PIPE_BIND_RENDER_TARGET when choosing float texture formats
For 8-bit RGB(A) texture formats we set the PIPE_BIND_RENDER_TARGET flag
to try to get a hardware format which also supports rendering (for FBO
textures).  Do the same thing for floating point formats.

This allows the Redway3D Flat demo to run.

Cc: 10.6 11.0 <mesa-stable@lists.freedesktop.org>

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-09-29 11:52:22 -06:00
Brian Paul daf23bd4cb st/mesa: add some debugging code in st_ChooseTextureFormat()
I've temporarily added code like this many times.  Wrap it in a
conditional that can be enabled when needed.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-09-29 11:52:03 -06:00
Brian Paul 7147f7098e mesa: clean up #includes in shaderapi.c
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-09-29 11:51:56 -06:00
Brian Paul b24c6d3fef mesa: clean up the #includes in shader_query.cpp
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-09-29 11:51:51 -06:00
Brian Paul 3bbff1e26e mesa: remove an extern "C" wrapper in shader_query.cpp
The shaderapi.h header already has the extern "C" wrapper.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-09-29 11:51:38 -06:00
Jordan Justen 681b4badae i965/cs: Generate code to load gl_NumWorkGroups
This code also sets cs_prog_data->uses_num_work_groups which is later
used by state setup to indicate that the gl_NumWorkGroups surface
needs to be setup.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jordan Justen 4c6ddd3397 nir: Convert SYSTEM_VALUE_NUM_WORK_GROUPS to a nir intrinsic
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jordan Justen f6ae914069 glsl/cs: Add gl_NumWorkGroups as a system value
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jordan Justen 63d7b33f51 i965/cs: Setup surface binding for gl_NumWorkGroups
This will only be setup when the prog_data uses_num_work_groups
boolean is set.

At this point nothing will set uses_num_work_groups, but soon code
will set it when emitting code for the intrinsic that loads
gl_NumWorkGroups.

We can't emit this surface information earlier at the start of the
DispatchCompute* call because we may not have generated the program
yet. Until we generate the program, we don't know if the
gl_NumWorkGroups variable is accessed.

We also can't emit the surface as part of the brw_cs_state atom,
because we might not need the surface if gl_NumWorkGroups is not used
by the program.

Lastly, we cannot emit the surface later (after state upload) in the
DispatchCompute* call, because it needs to be run before the
brw_cs_state atom is emitted, since it changes the surface state.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jordan Justen d1be9d2126 i965/cs: Add a binding table entry for gl_NumWorkGroups
If glDispatchComputeIndirect is used, then the value for this variable
must be read from the indirect BO.

To allow the same generated code to support indirect and
glDispatchCompute, we will also setup a BO for the number of work
groups using the intel_upload_data mechanism. This will only be
required if the gl_NumWorkGroups variable is accessed.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jordan Justen d57a85f32b i965/cs: Store compute invocation information in brw context
We will need this in an atom to setup a surface to read the
gl_NumWorkGroups values from.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jordan Justen 60cf84dea7 i965/cs: Re-emit cs_state when surfaces have changed
Unlike rendering (BINDING_TABLE_POINTERS_*S), compute doesn't have a
binding table pointers command. Instead it is part of the
MEDIA_INTERFACE_DESCRIPTOR structure loaded by the brw_cs_state atom.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jordan Justen 2ec5f3e1d5 i965/cs: Re-emit push constants and cs_state on new batches
We need to re-emit push constansts when a new batch is started since
the push constants are stored in the batch. We also need to re-emit
the MEDIA_INTERFACE_DESCRIPTOR (in brw_cs_state) since it is stored in
the batch.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jordan Justen 1665d29ee3 mesa/cs: Add MESA_VERBOSE=api support in DispatchCompute*
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jose Fonseca 952366a60e util: Fix strndup prototype on C++.
Trivial.
2015-09-29 16:01:56 +01:00
Tapani Pälli c0722be9f5 mesa: fix ARRAY_SIZE query for GetProgramResourceiv
Patch also refactors name length queries which were using array size
in computation, this has to be done in same time to avoid regression in
arb_program_interface_query-resource-query Piglit test.

Fixes rest of the failures with
   ES31-CTS.program_interface_query.no-locations

v2: make additional check only for GS inputs
v3: create helper function for resource name length
    so that it gets calculated only in one place

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-09-29 12:46:28 +03:00
Iago Toral Quiroga 12d510ab74 glsl: Fix forward NULL dereference coverity warning
The comment says that it should be impossible for decl_type to be NULL
here, so don't try to handle the case where it is, simply add an assert.

>>>     CID 1324977:  Null pointer dereferences  (FORWARD_NULL)
>>>     Comparing "decl_type" to null implies that "decl_type" might be null.

No piglit regressions observed.

Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-09-29 10:53:08 +02:00
Iago Toral Quiroga 1dc2db7a4d glsl: Fix null return coverity warning
Add an assert on the result of as_dereference() not being NULL:

>>>     CID 1324978:  Null pointer dereferences  (NULL_RETURNS)
>>>     Dereferencing a null pointer "deref_record->record->as_dereference()".

Since we are introducing a new variable to hold the result of
as_dereference(), take the opportunity to rename deref_record_type to
interface_type and just name the new variable interface_deref, which is
less confusing.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 10:53:08 +02:00
Iago Toral Quiroga 6bf718fec2 glsl: Fix unused value warning reported by Coverity
We don't use param in this part of the code, so no point in advancing
the pointer forward:

>>>     CID 1324983:  Code maintainability issues  (UNUSED_VALUE)
>>>     Assigning value from "param->get_next()" to "param" here, but that stored value is overwritten before it can be used.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 10:53:08 +02:00
Samuel Iglesias Gonsalvez bea66d22f2 util: implement strndup for WIN32
v2:
- Add strndup.h to Makefile.sources (Emil)
- Use calloc instead of malloc (Emil).
- Check if allocation fails (Emil, Jose)
- Add '#pragma once' and include stdlib.h to strndup.h (Jose)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92124
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-09-29 10:03:47 +02:00
Samuel Iglesias Gonsalvez 7efb235019 glsl: use correct number of uniform blocks in error message
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-09-29 10:03:47 +02:00
Samuel Iglesias Gonsalvez 6668eb5a45 mesa: rename gl_shader_program's NumUniformBlocks to NumBufferInterfaceBlocks
Because it counts shader storage blocks too.

v2:
- Use NumBufferInterfaceBlocks instead (Jordan).

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 10:03:47 +02:00
Samuel Iglesias Gonsalvez 38004eb17c main: fix ACTIVE_UNIFORM_BLOCKS value
NumUniformBlocks also counts shader storage blocks.
NumUniformBlocks variable will be renamed in a later patch to avoid
misunderstandings.

v2:

- Modify the condition to use !IsShaderStorage and the list of
  uniform blocks (Timothy)

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-09-29 10:03:47 +02:00
Jason Ekstrand 337caee910 anv/wsi_x11: Properly report BadDrawable errors to the client 2015-09-28 20:18:41 -07:00
Emil Velikov 589249a792 docs: add news item and link release notes for 11.0.2
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-29 00:22:32 +01:00
Emil Velikov dda02d202e docs: add sha256 checksums for 11.0.2
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 4c0b48461269d3ede0c5446d86ebe3e81f16788e)
2015-09-29 00:21:14 +01:00
Emil Velikov 58e02b2a4e docs: add release notes for 11.0.2
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 51e0b06d9916e126060c0d218de1aaa4e5a4ce26)
2015-09-29 00:21:12 +01:00
Jason Ekstrand f06bc45b0c anv/batch_chain: Use the surface state pool for binding tables 2015-09-28 16:01:14 -07:00
Jason Ekstrand d93f6385a7 anv/batch_chain: Add helpers for fixing up block_pool relocations 2015-09-28 16:01:14 -07:00
Jason Ekstrand 8c00f9ab56 anv/gen8: Do a render cache flush prior to changing state base address 2015-09-28 16:01:14 -07:00
Jason Ekstrand 0e94446b25 anv/device: Use a 4K block size for surface state blocks
We want to start using the surface state block pool for binding tables and
binding tables.  In order to do this, we need to be able to set surface
state base address to the address of a block and surface state base address
has a 4K alignment requriement.
2015-09-28 16:01:01 -07:00
Jason Ekstrand 737e89bc8d anv/meta: Use the dynamic state stream for temporary buffers 2015-09-28 16:01:01 -07:00
Jason Ekstrand 219a1929f7 anv/util: Add helpers for getting the first and last elements of a vector 2015-09-28 16:01:01 -07:00
Jason Ekstrand 95487668df anv/batch_chain: Add a _alloc_binding_table function 2015-09-28 16:01:01 -07:00
Jason Ekstrand d517de6126 anv: Make anv_state.offset an int32_t
Binding tables will have a negative offset and we need a way to express
that.  Besides, the chances of a state offset being larger than 2 GB is so
remote it's not worth thinking about.
2015-09-28 16:01:01 -07:00
Jason Ekstrand 9ac3dde3a0 anv/wsi_wayland: Fix FIFO mode
Previously, there were a number of things we were doing wrong:

 1) We weren't flushing the wl_display so dead-looping clients weren't
    guaranteed to work.
 2) We were sending the frame event after calling wl_surface.commit() so it
    wasn't getting assigned to the correct frame
 3) We weren't actually setting fifo_ready to false.

Unfortunately, we never noticed because (3) was hiding the other two.  This
commit fixes all three and clients that use FIFO mode are now properly
refresh-rate limited.
2015-09-28 15:58:34 -07:00
Anuj Phogat 945592f92c i965/gen9: Add a condition for starting pixel in fast copy blit
This condition restricts the use of fast copy blit to cases
where starting pixel of src and dst is oword (16 byte) aligned.

Many piglit tests (if using fast copy blit in Mesa) failed earlier
because I missed adding this condition.Fast copy blit is currently
enabled for use only with Yf/Ys tiling.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 15:00:53 -07:00
Ilia Mirkin 1d8cba9b51 nouveau: wait to unref the transfer's bo until it's no longer used
The bo will often come from a slab in which case it doesn't matter. But
for larger allocations this will be in its own bo, and we have to make
sure to wait until it's no longer used in order for it to be freed.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Marcin Ślusarz <marcin.slusarz@gmail.com>
2015-09-28 17:28:54 -04:00
Ilia Mirkin 3a6b9a7830 nouveau: delay deleting buffer with unflushed fence
If there is an unflushed fence on the bo, then the resource may still be
used in commands built up in the local pushbuf. Flushing can cause all
sorts of unwanted effects, so just free the bo when the relevant fence
is hit.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Marcin Ślusarz <marcin.slusarz@gmail.com>
2015-09-28 17:28:54 -04:00
Ilia Mirkin d4e650b07b nouveau: be more careful about freeing temporary transfer buffers
Deleting a buffer does not flush the command stream. Make sure that we
wait for the copies to finish before deleting the temporary bo.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Marcin Ślusarz <marcin.slusarz@gmail.com>
2015-09-28 17:28:54 -04:00
Anuj Phogat 4c5308bbf4 i965: Rename intel_miptree_get_dimensions_for_image()
This function isn't specific to miptrees. So, drop the "miptree"
from function name.

V3: Add a comment explaining how the 1D Array texture height and
    depth is interpreted by Intel hardware.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 12:43:43 -07:00
Anuj Phogat 0bfd914f9f i965/gen9: Fix {src, dst}_pitch alignment check for XY_FAST_COPY_BLT
I misinterpreted the alignmnet restriction in XY_FAST_COPY_BLT earlier.
Instead of checking pitch for 64KB alignmnet we need to check it for
tile widh alignment.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 12:43:43 -07:00
Anuj Phogat 0fa39bff19 i965: Fix {src, dst}_pitch alignment check for XY_SRC_COPY_BLT
Current code checks the alignment restrictions only for Y tiling.
From Broadwell PRM vol 10:

 "pitch is of 512Byte granularity for Tile-X: This means the tiled-x
  surface pitch can be (512, 1024, 1536, 2048...)/4 (in Dwords)."

This patch adds the restriction for X tiling as well.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 12:43:43 -07:00
Anuj Phogat e83b07aa7b i965: Move conversion of {src, dst}_pitch to dwords outside if/else
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 12:43:43 -07:00
Anuj Phogat 485285498f i965: Delete temporary variable 'src_pitch'
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 12:43:43 -07:00
Anuj Phogat bbbc9fd8e5 i965: Use helper function intel_get_tile_dims() in surface setup
It takes care of using the correct tile width if we later use other
tiling patterns for aux miptree.

V2: Remove the comment about using Yf for aux miptree.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 12:43:43 -07:00
Anuj Phogat 1dc41be9eb i965: Use intel_get_tile_dims() to get tile masks
This will require change in the parameters passed to
intel_miptree_get_tile_masks().

V2: Rearrange the order of parameters. (Ben)
    Change the name to intel_get_tile_masks(). (Topi)

V3: Use temporary variables in intel_get_tile_masks()
    for clarity. Fix mask_y computation.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 12:43:43 -07:00
Anuj Phogat 21fdc59d34 i965: Add a helper function intel_get_tile_dims()
V2:
- Do the tile width/height computations in the new helper
  function and use it later in intel_miptree_get_tile_masks().
- Change the name to intel_get_tile_dims().

V3: Return the tile_h in number of rows in place of bytes.
    Document the units of tile_w, tile_h parameters.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 12:43:43 -07:00