Commit Graph

103253 Commits

Author SHA1 Message Date
Alejandro Piñeiro 88d3325a44 nir_types: add glsl_atomic_uint_type() helper
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-07-03 12:41:46 +02:00
Alejandro Piñeiro c6230b9358 spirv/nir: add offset at vtn_variable
Also initialize it on var_decoration_cb

This is equivalent to nir_variable.offset, used to store the location
an atomic counter is stored at.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-07-03 12:37:32 +02:00
Alejandro Piñeiro 768c275deb spirv/nir: SpvStorageClassAtomicCounter support on vtn_storage_class_to_mode
Atomic Counters are uniforms per spec.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-07-03 12:37:32 +02:00
Alejandro Piñeiro a9e6298727 nir/linker: handle uniforms without explicit location
ARB_gl_spirv points that uniforms in general need explicit
location. But there are still some cases of uniforms without location,
like for example uniform atomic counters. Those doesn't have a
location from the OpenGL point of view (they are identified with a
binding and offset), but Mesa internally assigns it a location.

Signed-off-by: Eduardo Lima <elima@igalia.com>
Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Neil Roberts <nroberts@igalia.com>

v2: squash with another patch, minor variable name tweak (Timothy
Arceri)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-07-03 12:37:32 +02:00
Alejandro Piñeiro b0712df6cf compiler/glsl: refactor empty_uniform_block utilities to linker_util
This includes:
  * Move the defition of empty_uniform_block to linker_util.h
  * Move find_empty_block (with a rename) to linker_util.h
  * Refactor some code at linker.cpp to a new method at linker_util.h
    (link_util_update_empty_uniform_locations)

So all that code could be used by the GLSL linker and the NIR linker
used for ARB_gl_spirv.

v2: include just "ir_uniform.h" (Timothy Arceri)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-07-03 12:37:32 +02:00
Ian Romanick 995d993710 i965/vec4: Don't cmod propagate from CMP to ADD if the writemask isn't compatible
Otherwise we can incorrectly cmod propagate in situations like

    add(8)          g10<1>.xD       g2<0>.xD        -16D
    ...
    cmp.ge.f0(8)    null<1>D        g2<0>.xD        16D
    ...
    (+f0) sel(8)    g21<1>.xyUD     g14<4>.xyyyUD   g18<4>.xyyyUD

Sadly, this change hurts quite a few shaders.

v2: Refactor writemask compatibility check into a separate function.
Suggested by Caio.

Ivy Bridge and Haswell had similar results. (Haswell shown)
total instructions in shared programs: 12968489 -> 12968738 (<.01%)
instructions in affected programs: 60679 -> 60928 (0.41%)
helped: 0
HURT: 249
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.22% max: 0.81% x̄: 0.46% x̃: 0.44%
95% mean confidence interval for instructions value: 1.00 1.00
95% mean confidence interval for instructions %-change: 0.44% 0.48%
Instructions are HURT.

total cycles in shared programs: 409171965 -> 409172317 (<.01%)
cycles in affected programs: 260056 -> 260408 (0.14%)
helped: 0
HURT: 176
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 0.04% max: 0.34% x̄: 0.17% x̃: 0.17%
95% mean confidence interval for cycles value: 2.00 2.00
95% mean confidence interval for cycles %-change: 0.16% 0.18%
Cycles are HURT.

Sandy Bridge
total instructions in shared programs: 10423577 -> 10423753 (<.01%)
instructions in affected programs: 40667 -> 40843 (0.43%)
helped: 0
HURT: 176
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.29% max: 0.79% x̄: 0.48% x̃: 0.42%
95% mean confidence interval for instructions value: 1.00 1.00
95% mean confidence interval for instructions %-change: 0.46% 0.51%
Instructions are HURT.

total cycles in shared programs: 146097503 -> 146097855 (<.01%)
cycles in affected programs: 503990 -> 504342 (0.07%)
helped: 0
HURT: 176
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 0.02% max: 0.36% x̄: 0.12% x̃: 0.11%
95% mean confidence interval for cycles value: 2.00 2.00
95% mean confidence interval for cycles %-change: 0.11% 0.13%
Cycles are HURT.

No changes on any other platforms.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Fixes: cd635d149b i965/vec4: Propagate conditional modifiers from compares to adds
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2018-07-02 19:19:16 -07:00
Ian Romanick fb6dc8e894 intel/compiler: Silence unused parameter warnings brw_nir.c
src/intel/compiler/brw_nir.c: In function ‘brw_nir_lower_vue_outputs’:
src/intel/compiler/brw_nir.c:464:32: warning: unused parameter ‘is_scalar’ [-Wunused-parameter]
                           bool is_scalar)
                                ^~~~~~~~~
src/intel/compiler/brw_nir.c: In function ‘lower_bit_size_callback’:
src/intel/compiler/brw_nir.c:610:57: warning: unused parameter ‘data’ [-Wunused-parameter]
 lower_bit_size_callback(const nir_alu_instr *alu, void *data)
                                                         ^~~~

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2018-07-02 16:17:19 -07:00
Kenneth Graunke 8e38947f6c i965: Fix BRW_NEW_NUM_SAMPLES to be in .brw, not .mesa
This is the wrong kind of dirty bit.  Caught by GCC warnings, due to
64-bit values being truncated to 32 bits.

Fixes: b95b0e2918 (intel/anv,blorp,i965: Implement the SKL 16x MSAA SIMD32 workaround)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-07-02 15:30:21 -07:00
Jason Ekstrand afa8f58921 anv: Add support for the on-disk shader cache
The Vulkan API provides a mechanism for applications to cache their own
shaders and manage on-disk pipeline caching themselves.  Generally, this
is what I would recommend to application developers and I've resisted
implementing driver-side transparent caching in the Vulkan driver for a
long time.  However, not all applications do this and, for some
use-cases, it's just not practical.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-07-02 14:52:05 -07:00
Jason Ekstrand e0f7a3aa5b anv/pipeline_cache: Add a _locked suffix to a function
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-07-02 13:07:06 -07:00
Jason Ekstrand f5c38f4a30 anv: Add device-level helpers for searching for and uploading kernels
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-07-02 13:07:06 -07:00
Jason Ekstrand eae192bf5f anv/pipeline: Stop optimizing for not having a cache
Before, we were only hashing the shader if we had a shader cache to
cache things in.  This means that if we ever get it wrong, we could end
up trying to cache a shader with an undefined hash.  Since not having a
shader cache is an extremely uncommon case, let's optimize for code
clarity and obvious correctness over avoiding a hash operation.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-07-02 13:07:06 -07:00
Jason Ekstrand 76fdc8a85c anv: Use a default pipeline cache if none is specified
If a client is dumb enough to not specify a pipeline cache, give it a
default.  We have to create one anyway for blorp so we may as well let
the client cache shaders in it.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-07-02 13:07:06 -07:00
Jason Ekstrand d1c778b362 anv: Be more careful about hashing pipeline layouts
Previously, we just hashed the entire descriptor set layout verbatim.
This meant that a bunch of extra stuff such as pointers and reference
counts made its way into the cache.  It also meant that we weren't
properly hashing in the Y'CbCr conversion information information from
bound immutable samplers.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-07-02 13:07:06 -07:00
Jason Ekstrand 06412bfc98 anv,intel: Enable nir_opt_large_constants for Vulkan
According to RenderDoc, this shaves 99.6% of the run time off of the
ambient occlusion pass in Skyrim Special Edition when running under DXVK
and shaves 92% off the runtime for a reasonably representative frame.
When running the actual game, Skyrim goes from being a slide-show to a
very stable and playable framerate on my SKL GT4e machine.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-07-02 12:09:50 -07:00
Jason Ekstrand 70ce880434 anv: Add state setup support for shader constants
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-07-02 12:09:49 -07:00
Jason Ekstrand 3a5ed18c51 anv: Add support for shader constant data to the pipeline cache
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-07-02 12:09:47 -07:00
Jason Ekstrand 1235850522 nir: Add a large constants optimization pass
This pass searches for reasonably large local variables which can be
statically proven to be constant and moves them into shader constant
data.  This is especially useful when large tables are baked into the
shader source code because they can be moved into a UBO by the driver to
reduce register pressure and make indirect access cheaper.

v2 (Jason Ekstrand):
 - Use a size/align function to ensure we get the right alignments
 - Use the newly added deref offset helpers

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-07-02 12:09:45 -07:00
Jason Ekstrand c90f221e0a nir: Add a concept of constant data associated with a shader
This commit adds a concept to NIR of having a blob of constant data
associated with a shader.  Instead of being a UBO or uniform that can be
manipulated by the client, this constant data considered part of the
shader and remains constant across all invocations of the given shader
until the end of time.  To access this constant data from the shader, we
add a new load_constant intrinsic.  The intention is that drivers will
eventually lower load_constant intrinsics to load_ubo, load_uniform, or
something similar.  Constant data will be used by the optimization pass
in the next commit but this concept may also be useful for OpenCL.

v2 (Jason Ekstrand):
 - Rename num_constants to constant_data_size (anholt)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-07-02 12:09:42 -07:00
Jason Ekstrand e8e159e9df nir/deref: Add helpers for getting offsets
These are very similar to the related function in nir_lower_io except
that they don't handle per-vertex or packed things (that could be added,
in theory) and they take a more detailed size/align function pointer.
One day, we should consider switching nir_lower_io over to using the
more detailed size/align functions and then we could make it use these
helpers instead of having its own.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-07-02 12:09:41 -07:00
Jason Ekstrand 2bf8be99b0 nir/types: Add a natural size and alignment helper
The size and alignment are "natural" in the sense that everything is
aligned to a scalar.  This is a bit tighter than std430 where vec3s are
required to be aligned to a vec4.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-07-02 12:09:39 -07:00
Jason Ekstrand 893fc2d07d nir: Add a deref_instr_has_indirect helper
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-07-02 12:09:37 -07:00
Jason Ekstrand 70b16963fc util/macros: Import ALIGN_POT from ralloc.c
v2 (Jason Ekstrand):
 - Rename y to pot_align (Brian)
 - Also use ALIGN_POT in build_id.c and slab.c (Brian)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-07-02 12:09:14 -07:00
Eric Anholt 4819da2301 v3d: Claim PIPE_CAP_TGSI_CAN_READ_OUTPUTS.
Fixes warning at screen creation.  We store our outputs in normal temps
and just emit them to shader I/O at the end, due to our I/O ordering
requirements, so reading "outputs" in NIR is fine.
2018-07-02 11:35:41 -07:00
Marek Olšák 32e413ca59 ac: move all LLVM module initialization into ac_create_module
This removes some ugly code around module initialization.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-07-02 14:34:39 -04:00
Eric Anholt 49f7631c9f v3d: Emit a TF flush after each draw using TF.
This fixes GPU hangs on 7278 in transform feedback tests such as
GTF-GLES3.gtf.GL3Tests.transform_feedback2.transform_feedback2_basic
2018-07-02 10:05:14 -07:00
Karol Herbst c7726fbfa5 nv50/ir: handle clipvertex for geom and tess shaders as well
this will be needed for compatibility profiles

v2: handle tess shaders

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
2018-07-02 16:21:31 +02:00
Erik Faye-Lund 4c87705705 gallium/u_vbuf: drop min/max-scanning for empty indirect draws
When building with asserts enabled, we'll end up triggering an assert
in pipe_buffer_map_range down this code-path, due to trying to map
an empty range. Even if we avoid that, we'll trigger another assert
a bit later, because u_vbuf_get_minmax_index returns a min-index of
-1 here, which gets promoted to an unsigned value, and gives us an
out-of-bounds buffer-mapping offset.

Since we can't really have a well-defined min/max range here when
the range is empty anyway, we should just drop this dance in the
first place. After all, no rendering is going to be produced.

This fixes a crash in dEQP-GLES31.functional.draw_indirect.random.0
on VirGL for me.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-07-02 10:51:29 +02:00
Samuel Pitoiset 02db2363f0 radv: reset the image's predicate after a color decompression pass
After performing a fast-clear eliminate, a FMASK decompress,
or a DCC decompress, we can reset the predicate to FALSE.

With that, the GPU should be able to skip unnecessary color
decompression passes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-07-02 10:43:33 +02:00
Samuel Pitoiset ff7daadca1 radv: enable/disable predication for the DCC decompression pass
Performing a DCC decompression pass is currently pretty rare,
but using predication allows the GPU to skip unnecessary passes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-07-02 10:43:17 +02:00
Samuel Pitoiset 939e5a3823 radv: add padding for the UMR disassembler
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-02 10:42:17 +02:00
Gert Wollny 91f48cdfe5 virgl: Add support for glGetMultisample
Use caps to obtain the multisample sample positions for up to 16
positions and implement the according Gallium interface.

This implemenation (plus its counterpart in virglrenderer) assume that
the fixed sample position are always the same for a given number of samples
over the whole live time of a qemu session. It also assumes that sample
series are only given for 2, 4, 8, and 16 samples, and for intermediate
numbers N of samples the next higher supported set from above list is picked
and the sample positions for the first N samples are returned accordingly.

Fixes (when run on GL host):
    dEQP-GLES31.functional.texture.multisample.samples_1.sample_position
    dEQP-GLES31.functional.texture.multisample.samples_2.sample_position
    dEQP-GLES31.functional.texture.multisample.samples_3.sample_position
    dEQP-GLES31.functional.texture.multisample.samples_4.sample_position
    dEQP-GLES31.functional.texture.multisample.samples_8.sample_position
    dEQP-GLES31.functional.texture.multisample.samples_10.sample_position
    dEQP-GLES31.functional.texture.multisample.samples_12.sample_position
    dEQP-GLES31.functional.texture.multisample.samples_13.sample_position
    dEQP-GLES31.functional.texture.multisample.samples_16.sample_position

v2: remove unrelated chunk (thanks Ilia Mirkin)
v3: - also return positions for intermediate sample counts
    - fix unused varible warning
    - update description
v4: explain better what this patch assumes and how it handles sample numbers
    that are not directly advertised (thanks go to Erik Faye-Lund for making
    me aware that this should be documented)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
2018-07-02 09:33:55 +02:00
Tomeu Vizoso ba78e78cd5 st/mesa: Also check for PIPE_FORMAT_A8R8G8B8_SRGB for texture_sRGB
and PIPE_FORMAT_R8G8B8A8_SRGB, as well.

The reason for this is that when Virgl runs with GLES on the host, it
cannot directly upload textures in BGRA.

So to avoid a conversion step, consider the RGB sRGB formats as well for
this extension.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-07-02 09:33:48 +02:00
Tomeu Vizoso 71867a0a61 st/mesa: Fall back to R8G8B8A8_SRGB for ETC2
If the driver doesn't support PIPE_FORMAT_B8G8R8A8_SRGB, fall back to
PIPE_FORMAT_R8G8B8A8_SRGB.

Drivers such as Virgl will have a hard time supporting
PIPE_FORMAT_B8G8R8A8_SRGB when the host runs GLES, as GL_BGRA isn't as
well suported there.

So go with PIPE_FORMAT_R8G8B8A8_SRGB so these drivers can avoid a
conversion copy.

v2: Fix typo in commit message

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-07-02 09:33:41 +02:00
Tomeu Vizoso e5604ef78b st/mesa/i965: Allow decompressing ETC2 to GL_RGBA
When Mesa itself implements ETC2 decompression, it currently
decompresses to formats in the GL_BGRA component order.

That can be problematic for drivers which cannot upload the texture data
as GL_BGRA, such as Virgl when it's backed by GLES on the host.

So this commit adds a flag to _mesa_unpack_etc2_format so callers can
specify the optimal component order.

In Gallium's case, it will be requested if the format isn't in
PIPE_FORMAT_B8G8R8A8_SRGB format.

For i965, it will remain GL_BGRA, as before.

v2: * Remove unnecesary include (Emil Velikov)

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-07-02 09:33:33 +02:00
Iago Toral Quiroga 1b54824687 anv/cmd_buffer: make descriptors dirty when emitting base state address
Every time we emit a new state base address we will need to re-emit our
binding tables, since they might have been emitted with a different base
state adress.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
CC: <mesa-stable@lists.freedesktop.org>
2018-07-02 08:31:20 +02:00
Iago Toral Quiroga 6a1d8350c9 anv/cmd_buffer: clean dirty push constants flag after emitting push constants
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
CC: <mesa-stable@lists.freedesktop.org>
2018-07-02 08:31:02 +02:00
Iago Toral Quiroga 198a72220b anv/cmd_buffer: never shrink the push constant buffer size
If we have to re-emit push constant data, we need to re-emit all
of it.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
CC: <mesa-stable@lists.freedesktop.org>
2018-07-02 08:30:40 +02:00
Denis Pauk 2854c0f795 gallium/llvmpipe: Enable support bptc format.
v2: none
v3: none

Signed-off-by: Denis Pauk <pauk.denis@gmail.com>
CC: Marek Olšák <maraeo@gmail.com>
CC: Rhys Perry <pendingchaos02@gmail.com>
CC: Matt Turner <mattst88@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2018-07-01 15:42:37 -04:00
Denis Pauk 530130e74f gallium/softpipe: Enable support bptc format.
v2: none
v3: none

Signed-off-by: Denis Pauk <pauk.denis@gmail.com>
CC: Marek Olšák <maraeo@gmail.com>
CC: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2018-07-01 15:42:37 -04:00
Denis Pauk f69bc797e1 gallium/auxiliary: Add helper support for bptc format compress/decompress
Reuse code shared with mesa/main/texcompress_bptc.

v2: Use block decompress function
v3: Include static bptc code from texcompress_bptc_tmp.h
    Suggested-by: Marek Olšák <maraeo@gmail.com>

Signed-off-by: Denis Pauk <pauk.denis@gmail.com>
CC: Nicolai Hähnle <nicolai.haehnle@amd.com>
CC: Marek Olšák <maraeo@gmail.com>
CC: Gert Wollny <gw.fossdev@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2018-07-01 15:42:37 -04:00
Denis Pauk bf4871f9e8 mesa: add header for share bptc decompress functions
Move shared bptc functions to texcompress_bptc_tmp.h:
* fetch_rgba_unorm_from_block
* fetch_rgb_float_from_block
* compress_rgba_unorm
* compress_rgb_float

Create decompress functions:
* decompress_rgba_unorm
* decompress_rgb_float

Functions will be reused in gallium/auxiliary code.

v2: Add block decompress function
v3: Move all shared code to header
    Suggested-by: Marek Olšák <maraeo@gmail.com>

Signed-off-by: Denis Pauk <pauk.denis@gmail.com>
CC: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2018-07-01 15:42:36 -04:00
Marek Olšák 99c6cae227 glsl/cache: save and restore ExternalSamplersUsed
Shaders that need special code for external samplers were broken if
they were loaded from the cache.

Cc: 18.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-06-30 01:04:16 -04:00
Timothy Arceri 463f849097 nir: fix selection of loop terminator when two or more have the same limit
We need to add loop terminators to the list in the order we come
across them otherwise if two or more have the same exit condition
we will select that last one rather than the first one even though
its unreachable.

This fix is for simple unrolls where we only have a single exit
point. When unrolling these type of loops the unreachable
terminators and their unreachable branch are removed prior to
unrolling. Because of the logic change we also switch some
list access in the complex unrolling logic to avoid breakage.

Fixes: 6772a17acc ("nir: Add a loop analysis pass")

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-06-30 10:13:03 +10:00
Timothy Arceri 18293be622 radeonsi: enable OpenGL 4.4 compat profile
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-06-30 08:38:33 +10:00
Timothy Arceri ddb351f7fe mesa: enable ARB_vertex_attrib_64bit in compat profile
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-06-30 08:38:33 +10:00
Timothy Arceri c283b413c1 mesa: add outstanding ARB_vertex_attrib_64bit dlist support
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-06-30 08:38:33 +10:00
Dave Airlie 98d02104a7 vbo_save: add support for doubles to display list code
Required for ARB_vertex_attrib_64bit compat profile support.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-06-30 08:38:33 +10:00
Timothy Arceri d2caa37741 mesa: add compat profile support for ARB_multi_draw_indirect
v2: add missing ARB_base_instance support

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-06-30 08:38:33 +10:00
Timothy Arceri 103b8f11d6 mesa: make valid_draw_indirect_multi() accessible externally
We will use this to add compat support to ARB_multi_draw_indirect
in the following patch.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-06-30 08:38:33 +10:00