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anv: Use a default pipeline cache if none is specified 

If a client is dumb enough to not specify a pipeline cache, give it a
default.  We have to create one anyway for blorp so we may as well let
the client cache shaders in it.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
This commit is contained in:
Jason Ekstrand 2018-06-29 17:29:35 -07:00
parent d1c778b362
commit 76fdc8a85c
5 changed files with 25 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/intel/vulkan/anv_blorp.c
View File

@ -30,11 +30,11 @@ lookup_blorp_shader(struct blorp_context *blorp,
{
struct anv_device *device = blorp->driver_ctx;
/* The blorp cache must be a real cache */
assert(device->blorp_shader_cache.cache);
/* The default cache must be a real cache */
assert(device->default_pipeline_cache.cache);
struct anv_shader_bin *bin =
anv_pipeline_cache_search(&device->blorp_shader_cache, key, key_size);
anv_pipeline_cache_search(&device->default_pipeline_cache, key, key_size);
if (!bin)
return false;
@ -60,7 +60,7 @@ upload_blorp_shader(struct blorp_context *blorp,
struct anv_device *device = blorp->driver_ctx;
/* The blorp cache must be a real cache */
assert(device->blorp_shader_cache.cache);
assert(device->default_pipeline_cache.cache);
struct anv_pipeline_bind_map bind_map = {
.surface_count = 0,
@ -68,7 +68,7 @@ upload_blorp_shader(struct blorp_context *blorp,
};
struct anv_shader_bin *bin =
anv_pipeline_cache_upload_kernel(&device->blorp_shader_cache,
anv_pipeline_cache_upload_kernel(&device->default_pipeline_cache,
key, key_size, kernel, kernel_size,
NULL, 0,
prog_data, prog_data_size, &bind_map);
@ -90,7 +90,6 @@ upload_blorp_shader(struct blorp_context *blorp,
void
anv_device_init_blorp(struct anv_device *device)
{
anv_pipeline_cache_init(&device->blorp_shader_cache, device, true);
blorp_init(&device->blorp, device, &device->isl_dev);
device->blorp.compiler = device->instance->physicalDevice.compiler;
device->blorp.lookup_shader = lookup_blorp_shader;
@ -124,7 +123,6 @@ void
anv_device_finish_blorp(struct anv_device *device)
{
blorp_finish(&device->blorp);
anv_pipeline_cache_finish(&device->blorp_shader_cache);
}
static void

7
src/intel/vulkan/anv_device.c
View File

@ -604,6 +604,9 @@ VkResult anv_CreateInstance(
return vk_error(result);
}
instance->pipeline_cache_enabled =
env_var_as_boolean("ANV_ENABLE_PIPELINE_CACHE", true);
_mesa_locale_init();
VG(VALGRIND_CREATE_MEMPOOL(instance, 0, false));
@ -1728,6 +1731,8 @@ VkResult anv_CreateDevice(
if (result != VK_SUCCESS)
goto fail_workaround_bo;
anv_pipeline_cache_init(&device->default_pipeline_cache, device, true);
anv_device_init_blorp(device);
anv_device_init_border_colors(device);
@ -1779,6 +1784,8 @@ void anv_DestroyDevice(
anv_device_finish_blorp(device);
anv_pipeline_cache_finish(&device->default_pipeline_cache);
anv_queue_finish(&device->queue);
#ifdef HAVE_VALGRIND

12
src/intel/vulkan/anv_pipeline_cache.c
View File

@ -394,15 +394,6 @@ anv_pipeline_cache_load(struct anv_pipeline_cache *cache,
}
}
static bool
pipeline_cache_enabled()
{
static int enabled = -1;
if (enabled < 0)
enabled = env_var_as_boolean("ANV_ENABLE_PIPELINE_CACHE", true);
return enabled;
}
VkResult anv_CreatePipelineCache(
VkDevice _device,
const VkPipelineCacheCreateInfo* pCreateInfo,
@ -421,7 +412,8 @@ VkResult anv_CreatePipelineCache(
if (cache == NULL)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
anv_pipeline_cache_init(cache, device, pipeline_cache_enabled());
anv_pipeline_cache_init(cache, device,
device->instance->pipeline_cache_enabled);
if (pCreateInfo->initialDataSize > 0)
anv_pipeline_cache_load(cache,

4
src/intel/vulkan/anv_private.h
View File

@ -891,6 +891,8 @@ struct anv_instance {
int physicalDeviceCount;
struct anv_physical_device physicalDevice;
bool pipeline_cache_enabled;
struct vk_debug_report_instance debug_report_callbacks;
};
@ -972,7 +974,7 @@ struct anv_device {
struct anv_bo trivial_batch_bo;
struct anv_bo hiz_clear_bo;
struct anv_pipeline_cache blorp_shader_cache;
struct anv_pipeline_cache default_pipeline_cache;
struct blorp_context blorp;
struct anv_state border_colors;

8
src/intel/vulkan/genX_pipeline.c
View File

@ -1694,6 +1694,10 @@ genX(graphics_pipeline_create)(
assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO);
/* Use the default pipeline cache if none is specified */
if (cache == NULL && device->instance->pipeline_cache_enabled)
cache = &device->default_pipeline_cache;
pipeline = vk_alloc2(&device->alloc, pAllocator, sizeof(*pipeline), 8,
VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
if (pipeline == NULL)
@ -1778,6 +1782,10 @@ compute_pipeline_create(
assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO);
/* Use the default pipeline cache if none is specified */
if (cache == NULL && device->instance->pipeline_cache_enabled)
cache = &device->default_pipeline_cache;
pipeline = vk_alloc2(&device->alloc, pAllocator, sizeof(*pipeline), 8,
VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
if (pipeline == NULL)