Commit Graph

113959 Commits

Author SHA1 Message Date
Mark Janes d594d2a052 intel/tools: use device info initializer
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-08-01 16:39:54 -07:00
Mark Janes e4a0070db4 anv: use initialization routine for gen_device_info
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-08-01 16:39:51 -07:00
Mark Janes 49465f1330 iris/screen: use initialization routine for gen_device_info
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-08-01 16:39:48 -07:00
Mark Janes 96e1c945f2 i965: Move device info initialization to common code
With perf queries, initializing the device info is much more complex
than just getting a PCI ID and calling gen_get_device_info.  This commit
adds a new gen_get_device_info_from_fd helper in common code which does
all of the requisite kernel queries to get device info including all of
the topology information.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-08-01 16:39:44 -07:00
Mark Janes 1186f6ea69 i965/perf: verify kernel support before registering OA metrics
When gen_device_info updates the topology in it's initializer, the
kernel queries will fail silently.  Iris and anv have minimum
kernel requirements that support the queries.  i965 must verify kernel
support before reporting OA metrics.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-08-01 16:39:41 -07:00
Mark Janes 7852fe5415 intel/common: provide common ioctl routine
i965 links against libdrm for drmIoctl, but anv and iris both
re-implement this routine to avoid the dependency.

intel/dev also needs an ioctl wrapper, so lets share the same
implementation everywhere.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-08-01 16:38:40 -07:00
Alyssa Rosenzweig b40ba2db6c panfrost: Remove unused argument
A relic from when we didn't have an online compiler, hah.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig ff345d4a01 panfrost: Handle MESA_SHADER_COMPUTE in compile callback
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig 73c40d6bbb pan/midgard: Use standard list traversal to find initial tag
Fixes a hang (and abort) on empty shaders, which you shouldn't have
anyway but better safe than sorry. DCE going on the fritz is no reason
to freeze the system.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig 4647999327 panfrost: Use gl_shader_stage directly for compiles
No need to add a third set of enums to the mix.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig d9eb65c60c panfrost: Emit "draw" info for compute jobs
Important fields relating to shader state and UBOs are filled out from
this (misnomer) function.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig 22a8f6de61 panfrost: Feed compute shaders into the compiler
The path for compute shader compiles resembles the graphic shader
compile path, although it is substantially simpler as we don't need any
shader keying.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig 1b284628ef panfrost: Expose compute shaders as panfrost_shader_variants
Whether variants are packed by graphics or compute is irrelevant.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig 8b53230d47 panfrost: Remove shader state *base
It is now unused.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig c228046b4b panfrost: Remove CSO dependency from shader_compile
We want this routine to be generic across graphics and compute, so let
the caller deal with the typing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig 428bed3bde panfrost: Generalize UBO upload for other shader stages
Now that everything is unified, this generalization is nice and easy.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig a34370e855 panfrost: Guard vertex upload by ctx->vertex != NULL
This is irrelevant for graphics but matters for compute workloads.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig 3bfdb878aa panfrost: Generalize vertex shader upload
This allows us to reuse the same code path for compute.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig 3b7224190e panfrost: Share gl_enables between VERTEX/COMPUTE
Catch-all for magic bits.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig 871c02b12e panfrost: Invoke compute shader according to grid info
We already have helpers for packing invocations (due to its role in
instanced vertex shaders), so we can reuse this drop in for compute
shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig 748ccbc808 panfrost: Explain and include compute FBD
Squint at it hard enough and you realize it's the beginning of an
SFBD... I guess...

A compute shader with register spilling would be able to confirm this,
but we would expect to see the first field | 1 and an address splattered
later, setting up TLS.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig 3113be3127 panfrost: Unify-driven cleanup
Again, now that stages are unified some logic goes away.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig ac6aa93f9e panfrost: Unify ctx->vs and ctx->fs
It's a little verbose, but this way we can support other shader stages
without too much contortion.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:03 -07:00
Alyssa Rosenzweig 4b93152c29 panfrost: Flesh out launch_grid stub
It's still incomplette, but we're able to hook into launch_grid to
create a stub COMPUTE job.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:02 -07:00
Alyssa Rosenzweig cd1be4605c panfrost: Cleanup via payload unification
Since these are now indexable, quite a bit of code cleans up.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:02 -07:00
Alyssa Rosenzweig 0da52015a1 panfrost: Unify payload_vertex/payload_tiler
Rather than disparate variables, let's use an array of payloads indexed
by the shader stage.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:02 -07:00
Alyssa Rosenzweig 902115f94f panfrost: Only wallpaper if we drew something
last_tiler.gpu may be NULL at flush time despite no clear and existing
jobs -- if we executed a compute-only workload.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:02 -07:00
Alyssa Rosenzweig 2d86828243 panfrost: Adjust shader CAPs to expose dEQP compute
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:01 -07:00
Alyssa Rosenzweig 39fe9f5e2f panfrost: Expose NIR as our PIPE_SHADER_CAP_SUPPORTED_IRS
We *could* expose TGSI as well -- we pipe it through tgsi_to_nir for
Gallium-internal shaders anyway -- but we'd rather not.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:01 -07:00
Alyssa Rosenzweig 1697760e05 panfrost: Copy freedreno's panfrost_get_compute_param
Values reported here aren't remotely correct, but it's a start to just
get the entrypoint stubbed out.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:01 -07:00
Alyssa Rosenzweig c8bc664447 panfrost: Expose COMPUTE-related caps for GLES3.1
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:01 -07:00
Alyssa Rosenzweig 5a8b83ca0b panfrost: Stub out launch_grid
Just dumps some information about the invocation for later debug.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:01 -07:00
Alyssa Rosenzweig a8fc40aaf5 panfrost: Stub out compute CSO
Doesn't do anything, just gets the functions there.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:23:01 -07:00
Alyssa Rosenzweig e913986868 panfrost: Implement gl_FrontFacing
Interestingly, this requires no compiler changes. It's just exposed as a
special varying.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:15:03 -07:00
Alyssa Rosenzweig f3e15122d4 panfrost: Add support for decoding gl_FrontFacing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:15:03 -07:00
Alyssa Rosenzweig 9e66ff3ea9 pan/decode: Use max varying index as varying buffer count
This allows us to decode asymmetric varyings correctly, which occurs
with e.g. gl_FrontFacing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-01 16:15:03 -07:00
Timothy Arceri 2afedfaf9a iris: add support for gl_ClipVertex in tess eval shaders
Required for OpenGL compat support.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-08-01 16:12:37 -07:00
Timothy Arceri 00b5bf2d72 iris: add support for gl_ClipVertex in geometry shaders
This will enable us to support the OpenGL compat profile.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-08-01 16:12:27 -07:00
Jason Ekstrand 70dc017aec nir: Stop whacking gl_FrontFacing to a system value
We have a cap bit for gallium and a GLSL compiler flag to control this.
Just trust what GLSL gives us and stop forcing it.  In order for this to
be safe, we have to advertise another cap in some of the gallium
drivers.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-08-01 21:59:37 +00:00
Alyssa Rosenzweig 4e736b88f3 panfrost: Implement panfrost_set_shader_buffers callback
Just copy over the passed SSBO for now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-08-01 14:32:08 -07:00
Alyssa Rosenzweig 898a18ea89 gallium/util: Add util_set_shader_buffers_mask helper
Conceptually follows util_set_vertex_buffers_mask but for SSBOs.

v2: Fix missing ~ when clearing mask. Adjust mask behaviour to match
freedreno/v3d when buffer == NULL.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-08-01 14:31:56 -07:00
Jonathan Marek 3e33173200 kmsro: move entry points from etnaviv to kmsro
These drivers are kmsro drivers so they should be part of the kmsro #if

This fixes missing imx_drm driver when building with only freedreno+kmsro

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-08-01 16:31:51 -04:00
Emil Velikov 85dace1c0b gitlab-ci: remove software-properties-common
Currently we use the python package to manage repositories. At the same
time we also do that by hand - since it's a trivial echo to a file.

Stay consistent, remove the package and manage things manually.

Acked-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2019-08-01 16:16:15 +00:00
Brian Paul 3307c85a7d st/mesa: fix MSVC compile breakage
Trivial.
2019-08-01 09:07:21 -06:00
Gert Wollny 9de00e74fe virgl: Enable depth_clamp by lowering if the host is new enough.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-08-01 05:58:53 +00:00
Gert Wollny b2e92c45ce gallium: Make PIPE_CAP_DEPTH_CLIP_DISABLE a tri-state value and use it
Use value "2" to signal that lowering is needed and supported and enable
it accordingly.

v2: - Note in CAP description that this lowering currently requires TGSI
    - use "true" instead of GL_TRUE (both Erik)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-08-01 05:58:53 +00:00
Gert Wollny 616f320745 mesa/st: Signal state changes when depth_clamp is emulated
v1 implemented by Erik Faye-Lund <erik.faye-lund@collabora.com>
v2: - Add GS and TES
    - fix constants state update flags (Erik)
v3: don't update rasterizer when depth_clamp is lowered (Erik)
v4: Correct NewDepthClamp and also set flags for NewClipControl (Erik)
v5: Also set shader_has_one_variant property acording to possible
   depth_clamp lowering (Marek)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-08-01 05:58:53 +00:00
Gert Wollny d004fcc04a mesa/st: Add depth clamping to rasterizer code
implemented by Erik Faye-Lund <erik.faye-lund@collabora.com>

v2: Use current depth range values for clamping (Erik)
v3: fix scons-win64 build

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-08-01 05:58:53 +00:00
Gert Wollny 57361d89fa mesa/st: Tie depth_clamp code into other shaders (GS and TES)
v2: Use file scope defined depth_range_state  in common
v3: - don't use the one_shader_variant property, as this is
      not correct (Marek)
    - also use tests on available shader stages to enable
      depth_clamp lowering
v4: Don't use key.st, use st directly (Marek)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-08-01 05:58:53 +00:00
Gert Wollny d81ba38b02 mesa/st: Tie depth_clamp lowering into the FS
v1 implemented by Erik Faye-Lund <erik.faye-lund@collabora.com>
v2: Use different call for FS
v3: Use file scope defined depth_range_state

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-08-01 05:58:53 +00:00