7c4223876b
cell: fix incorrect pipe_transfer tests
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The value is an enum, not a bitmask.
2009-08-17 08:28:22 -06:00
c952c1f109
r300: split vbo rendering with big drawarray case
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Split vbo rendering when the number of elements requested
by drawarrays is bigger than 65536.
2009-08-17 12:50:27 +02:00
0204c7d8d7
nv50: fix stencil state
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It's the front stencil methods that have contiguous offsets,
not the back ones.
Unfortunately the names in the header still have FRONT/BACK
reversed, so I'm using hex values until it gets updated.
2009-08-17 12:26:54 +02:00
743c4af5cd
radeon: turn off bo debugging
2009-08-17 19:09:15 +10:00
fd97f2f8b8
r300: disable ZTOP only when occlusion queries are used
2009-08-16 02:04:29 +02:00
30e9c753b8
Merge branch 'oq'
2009-08-16 01:56:29 +02:00
57f55af219
mesa: Add 2 new demos to .gitignore.
2009-08-15 13:30:15 -06:00
a7adb85827
nv50: avoid a NULL-ptr dereference when the pipe context changes
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- We cannot assume all state objects are present when the pipe context changes.
2009-08-15 16:57:00 +02:00
a2af40b846
nv50: align registers used with TEX to 4
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The TEX instruction is passed the first index of a contiguous
range of 4 TEMP registers that contain coordinates / LOD and,
after execution, the texel values.
It seems the first index is required to be a multiple of 4 on
some (older ?) cards.
2009-08-15 16:22:27 +02:00
60587182d4
r300: enable ARB_occlusion_query
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Supported only on HW with TCL block and with proper radeon drm.
Required minimum radeon drm version is 1.30 or KMS.
2009-08-15 15:14:29 +02:00
d2b1b9e8d5
radeon: add flag for drm OQ support
2009-08-15 15:14:25 +02:00
f3e1d7d6f8
r300: temporary occlusion query hack
2009-08-15 15:14:24 +02:00
8d60c0b751
r300: clear not_flushed OQ list after flush
2009-08-15 15:14:24 +02:00
c903834d4d
r300/oq: add some debugging info
2009-08-15 15:14:23 +02:00
0d0f01e2e0
r300: add occlusion queries support
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TODO:
- use proper interface for checking if bo is idle when it's available
- disable ZTOP only when needed
- make it work under KMS
2009-08-15 15:14:11 +02:00
f2daded812
radeon space: realign with drm space check code
2009-08-15 21:34:17 +10:00
a6cc45e135
r300: fixup space checks since VBO code
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Hopefully this gets the ordering correct so the space checks don't fail.
2009-08-15 21:18:30 +10:00
3cc9a28b9b
r300: add just in case warn I don't think this can actually happen
2009-08-15 20:30:45 +10:00
5e4e8effec
radeon: enable vertex splitting for IBs
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Based on Maciej's code, just fixed up the alignments for INDX_BUFFER
ut2004 runs AS-Convoy
2009-08-15 20:22:13 +10:00
b9789948e0
i965: disable bounds checking on arrays with stride 0
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if stride is 0 we cannot use count as max index for bounds checking,
since the hardware will simply return 0 as data for indices failing
bounds check. If stride is 0 any index should be valid hence simply
disable bounds checking in this case.
This fixes bugs introduced with e643bc5fc7
2009-08-15 03:44:43 +02:00
e304c65a2b
i965: Add support for GL_ARB_seamless_cube_map
2009-08-14 16:28:51 -07:00
8b0b33530c
demos/cubemap: Add support for GL_ARB_seamless_cube_map
2009-08-14 16:28:51 -07:00
06ae1db4a9
Regenerate files for GL_ARB_seamless_cube_map
2009-08-14 16:28:51 -07:00
9d5bb3c6f8
Infrastructure for GL_ARB_seamless_cube_map
2009-08-14 16:28:51 -07:00
970f768666
Regenerate files for GL_APPLE_flush_buffer_range
2009-08-14 16:28:50 -07:00
a89963cec1
Merge branch 'vbo_clean'
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Conflicts:
src/mesa/drivers/dri/r300/r300_draw.c
2009-08-15 00:52:44 +02:00
7fe0dd2e6e
r300: mark VBO buffer objects as persistent
2009-08-15 00:39:19 +02:00
cd703049db
r300: unmap buffer objects after usage
2009-08-14 23:56:04 +02:00
71b1610941
mesa: append uniform values to the log file the first time we use a shader
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This info is essential to using/debugging a shader outside of its normal
application.
2009-08-14 12:58:21 -06:00
12199ed96c
mesa: also pass the GPU program to _mesa_append_uniforms_to_file()
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We want the post-link program at this points.
2009-08-14 12:57:39 -06:00
e3d47515f9
vbo: call _mesa_valid_to_render()
2009-08-14 11:31:00 -06:00
d09a19bf6e
Merge branch 'mesa_7_5_branch'
2009-08-14 11:27:51 -06:00
db598b8998
mesa: new _mesa_append_uniforms_to_file() debug/logging function
2009-08-14 11:27:33 -06:00
b6e5600bd4
mesa: call _mesa_valid_to_render()
2009-08-14 11:27:33 -06:00
d03dde16eb
vbo: call _mesa_valid_to_render()
2009-08-14 11:27:33 -06:00
56c4226fcc
mesa: new _mesa_valid_to_render() function
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Tests if the current shader/program is valid and that the framebuffer is
complete. To be called by glBegin, glDrawArrays, etc.
2009-08-14 11:27:33 -06:00
a48b0a5ce7
mesa: minor error string changes
2009-08-14 11:27:33 -06:00
1574b05189
docs: docs: document new --with-max-width/height config options
2009-08-14 11:24:20 -06:00
a7ca80ff6a
Add a FAQ about internal buffer sizes.
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(cherry picked from master, commit 9a8781bd24
2009-08-14 11:23:18 -06:00
467b3d9a6f
Add configure options for MAX_WIDTH/HEIGHT.
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This adds two --with configure options for setting defines for
MAX_WIDTH and MAX_HEIGHT. It's conceivably just as easy to define
these in CFLAGS manually, but this way users don't need to know
about internal Mesa details.
Patch updated by BrianP to set DEFINES, not CFLAGS.
(cherry picked from master, commit 7085dce750
2009-08-14 11:23:00 -06:00
e691b0e533
Allow external settings of MAX_WIDTH/HEIGHT.
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Conditionalize MAX_WIDTH / MAX_HEIGHT defines so that users can
set them via CFLAGS.
(cherry picked from master, commit 66bc17e80e
2009-08-14 11:22:37 -06:00
51c47383f9
st/xlib: reduce the proliferation of GLX context types
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Now there is just a single, struct __GLXcontextRec, which is the
GLXContext typedef has already been defined as a pointer to. I
believe this is the intended usage, that GLX implementations should
define that struct as they require.
Merge the two previous structs into one and get rid of the
no-longer-necessary type casts and sub-classing.
2009-08-14 17:56:47 +01:00
9616e4ad1c
st/dri: remove unused dummyContext value
2009-08-14 17:42:27 +01:00
3ffaa11f88
mesa: move assertions in test_attachment_completeness()
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Put the assertions after the error checks.
2009-08-14 10:30:10 -06:00
442a5e4343
nv50: fix mipmap offsets and tiling
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The hardware expects a texture's tile mode to change with
the mipmap level.
Also, only multiply by block size once to obtain size.
2009-08-14 18:23:55 +02:00
3506d7d3e2
nv50: make sure we don't re-emit outdated scissor state
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Since we don't turn off scissors, we need to update the
stateobj when the framebuffer size changes.
2009-08-14 18:16:46 +02:00
74e8b1a30b
nv50: make use of the y-origin switch
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Now that we know how to make the hardware have y-coordinate origin
top, we can get rid of all the inversion introduced earlier.
2009-08-14 18:06:24 +02:00
cdaf63d0ea
r300: remove broken vertex splitting
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Revert to previous behaviour of dropping to big render operations.
2009-08-14 17:10:21 +02:00
9e018d8225
r300: rework index buffer setup
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Copy elements directly to DMA bo to get rid of one memcpy, and prepare for using VBOs for index buffer.
2009-08-14 17:10:15 +02:00
7c060bff13
r300: remove unused software TNL path
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This doesn't remove software TCL path - so RS480 and RS690 work as before.
2009-08-14 17:06:02 +02:00
Brian Paul
Jerome Glisse
Christoph Bumiller
Dave Airlie
Maciej Cencora
Pauli Nieminen
Maarten Maathuis
Roland Scheidegger
Ian Romanick
Keith Whitwell