Commit Graph

71112 Commits

Author SHA1 Message Date
Emil Velikov 7a50bf6c7f auxiliary/vl: use the correct screen index
Inspired (copied) from Marek's commit for egl/x11
commit 0b56e23e7f3(egl/dri2: use the correct screen index)

v2: Fix copy/pasta errors.

Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-07-13 20:43:11 +01:00
Emil Velikov 10a7b579fd radeon: remove dri_mirror state
Most of the data stored(duplicated) was unused, and for the one that is
follow the approach set by other drivers.
This eliminates the use of legacy (dri1) types.

Cc: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-07-13 20:15:27 +01:00
Emil Velikov 82b9b2e523 i915: remove unused driFd variable
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-13 20:14:53 +01:00
Emil Velikov a025e539e4 i965: bump libdrm requirement to 2.4.61 and drop in-tree workaround
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-13 20:14:31 +01:00
Emil Velikov c505064b2c bugzilla_mesa.sh: sort the bugs list by number
v2: Use change sed/sort based on Ilia's suggestion.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-13 20:02:09 +01:00
Emil Velikov 9027d53b2a radeonsi: directly include radeon/* headers
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-13 20:01:16 +01:00
Emil Velikov dd50ccf0f4 auxiliary/vl: use loader_open_device() over open()
The former handles O_CLOEXEC (and the lack of it) appropriately.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-13 19:57:59 +01:00
Emil Velikov cc32d25454 pipe-loader: use loader_open_device() rather than open()
The former handles O_CLOEXEC (and the lack of it) appropriately.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-13 19:57:54 +01:00
Emil Velikov 132031b110 pipe-loader: remove pipe_loader_sw_probe_xlib
It was only useful for st/egl, although I've never got to merging the
pipe-loader and inline-helpers before it was removed. There are no users
for it ATM.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-13 19:57:38 +01:00
Emil Velikov c73d30dfe9 automake: remove empty GALLIUM_PIPE_LOADER_LIBS
Cc: Rob Clark <robclark@freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-13 19:57:34 +01:00
Emil Velikov abc20120e4 automake: pipe-loader: remove the 'client' pipe-loader
Was only around as opencl's pipe-loader wanted to link against xcb in
some cases.

Cc: Rob Clark <robclark@freedesktop.org>
Cc: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-13 19:57:06 +01:00
Emil Velikov 0959d7312d pipe-loader: remove pipe_loader_drm_probe_fd() x_auth argument
No longer used by anyone, as of last commit.

Cc: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-13 19:56:54 +01:00
Emil Velikov a27ec5dc46 pipe-loader: simplify pipe_loader_drm_probe
Do not iterate and (attempt to) open the render device, if we're over
the requested number of devices.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-13 19:56:39 +01:00
Emil Velikov 69a1b9959e pipe-loader: drop support for non-render node devices
Render nodes have been around for quite some time. Removing support via
the master/primary node allows us to clean up the conditional
compilation and simplify the build greatly.

For example currently we the pipe-loader, which explicitly links against
xcb and friends (for X auth) if found at compile-time. That
would cause problems as one will be forced to use X/xcb, even if it's a
headless system that is used for opencl.

v2: Clarify the linking topic in the commit message.

Cc: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-13 19:52:48 +01:00
Dave Airlie de5c2b6f2b radeonsi: direct emit intrinsic for DFRAC.
Michel reported this still failed, and this fixed it

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-13 09:21:43 +01:00
Dave Airlie 4cbf0a0ccf radeonsi: ARB_gpu_shader_fp64 + ARB_vertex_attrib_64bit support.
This adds the translation from TGSI to AMDGPU llvm backend, for the
64-bit opcodes. The backend pretty much handles everything for us
fine. There is one patch required for SI DFRAC support, that I know
off.

[airlied: fixed missing comma, updated relnotes]

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-12 22:40:51 +01:00
Guillaume Desmottes 8108de4774 loader: don't leak udev_enumerate
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90073
Signed-off-by: Guillaume Desmottes <guillaume.desmottes@collabora.co.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-11 20:49:25 +01:00
Guillaume Desmottes f7008ebcdc dri3_open: don't leak the reply
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90073
Signed-off-by: Guillaume Desmottes <guillaume.desmottes@collabora.co.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-11 20:48:53 +01:00
Rhys Kidd 5d219908ce doxygen: Remove doxygen_sqlite3.db with 'make clean'
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-11 20:48:25 +01:00
Rhys Kidd 6cc29cf5e2 doxygen: Add doxygen_sqlite3.db to .gitignore
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-11 20:48:06 +01:00
Emil Velikov 846c60fc7d docs: add news item and link release notes for mesa 10.6.2
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-11 20:36:44 +01:00
Emil Velikov 6dfce109c2 docs: Add sha256 checksums for the 10.6.2 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 89cbd91b17989ec7eb1cb93ac427a84dca56cd79)
2015-07-11 20:35:06 +01:00
Emil Velikov 66d3543845 Add release notes for the 10.6.2 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 9643cce94c8a1938e3342fb83d025a1e5c2aa79b)
2015-07-11 20:35:04 +01:00
Dave Airlie ad2c3905d3 tgsi: add DFMA to the opcode infer functions.
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-11 08:05:56 +01:00
Dave Airlie e70d051560 r600g: move sampler/ubo index registers before temp reg
temp_reg needs to be last, as we increment things
away from it, otherwise on cayman some tests were overwriting
the index regs.

Fixes 2 piglit with ARB_gpu_shader5 forced on cayman.

Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-11 16:31:02 +10:00
Dave Airlie c397bd1407 r600g: fix sampler/ubo indexing on cayman
Cayman needs a different method to upload the CF IDX0/1

This fixes 31 piglits when ARB_gpu_shader5 is forced on
with cayman.

Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-11 16:30:39 +10:00
Ilia Mirkin 1bfa25e88d nv50, nvc0: enable at least one color RT if alphatest is enabled
Fixes the following piglits:
  fbo-alphatest-nocolor
  fbo-alphatest-nocolor-ff

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-07-10 22:15:56 -04:00
Kenneth Graunke 4fe15717ce i965: Remove special case for layered drawbuffer attachments.
When binding a layered texture, the layer is already 0.  There's no need
to special case this.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-07-10 19:14:41 -07:00
Kenneth Graunke 6be024f44d i965/gen6: Set up layer constraints properly for depth buffers.
This ports over Chris Forbes' equivalent fixes in gen7_misc_state.c
from commit 77d55ef481.

No Piglit changes on Sandybridge.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-07-10 19:13:42 -07:00
Kenneth Graunke f3a620e2a6 i965: Label the repclear shader "meta repclear" rather than "meta clear".
Color clears can be performed via two separate shaders - one is the
generic "meta clear" shader (in meta.c); the other is the i965 specific
"repclear" shader (in brw_meta_fast_clear.c).

Giving them separate names makes them distinguishable when reading
INTEL_DEBUG=shader_time output.

v2: Call it "meta repclear", as suggested by Jason.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-10 19:10:19 -07:00
Kenneth Graunke a078e13a7c i965: Fix indentation in emit_control_data_bits().
The last patch left the code indented too far.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-10 18:21:27 -07:00
Kenneth Graunke 0edb084f9d i965/gs: Move vertex_count != 0 check up a level; skip one caller.
Paul's original code had emit_control_data_bits() skip the URB write if
vertex_count was 0.  This meant wrapping every control data write in a
conditional write.

We accumulate control data bits in a single UD (32-bit) register.  For
simple shaders that don't emit many vertices, the control data header
will be <= 32-bits long, so we only need to write it once at the end of
the shader.

For shaders with larger headers, we write out batches of control data
bits at EmitVertex(), when (vertex_count * bits_per_vertex) % 32 == 0.
On the first EmitVertex() call, the above expression will evaluate to
true simply because vertex_count == 0.  But we want to avoid emitting
the control data bits, because we haven't accumulated 32-bits worth yet.

In other words, the vertex_count != 0 check is really only necessary in
the EmitVertex() batching case, not the end-of-thread case.

This saves a CMP/IF/ENDIF in every shader that uses EndPrimitive() or
multiple streams.  The only downside is that a shader which emits no
vertices at all will execute an additional URB write---but such shaders
are pointless and not worth optimizing.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-10 18:21:15 -07:00
Timothy Arceri 0fae4e451b glsl: use set rather than old hash table for ir_validate
When the new hash table implementation was added to Mesa it claimed to be much
faster, see commits 35fd61bd99 and 72e55bb688.

The set implementation follows the same implementation strategy so this should
be faster and there was no need to store a data field.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-11 10:25:32 +10:00
Chad Versace 75784243df mesa: Fix generation of git_sha1.h.tmp for gitlinks
Don't assume that $(top_srcdir)/.git is a directory. It may be a
gitlink file [1] if $(top_srcdir) is a submodule checkout or a linked
worktree [2].

[1] A "gitlink" is a text file that specifies the real location of
    the gitdir.
[2] Linked worktrees are a new feature in Git 2.5.

Cc: "10.6, 10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-10 11:22:47 -07:00
Rob Clark 15d3524ad2 freedreno/a4xx: occlusion query support
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-10 11:57:31 -04:00
Rob Clark 2b7a54452f freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-10 11:57:31 -04:00
Rob Clark e44845472a freedreno/ir3/sched: fixup new instr's block
If we split addr/pred, the original instruction could have originated
from a different block.  If we don't fixup the block ptr we hit asserts
later (in debug builds).

NOTE: perhaps we don't want to try to preserve addr/pred reg's across
block boundaries.. this at least needs some thought in case addr/pred
writes end up inside a conditional block..

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-10 11:57:31 -04:00
Rob Clark a1a6f00782 freedreno/ir3/ra: fix failed assert for a0/p0
The address and predicate register are special, they don't get assigned
in RA.  So do a better job of ignoring them rather than hitting later
asserts.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-10 11:57:31 -04:00
Rob Clark 65b2ae510b freedreno/ir3: shader-db traces
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-10 11:57:31 -04:00
Rob Clark 422296e38d freedreno: fix crash in fd_invalidate_resource()
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-10 11:57:30 -04:00
Rob Clark ab3ba21f97 vc4: unref old fence
Some, but not all, state trackers will explicitly unref (and set to
NULL) the previous *fence before calling pipe->flush().  So driver
should use fence_ref() which will unref the old fence if not NULL.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Acked-by: Eric Anholt <eric@anholt.net>
2015-07-10 11:57:30 -04:00
Rob Clark 749dced4b3 ilo: unref old fence
Some, but not all, state trackers will explicitly unref (and set to
NULL) the previous *fence before calling pipe->flush().  So driver
should use fence_ref() which will unref the old fence if not NULL.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Acked-by: Chia-I Wu <olvaffe@gmail.com>
2015-07-10 11:57:30 -04:00
Rob Clark 7e0a26defe freedreno: unref old fence
Some, but not all, state trackers will explicitly unref (and set to
NULL) the previous *fence before calling pipe->flush().  So driver
should use fence_ref() which will unref the old fence if not NULL.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-10 11:57:30 -04:00
Rob Clark f60354ee72 gallium: clarify reference counting for fence
Nowhere was it spelled out that the state tracker may expect the pipe
driver to unref the old fence.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-07-10 11:57:30 -04:00
Rob Clark 0a8af6361e xa: don't leak fences
XA was never unref'ing last_fence in the various call paths to
pipe->flush().  Add this to xa_context_flush() and update the other
open-coded calls to pipe->flush() to use xa_context_flush() instead.

This fixes a memory leak reported with xf86-video-freedreno.

Reported-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-10 11:57:30 -04:00
Kenneth Graunke f12302b898 i965/vs: Get rid of brw_vs_compile completely.
After tearing it out another level or two, and just passing the key and
vp directly, we can finally remove this struct.  It also eliminates a
pointless memcpy() of the key.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-07-09 17:10:06 -07:00
Kenneth Graunke 64390967c1 i965/vs: Remove 'c'/vs_compile from vec4_vs_visitor.
At this point, the brw_vs_compile structure only contains the key and
gl_vertex_program pointer.  We may as well pass and store them directly;
it's simpler and more convenient (key-> instead of vs_compile->key...).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-07-09 17:08:42 -07:00
Kenneth Graunke 13372a0ce7 i965/vec4: Move c->last_scratch into vec4_visitor.
Nothing outside of vec4_visitor uses it, so we may as well keep it
internal.

Commit db9c915abc for the vec4 backend.

(The empty class will be going away soon.)

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-07-09 17:06:29 -07:00
Kenneth Graunke 8524deb8c8 i965/vec4: Move total_scratch calculation into the visitor.
This is more consistent with how we do it in the FS backend, and reduces
a tiny bit of duplication.  It'll also allow for a bit more tidying.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-07-09 17:06:27 -07:00
Kenneth Graunke dc776ffb90 i965/vec4: Move perf_debug about register spilling into the visitor.
This patch makes us only issue the performance warning about register
spilling if we actually spilled registers.  We also use scratch space
for indirect addressing and the like.

This is basically commit c51163b0cf for
the vec4 backend.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-07-09 17:06:26 -07:00