freedreno/ir3: shader-db traces
Signed-off-by: Rob Clark <robclark@freedesktop.org>
This commit is contained in:
Rob Clark
parent
422296e38d
commit
65b2ae510b
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@ -69,6 +69,7 @@ static const struct debug_named_value debug_options[] = {
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{"nobin", FD_DBG_NOBIN, "Disable hw binning"},
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{"optmsgs", FD_DBG_OPTMSGS,"Enable optimizer debug messages"},
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{"glsl120", FD_DBG_GLSL120,"Temporary flag to force GLSL 1.20 (rather than 1.30) on a3xx+"},
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{"shaderdb", FD_DBG_SHADERDB, "Enable shaderdb output"},
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DEBUG_NAMED_VALUE_END
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};
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@ -64,6 +64,7 @@ enum adreno_stencil_op fd_stencil_op(unsigned op);
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#define FD_DBG_NOBIN 0x0100
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#define FD_DBG_OPTMSGS 0x0200
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#define FD_DBG_GLSL120 0x0400
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#define FD_DBG_SHADERDB 0x0800
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extern int fd_mesa_debug;
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extern bool fd_binning_enabled;
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@ -46,7 +46,7 @@
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static void dump_info(struct ir3_shader_variant *so, const char *str)
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{
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uint32_t *bin;
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const char *type = (so->type == SHADER_VERTEX) ? "VERT" : "FRAG";
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const char *type = ir3_shader_stage(so->shader);
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// TODO make gpu_id configurable on cmdline
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bin = ir3_shader_assemble(so, 320);
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debug_printf("; %s: %s\n", type, str);
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@ -106,6 +106,7 @@ int main(int argc, char **argv)
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struct tgsi_parse_context parse;
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struct ir3_compiler *compiler;
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struct ir3_shader_variant v;
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struct ir3_shader s;
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struct ir3_shader_key key = {};
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const char *info;
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void *ptr;
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@ -182,6 +183,7 @@ int main(int argc, char **argv)
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memset(&v, 0, sizeof(v));
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v.key = key;
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v.shader = &s;
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ret = read_file(filename, &ptr, &size);
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if (ret) {
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@ -198,13 +200,13 @@ int main(int argc, char **argv)
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tgsi_parse_init(&parse, toks);
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switch (parse.FullHeader.Processor.Processor) {
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case TGSI_PROCESSOR_FRAGMENT:
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v.type = SHADER_FRAGMENT;
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s.type = v.type = SHADER_FRAGMENT;
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break;
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case TGSI_PROCESSOR_VERTEX:
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v.type = SHADER_VERTEX;
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s.type = v.type = SHADER_VERTEX;
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break;
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case TGSI_PROCESSOR_COMPUTE:
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v.type = SHADER_COMPUTE;
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s.type = v.type = SHADER_COMPUTE;
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break;
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}
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@ -36,6 +36,7 @@ struct ir3_ra_reg_set;
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struct ir3_compiler {
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uint32_t gpu_id;
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struct ir3_ra_reg_set *set;
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uint32_t shader_count;
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};
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struct ir3_compiler * ir3_compiler_create(uint32_t gpu_id);
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@ -1983,7 +1983,7 @@ setup_input(struct ir3_compile *ctx, nir_variable *in)
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unsigned semantic_index = in->data.index;
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unsigned n = in->data.driver_location;
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DBG("; in: %u:%u, len=%ux%u, loc=%u\n",
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DBG("; in: %u:%u, len=%ux%u, loc=%u",
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semantic_name, semantic_index, array_len,
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ncomp, n);
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@ -2078,7 +2078,7 @@ setup_output(struct ir3_compile *ctx, nir_variable *out)
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unsigned n = out->data.driver_location;
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unsigned comp = 0;
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DBG("; out: %u:%u, len=%ux%u, loc=%u\n",
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DBG("; out: %u:%u, len=%ux%u, loc=%u",
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semantic_name, semantic_index, array_len,
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ncomp, n);
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@ -147,6 +147,25 @@ assemble_variant(struct ir3_shader_variant *v)
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ir3_shader_disasm(v, bin);
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}
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if (fd_mesa_debug & FD_DBG_SHADERDB) {
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/* print generic shader info: */
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fprintf(stderr, "SHADER-DB: %s prog %d/%d: %u instructions, %u dwords\n",
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ir3_shader_stage(v->shader),
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v->shader->id, v->id,
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v->info.instrs_count,
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v->info.sizedwords);
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fprintf(stderr, "SHADER-DB: %s prog %d/%d: %u half, %u full\n",
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ir3_shader_stage(v->shader),
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v->shader->id, v->id,
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v->info.max_half_reg + 1,
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v->info.max_reg + 1);
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fprintf(stderr, "SHADER-DB: %s prog %d/%d: %u const, %u constlen\n",
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ir3_shader_stage(v->shader),
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v->shader->id, v->id,
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v->info.max_const + 1,
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v->constlen);
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}
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free(bin);
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/* no need to keep the ir around beyond this point: */
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@ -164,6 +183,7 @@ create_variant(struct ir3_shader *shader, struct ir3_shader_key key)
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if (!v)
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return NULL;
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v->id = ++shader->variant_count;
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v->shader = shader;
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v->key = key;
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v->type = shader->type;
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@ -258,9 +278,18 @@ ir3_shader_create(struct pipe_context *pctx, const struct tgsi_token *tokens,
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{
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struct ir3_shader *shader = CALLOC_STRUCT(ir3_shader);
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shader->compiler = fd_context(pctx)->screen->compiler;
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shader->id = ++shader->compiler->shader_count;
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shader->pctx = pctx;
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shader->type = type;
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shader->tokens = tgsi_dup_tokens(tokens);
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if (fd_mesa_debug & FD_DBG_SHADERDB) {
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/* if shader-db run, create a standard variant immediately
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* (as otherwise nothing will trigger the shader to be
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* actually compiled)
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*/
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static struct ir3_shader_key key = {};
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ir3_shader_variant(shader, key);
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}
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return shader;
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}
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@ -283,7 +312,7 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin)
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{
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struct ir3 *ir = so->ir;
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struct ir3_register *reg;
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const char *type = (so->type == SHADER_VERTEX) ? "VERT" : "FRAG";
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const char *type = ir3_shader_stage(so->shader);
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uint8_t regid;
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unsigned i;
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@ -348,11 +377,16 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin)
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debug_printf("\n");
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/* print generic shader info: */
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debug_printf("; %s: %u instructions, %d half, %d full\n", type,
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debug_printf("; %s prog %d/%d: %u instructions, %d half, %d full\n",
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type, so->shader->id, so->id,
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so->info.instrs_count,
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so->info.max_half_reg + 1,
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so->info.max_reg + 1);
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debug_printf("; %d const, %u constlen\n",
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so->info.max_const + 1,
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so->constlen);
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/* print shader type specific info: */
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switch (so->type) {
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case SHADER_VERTEX:
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@ -100,6 +100,9 @@ ir3_shader_key_equal(struct ir3_shader_key *a, struct ir3_shader_key *b)
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struct ir3_shader_variant {
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struct fd_bo *bo;
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/* variant id (for debug) */
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uint32_t id;
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struct ir3_shader_key key;
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struct ir3_info info;
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@ -192,6 +195,10 @@ struct ir3_shader_variant {
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struct ir3_shader {
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enum shader_t type;
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/* shader id (for debug): */
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uint32_t id;
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uint32_t variant_count;
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struct ir3_compiler *compiler;
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struct pipe_context *pctx;
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@ -214,6 +221,19 @@ struct ir3_shader_variant * ir3_shader_variant(struct ir3_shader *shader,
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struct ir3_shader_key key);
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void ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin);
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static inline const char *
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ir3_shader_stage(struct ir3_shader *shader)
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{
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switch (shader->type) {
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case SHADER_VERTEX: return "VERT";
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case SHADER_FRAGMENT: return "FRAG";
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case SHADER_COMPUTE: return "CL";
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default:
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unreachable("invalid type");
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return NULL;
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}
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}
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/*
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* Helper/util:
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*/
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