Commit Graph

70847 Commits

Author SHA1 Message Date
Brian Paul 12c1c0706d tgsi: new comments, assertion for executing TGSI_OPCODE_CAL 2015-06-19 08:45:00 -06:00
Timothy Arceri 2ce2b80c6f docs: update developer info
Update piglit link to the current Piglit website.

Add note about updating patchwork when sending patch revisions.

Acked-by: Matt Turner <mattst88@gmail.com>
2015-06-19 18:27:40 +10:00
Jose Fonseca afeb922206 llvmpipe: Truncate the binned constants to max const buffer size.
Tested with Ilia Mirkin's gzdoom.trace and
"arb_uniform_buffer_object-maxuniformblocksize fsexceed" piglit test
without my earlier fix to fail linkage when UBO exceeds
GL_MAX_UNIFORM_BLOCK_SIZE.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-06-19 07:21:06 +01:00
Jose Fonseca f734d25560 glsl: Fail linkage when UBO exceeds GL_MAX_UNIFORM_BLOCK_SIZE.
It's not totally clear whether other Mesa drivers can safely cope with
over-sized UBOs, but at least for llvmpipe receiving a UBO larger than
its limit causes problems, as it won't fit into its internal display
lists.

This fixes piglit "arb_uniform_buffer_object-maxuniformblocksize
fsexceed" without regressions for llvmpipe.

NVIDIA driver also fails to link the shader from
"arb_uniform_buffer_object-maxuniformblocksize fsexceed".

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65525

PS: I don't recommend cherry-picking this for Mesa stable, as some app
might inadvertently been relying on UBOs larger than
GL_MAX_UNIFORM_BLOCK_SIZE to work on other drivers, so even if this
commit is universally accepted it's probably best to let it mature in
master for a while.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-06-19 07:21:05 +01:00
Ilia Mirkin 5974841fd0 glsl: guard gl_NumSamples enablement on ARB_sample_shading
gl_NumSamples should only be enabled when ARB_sample_shading is enabled.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-06-18 20:40:22 -04:00
Matt Turner 22af95af83 i965: Add missing braces around if-statement.
Fixes a performance problem caused by commit b639ed2f.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90895
2015-06-18 16:45:55 -07:00
Jordan Justen 2310a65c28 i965/compute: Fix undefined code with right_mask for SIMD32
Although we don't support SIMD32, krh pointed out that the left shift
by 32 is undefined by C/C++ for 32-bit integers.

Suggested-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-18 11:24:39 -07:00
Ilia Mirkin 770f141866 mesa: add GL_PROGRAM_PIPELINE support in KHR_debug calls
This was apparently missed when ARB_sso support was added.
Add label support to pipeline objects just like all the other
debug-related objects.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-18 13:21:44 -04:00
Ilia Mirkin b6e238023c glsl: add version checks to conditionals for builtin variable enablement
A number of builtin variables have checks based on the extension being
enabled, but were missing enablement via a higher GLSL version.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-18 13:21:44 -04:00
Ilia Mirkin c40e7ee7c4 glsl: handle conversions to double when comparing param matches
This allows mod(int, int) to become selected as float mod when doubles
are supported.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-06-18 13:21:44 -04:00
Emil Velikov 6b0378e483 ilo: remove missing ilo_fence.h from the sources list
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-18 12:59:28 +01:00
Boyan Ding 997fc807b2 egl/x11: Set version of swrastLoader to 2
which it actually implements instead of the newest version defined in
dri_interface.h

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-18 12:57:59 +01:00
Eric Anholt 1d45e44b2f vc4: Move tile state/alloc allocation into the kernel.
This avoids a security issue where userspace could have written the tile
state/tile alloc behind the GPU's back, and will apparently be necessary
for fixing stability bugs (tile state buffers are missing some top bits
for the tile alloc's address).
2015-06-17 23:53:49 -07:00
Eric Anholt 9adcd2d80a vc4: Move RCL generation into the kernel.
There weren't that many variations of RCL generation, and this lets us
skip all the in-kernel validation for what we generated.
2015-06-17 23:53:49 -07:00
Eric Anholt 91c73a9a28 vc4: Add dumping of VC4_PACKET_TILE_BINNING_MODE_CONFIG. 2015-06-17 23:53:49 -07:00
Eric Anholt dc1fbad2eb vc4: Fix memory leak from simple_list conversion.
I accidentally shadowed the outside declaration, so we always returned
NULL even when we'd found something in the cache.
2015-06-17 23:53:49 -07:00
Eric Anholt 62d153ea37 vc4: Track the number of BOs allocated and their size.
This is useful for BO leak debugging.
2015-06-17 23:53:49 -07:00
Iago Toral Quiroga 2b1cdb0edd i965: Fix textureGrad with cube samplers
We can't use sampler messages with gradient information (like
sample_g or sample_d) to deal with this scenario because according
to the PRM:

"The r coordinate and its gradients are required only for surface
types that use the third coordinate. Usage of this message type on
cube surfaces assumes that the u, v, and gradients have already been
transformed onto the appropriate face, but still in [-1,+1] range.
The r coordinate contains the faceid, and the r gradients are ignored
by hardware."

Instead, we should lower this to compute the LOD manually based on the
gradients and use a different sample message that takes the computed
LOD instead of the gradients. This is already being done in
brw_lower_texture_gradients.cpp, but it is restricted to shadow
samplers only, although there is a comment stating that we should
probably do this also for samplerCube and samplerCubeArray.

Because of this, both dEQP and Piglit test cases for textureGrad with
cube maps currently fail.

This patch does two things:
1) Activates the texturegrad lowering pass for all cube samplers.
2) Corrects the computation of the LOD value for cube samplers.

I had to do 2) because for cube maps the calculations implemented
in the lowering pass always compute a value of rho that is twice
the value we want (so we get a LOD value one unit larger than we
want). This only happens for cube map samplers (all kinds). I am
not sure about why we need to do this, but I suspect that it is
related to the fact that cube map coordinates, when transported
to a specific face in the cube, are in the range [-1, 1] instead of
[0, 1] so we probably need to divide the derivatives by 2 when
we compute the LOD. Doing that would produce the same result as
dividing the final rho computation by 2 (or removing a unit
from the computed LOD, which is what we are doing here).

Fixes the following piglit tests:
bin/tex-miplevel-selection textureGrad Cube -auto -fbo
bin/tex-miplevel-selection textureGrad CubeArray -auto -fbo
bin/tex-miplevel-selection textureGrad CubeShadow -auto -fbo

Fixes 10 dEQP tests in the following category:
dEQP-GLES3.functional.shaders.texture_functions.texturegrad.*cube*

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-18 08:35:46 +02:00
Ilia Mirkin 36e3eb6a95 nvc0/ir: can't have a join on a load with an indirect source
Triggers an INVALID_OPCODE warning on GK208. Seems rare enough to not
warrant verification on other chips. Fixes the new piglits:

  ubo_array_indexing/fs-nonuniform-control-flow.shader_test
  ubo_array_indexing/vs-nonuniform-control-flow.shader_test

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-17 22:23:20 -04:00
Kevin Rogovin ff06901082 docs: mark GL_ARB_framebuffer_no_attachments done for i965
Mark GL_ARB_framebuffer_no_attachments as done for i965.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:03 +03:00
Kevin Rogovin 8319999831 i965: enable ARB_framebuffer_no_attachments for Gen7+
Enable GL_ARB_framebuffer_no_attachments in i965 for Gen7 and higher.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:03 +03:00
Kevin Rogovin 9ded636975 i965: execution of frag-shader when it has atomic buffer
Ensure that the GPU spawns the fragment shader thread for those
fragment shaders with atomic buffer access.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:03 +03:00
Kevin Rogovin bbb700967e mesa: function for testing if current frag-shader has atomics
Add helper function that checks if current fragment shader active
of gl_context has atomic buffer access.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:03 +03:00
Kevin Rogovin 41b6db225f i965: Use _mesa_geometric_ functions appropriately
Change references to gl_framebuffer::Width, Height, MaxNumLayers
and Visual::samples to use the _mesa_geometry_ convenience functions
for those places where the geometry of the gl_framebuffer is needed
(in contrast to the geometry of the intersection of the attachments
of the gl_framebuffer).

This patch is to pave the way to enable GL_ARB_framebuffer_no_attachments
on Gen7 and higher in i965.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:03 +03:00
Kevin Rogovin 51f4b51151 mesa: helper function for scissor box of gl_framebuffer
Add helper convenience function that intersects the scissor values
against a passed bounding box. In addition, to avoid replicated code,
make the function _mesa_scissor_bounding_box() use this new function.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:03 +03:00
Kevin Rogovin 74987977a3 mesa: add helper functions for geometry of gl_framebuffer
Add convenience helper functions for fetching geometry of gl_framebuffer
that return the geometry of the gl_framebuffer instead of the geometry of
the buffers of the gl_framebuffer when then the gl_framebuffer has no
attachments.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:03 +03:00
Kevin Rogovin 6aa12994bd PATCH 03/10] mesa: Complete ARB_framebuffer_no_attachments in Mesa core
Implement GL_ARB_framebuffer_no_attachments in Mesa core
 - changes to conditions for framebuffer completenss
 - implement set/get functions for framebuffers for
   new functions in GL_ARB_framebuffer_no_attachments

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:03 +03:00
Kevin Rogovin c9d26f201a mesa: Constants and functions for ARB_framebuffer_no_attachments
Define the enumeration constants, function entry points and
glGet for the GL_ARB_framebuffer_no_attachments.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:02 +03:00
Kevin Rogovin da81999bee mesa: Define infrastructure for ARB_framebuffer_no_attachments
Define the infrastructure for the extension GL_ARB_framebuffer_no_attachments:
 - extension table
 - additions to gl_framebuffer

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:02 +03:00
Eric Anholt a0cd1a4060 vc4: Make sure that direct texture clamps have a minimum value of 0.
I was thinking of the MIN opcode in terms of unsigned math, but it's
signed, so if you used a negative array index, you could read before the
UBO.  Fixes segfaults under simulation in piglit array indexing tests with
mprotect-based guard pages.
2015-06-16 15:15:14 -07:00
Eric Anholt d4d2736149 vc4: Swap around which src we spill to ra31/rb31.
I wanted to assert that src1 came from a non-unspilled register in shader
validation, and this easily gets us that.  And, as a bonus:

total instructions in shared programs: 93347 -> 92723 (-0.67%)
instructions in affected programs:     60524 -> 59900 (-1.03%)
2015-06-16 15:15:14 -07:00
Eric Anholt 507f3e708c vc4: R4 is not a valid register for clamped direct texturing.
Our array only goes to R3, and R4 is a special case that shouldn't be
used.
2015-06-16 15:15:14 -07:00
Eric Anholt 2eac356467 vc4: Factor out the live clamp register getter. 2015-06-16 15:15:14 -07:00
Eric Anholt 596532cc7d vc4: Drop the unused "stride" field of surfaces.
We're always looking at the slice anyway, when we would have needed it.
2015-06-16 15:15:14 -07:00
Eric Anholt 6dd55b4909 vc4: Handle refcounting the exec BO like we do in the kernel.
This reduces the diff to the kernel, and will be useful when I make the
kernel allocate more BOs as part of validation.
2015-06-16 15:15:14 -07:00
Eric Anholt 731ac05cc4 vc4: Use VC4_SET/GET_FIELD for some RCL packets. 2015-06-16 15:15:14 -07:00
Eric Anholt e22a192784 vc4: Make symbolic values for packet sizes. 2015-06-16 15:15:14 -07:00
Eric Anholt c2f8287601 vc4: Use symbolic values in texture ptype validation. 2015-06-16 15:15:14 -07:00
Eric Anholt 5fbbec9aae vc4: Move vc4_packet.h to the kernel/ directory, since it's also shared.
I want to notice discrepancies when I diff -u between Mesa and the kernel.
2015-06-16 15:15:14 -07:00
Anuj Phogat e20345204d i965/gen9: Disable Mip Tail for YF/YS tiled surfaces
Disabling miptails fixed the buffer corruption happening in FBO
which use YF/YS tiled renderbuffer or texture as color attachment.

Spec recommends disabling mip tails only for non-mip-mapped surfaces.
But, without disabling miptails I couldn't get correct data out of
mipmapped YF/YS tiled surface.

We need better understanding of miptails before start using them.
For now this patch helps move things forward.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-16 14:52:49 -07:00
Anuj Phogat 54591bb67f i965/gen9: Set vertical and horizontal surface alignments
Patch sets the alignments for texture and renderbuffer surfaces.

V3: Make changes inside horizontal_alignment() and
    vertical_alignment() (Topi)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-06-16 14:52:48 -07:00
Anuj Phogat 6c380d42b1 i965: Use BRW_SURFACE_* in place of GL_TEXTURE_*
Makes no functional changes in the code.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-06-16 14:52:48 -07:00
Anuj Phogat af08530332 i965: Rename use_linear_1d_layout() and make it global
This function will be utilised in later patches.

V2: Make both pointers constants (Topi)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-06-16 14:52:48 -07:00
Anuj Phogat 0668756447 i965/gen9: Set tiled resource mode in surface state
This patch sets the tiled resource mode for texture and renderbuffer
surfaces.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-06-16 14:52:48 -07:00
Haixia Shi 6b8accb36b egl/dri2: implement platform_surfaceless
The surfaceless platform is for off-screen rendering only. Render node support
is required.

Only consider the render nodes. Do not use normal nodes as they require
auth hooks.

v3: change platform_null to platform_surfaceless
v4: make libdrm required for surfaceless
v5: remove modified include guards with defined(HAVE_SURFACELESS_PLATFORM)
v6: use O_CLOEXEC for drm fd

Signed-off-by: Haixia Shi <hshi@chromium.org>
Signed-off-by: Zach Reizner <zachr@google.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-16 13:55:26 -07:00
Neil Roberts c753866cc4 i965/vec4: Fix the source register for indexed samplers
Previously when setting up the sample instruction for an indirect
sampler the vec4 backend was directly passing the pseudo opcode's
src0. However vec4_visitor::visit(ir_texture *) doesn't set the
texture operation's src0 -- it's left as BAD_FILE, which when
translated into a brw_reg gives the null register. In brw_SAMPLE,
gen6_resolve_implied_move() inserts a MOV from the inst->base_mrf and
sets the src0 appropriately. The indirect sampler case did not have a
call to gen6_resolve_implied_move().

The fs backend avoids this because the platforms that support dynamic
indexing of samplers (IVB+) have been converted to not use the
fake-MRF hack, and instead send from proper GRFs.

This patch makes it call gen6_resolve_implied_move before setting up
the indirect message. This is similar to what is done for constant
sampler numbers in brw_SAMPLE.

The Piglit tests for sampler array indexing didn't pick this up
because they were using a texture with a solid colour so it didn't
matter what texture coordinates were actually used. The tests have now
been changed to be more thorough in this commit:

http://cgit.freedesktop.org/piglit/commit/?id=4f9caf084eda7

With that patch the tests for gs and vs are currently failing on
Ivybridge, but this patch fixes them. There are no other changes to a
Piglit run on Ivybridge.

On Skylake the gs tests were failing even without the Piglit patch
because Skylake needs the source registers to work correctly in order
to send a message header to select SIMD4x2 mode.

(The explanation in the commit message is partially written by Matt
Turner)

Tested-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-16 18:44:32 +01:00
Marek Olšák aab55b0bc6 st/mesa: improve assertions in vp/fp translation
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-16 15:47:03 +02:00
Marek Olšák 42a3c1ec84 mesa: don't rebind constant buffers after every state change if GS is active
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-16 15:47:03 +02:00
Chris Forbes 358b6bb7a7 mesa: generalize sso stage interleaving check
For tessellation.

v2: cleanup by Marek Olšák

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-16 15:47:03 +02:00
Marek Olšák 8af11afc38 mesa: remove unused variables from gl_program
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-16 15:47:02 +02:00