Commit Graph

112347 Commits

Author SHA1 Message Date
Alyssa Rosenzweig 17adcfc008 panfrost: Support (non-)seamless cube maps
Identify the seamless cubemap bit and passthrough the Gallium state
rather than setting unconditionally.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Alyssa Rosenzweig 3e6c6bb0af panfrost: Merge checksum buffer with main BO
This is similar to the AFBC merge; now all (non-imported) buffers use a
common backing buffer. Reenables checksumming, eliminating a performance
regression.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Alyssa Rosenzweig a9fc1c8399 panfrost/decode: Limit MRT blend count
I thought I already fixed this. Maybe that was a dream...? Then again, I
might be dreaming now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Alyssa Rosenzweig 65e9d9b625 panfrost: Clamp tile coordinates before job submission
Fixes TILE_RANGE_FAULT raised on some tests in
dEQP-GLES3.functional.fbo.blit.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Alyssa Rosenzweig 7005c0d83b panfrost: Use dedicated u_blitter context for wallpapers
The main ctx->blitter instance should be reserved for blits originated
from Gallium (like mipmap generation). Since wallpapering is
conceptually different -- wallpaper blits can be triggered by Gallium
blits -- the blitter pipes must be separate to avoid potential u_blitter
recursion.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Alyssa Rosenzweig 64b7bd3f90 panfrost: Sanity check layer
It doesn't make sense to try to render to multiple array elements at
once.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Alyssa Rosenzweig eb3c09716b panfrost: Divide array_size by 6 for cubemaps
Addresses the disparity between Mali and Gallium definitions of
array_size.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Alyssa Rosenzweig 65bc56b568 panfrost: Use get_texture_address for framebuffer computations
Allows for sharing some code as well as theoretically allowing cubemap
rendering.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Alyssa Rosenzweig 3609b50a64 panfrost: Merge AFBC slab with BO backing
Rather than tracking AFBC memory "specially", just use the same codepath
as linear and tiled. Less things to mess up, I figure. This allows us to
use the standard setup_slices() call with AFBC resources, allowing
mipmapped AFBC resources.

Unfortunately, we do have to disable AFBC (and checksumming) in the
meantime to avoid functional regressions, as we don't know _a priori_ if
we'll need to access a resource from software (which is not yet hooked
up with AFBC) and we don't yet have routines to switch the layout of a
BO at runtime.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Alyssa Rosenzweig aea3f0ac1d panfrost: Z/S can't be tiled
As far as we know, Utgard-style tiling only works for color render
targets, not depth/stencil, so ensure we don't try to tile it (rather
than compress or plain old linear) and drive ourselves into a corner.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Alyssa Rosenzweig ad56dd4e97 panfrost: Enable mipmapping
Now the autogeneration of mipmaps is working (via u_blitter), we can
finally enable mipmaps!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Alyssa Rosenzweig 5aeffa9517 panfrost: Enable blitting
Now that all the prerequisites breaking u_blitter are fixed, we can
finally hook up panfrost_blit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Alyssa Rosenzweig 06d192c742 panfrost: Allow texelFetch for wallpaper blits
We just implemented the routine; we may as well use it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Alyssa Rosenzweig f4bb7f096c panfrost/midgard: Implement texelFetch (2D only)
txf instructions can result from blits, so handle them rather than
crash. Only works for 2D textures (not even 2D array texture) due to a
register allocation constraint that may not be sorted for a while.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Alyssa Rosenzweig 4ac42f2b38 panfrost: Skip flushes only for wallpapers, not any blit
We need the flush from u_blitter for a normal blit (e.g. for mipmaps);
it's only wallpaper-related blits that are special-cased.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Alyssa Rosenzweig ffcc4d1c4e panfrost: Handle generate_mipmap ourselves
To avoid interference with the wallpaper code, we need to do some state
tracking when generating mipmaps. In particular, we need to mark the
generated layers as invalid before generating the mipmap, so we don't
try to backblit them if they already had content.

Likewise, we need to flush both before and after generating a mipmap
since our usual set_framebuffer_state flushing isn't quite there yet.
Ideally better optimizations would save the flush but I digress.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Alyssa Rosenzweig f57dfe4cdd panfrost: Disable mipmapping if necessary
If a mipfilter is not set, it's legal to have an incomplete mipmap; we
should handle this accordingly. An "easy way out" is to rig the LOD
clamps.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-25 13:39:17 -07:00
Kenneth Graunke 748e5dac72 intel/blorp: Disable sampler state prefetching on Gen11
Sampler state prefetching is broken on Gen11, and WA_160668216 says
to disable it.  Apparently sampler state prefetching also has basically
zero impact on performance, so we don't need to worry there.

i965, anv, and iris already handle this correctly, but we missed BLORP.
Ideally the kernel should globally disable this by writing SARCHKMD, at
which point we wouldn't have to worry about it.  But let's be defensive
and handle it ourselves too.

v2: separate out from BTP workaround in case we change that eventually

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com> [v1]
2019-06-25 13:29:31 -07:00
Jason Ekstrand 0a364a4a74 anv/descriptor_set: Only write texture swizzles if we have an image view
When immutable samplers are set we call write_image_view with a NULL
image view.  This causes issues on IVB where we have to fake texture
swizzling.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110999
Fixes: d2aa65eb18 "anv: Emulate texture swizzle in the shader when..."
2019-06-25 19:43:25 +00:00
Chia-I Wu 74786b3aa3 virgl: add VIRGL_DEBUG_XFER
When set, do as requested and skip any transfer optimization.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-By: Gert Wollny <gert.wollny@collabora.com>
Reviewed-By: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2019-06-25 12:01:45 -07:00
Chia-I Wu e93d918b65 virgl: add VIRGL_DEBUG_SYNC
When set, wait after every each flush.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-By: Gert Wollny <gert.wollny@collabora.com>
Reviewed-By: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2019-06-25 12:01:43 -07:00
Chia-I Wu 119b5701e1 virgl: fix the value of VIRGL_DEBUG_BGRA_DEST_SWIZZLE
VIRGL_DEBUG_BGRA_DEST_SWIZZLE should use bit 3.  Make some cosmetic
changes as well.

Fixes: a478e56fbd
    virgl: Add debug flag to bypass driconf to enable the BGRA tweaks

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-By: Gert Wollny <gert.wollny@collabora.com>
Reviewed-By: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2019-06-25 12:01:14 -07:00
Samuel Pitoiset 8ea7ee1536 radv: rename and re-document cache flush flags
SMEM and VMEM caches are L0 on gfx10. Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-25 18:38:37 +02:00
Samuel Pitoiset 5411f47056 radv: set DISABLE_CONSTANT_ENCODE_REG to 1 for Raven2
Ported from RadeonSI, will be emitted for GFX10 too.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-25 16:45:15 +02:00
Samuel Pitoiset 34bef8a0d7 radv: clear CMASK layers instead of the whole buffer on GFX8
This reduces the size of fill operations needed to clear CMASK
for layered color textures.

GFX9 unsupported for now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-25 16:36:28 +02:00
Samuel Pitoiset 476b907a3b radv: clear FMASK layers instead of the whole buffer on GFX8
This reduces the size of fill operations needed to clear FMASK
for layered color textures.

GFX9 unsupported for now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-25 16:36:25 +02:00
Samuel Pitoiset a5ba386b3f radv: always initialize levels without DCC as fully expanded
This fixes a rendering issue with RoTR/DXVK.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-25 16:36:23 +02:00
Sergii Romantsov 1931c97a1d i965: leaking of upload-BO with push constants
In case of any enabled VS members from: uses_firstvertex,
uses_baseinstance, uses_drawid, uses_is_indexed_draw
leaks may happens.
Call gen6_upload_push_constants allocates
stage_stat->push_const_bo. It than takes pointer from
push_const_bo to draw_params_bo (in the call
brw_prepare_shader_draw_parameters by brw_upload_data)
and do reference which finally haven't got unreferenced.

Fixes leak:
 136 bytes in 1 blocks are definitely lost in loss record 6 of 13
    at 0x4C31B25: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
    by 0xC2B64B7: bo_alloc_internal (brw_bufmgr.c:596)
    by 0xC2B6748: brw_bo_alloc (brw_bufmgr.c:672)
    by 0xC314BB3: brw_upload_space (intel_upload.c:88)
    by 0xC2EBBC5: gen6_upload_push_constants (gen6_constant_state.c:155)
    by 0xC9E4FA6: gen9_upload_vs_push_constants (genX_state_upload.c:3300)
    by 0xC2E0EDA: check_and_emit_atom (brw_state_upload.c:540)
    by 0xC2E0EDA: brw_upload_pipeline_state (brw_state_upload.c:659)
    by 0xC2E0FF1: brw_upload_render_state (brw_state_upload.c:681)
    by 0xC2C5D2D: brw_draw_single_prim (brw_draw.c:1052)
    by 0xC2C62CB: brw_draw_prims (brw_draw.c:1175)
    by 0xC488AD1: vbo_exec_vtx_flush (vbo_exec_draw.c:386)
    by 0xC485270: vbo_exec_FlushVertices_internal (vbo_exec_api.c:652)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
2019-06-25 12:26:25 +00:00
Juan A. Suarez Romero 81d28c69ea docs: update calendar, add news item and link release notes for X.Y.Z
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2019-06-25 13:02:37 +02:00
Juan A. Suarez Romero 2c06071521 docs: fix some typos in 19.0.7 release notes
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2019-06-25 13:01:56 +02:00
Juan A. Suarez Romero 4a2b502a6b docs: add sha256 checksums for 19.1.1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit d54dc24d6d6ad9ce4fbebd5f9a69a92633504c40)
2019-06-25 12:56:49 +02:00
Juan A. Suarez Romero 5f7c66676f docs: add release notes for 19.1.1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit 22eddd8b9d4d905237494c9841e65e4c073ab514)
2019-06-25 12:56:46 +02:00
Tapani Pälli 7a6e5a4bc3 intel/compiler: silence a warning of using different enum type
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-06-25 10:09:22 +03:00
Eric Engestrom e9286eb60b egl: replace dead vfunc with an error
st/egl used to support eglCreatePbufferFromClientBuffer, but now that
it's gone, any call to it would segfault.

Let's return a nice error instead.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-06-25 07:47:19 +01:00
Eric Engestrom eeacd66324 egl: delete unused vfuncs
Nobody ever uses these, so let's just hard code them instead.

If an EGL driver ever comes around that needs them they're trivial to
re-add.

Suggested-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-06-25 07:47:19 +01:00
Eric Engestrom 83f01f5261 egl: drop empty eglfallbacks.c
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-06-25 06:36:54 +00:00
Eric Engestrom 757d2fb48d egl: move eglGetSyncAttrib() fallback to eglapi.c
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-06-25 06:36:54 +00:00
Eric Engestrom 26d5ca44ba egl: move eglSwapInterval() fallback to eglapi.c
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-06-25 06:36:54 +00:00
Eric Engestrom 9dc00c8433 egl: move eglSurfaceAttrib() fallback to eglapi.c
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-06-25 06:36:54 +00:00
Eric Engestrom 58be9d50a7 egl: move eglQuerySurface() fallback to eglapi.c
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-06-25 06:36:54 +00:00
Eric Engestrom b792b3ebd7 egl: move eglQueryContext() fallback to eglapi.c
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-06-25 06:36:54 +00:00
Eric Engestrom 7f848f9713 egl: move eglGetConfigAttrib() fallback to eglapi.c
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-06-25 06:36:54 +00:00
Eric Engestrom 1b76cca40f egl: move eglChooseConfig() fallback to eglapi.c
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-06-25 06:36:53 +00:00
Eric Engestrom b883d7f567 egl: move eglGetConfigs() fallback to eglapi.c
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-06-25 06:36:53 +00:00
Rob Clark 927fb50727 freedreno/a5xx: fix batch leak in fd5 blitter path
Fixes: 3d198926a4 freedreno: use fd_bc_alloc_batch instead of fd_batch_create.
Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-06-24 18:43:20 -07:00
Marek Olšák 4a1421aa26 radeonsi: don't set spi_ps_input_* for monolithic shaders
The driver doesn't use these values and ac_rtld has assertions
expecting the value of 0.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-24 21:04:10 -04:00
Marek Olšák 1d6e358c36 radeonsi: rename and re-document cache flush flags
SMEM and VMEM caches are L0 on gfx10.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-24 21:04:10 -04:00
Marek Olšák aa8d6e0507 radeonsi: fix AMD_DEBUG=nofmask
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-24 21:04:10 -04:00
Marek Olšák f46efacd01 radeonsi: flatten the switch for DPBB tunables
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2019-06-24 21:04:10 -04:00
Marek Olšák ac4b1e2f0a radeonsi: set the calling convention for inlined function calls
otherwise the behavior is undefined

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2019-06-24 21:04:10 -04:00