Commit Graph

153913 Commits

Author SHA1 Message Date
Jason Ekstrand d783f8949e panvk: Implement descriptor copies properly
All we were doing was copying panvk_descriptor structs around which
don't actually contain data that's used by anything interesting.  We
need to copy the actual data arround.  Annoyingly, that means we need a
descriptor copy function per descriptor type.  Woo!

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand f6268220c2 panvk: Set immutable samplers properly up-front
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand 935fd18bc3 panvk: Rewrite the write portion of vkUpdateDescriptorSets
The new design is based on the ANV code which I massively cleaned up
some time ago.  Each descriptor type has a write function and they have
consistent prototypes.  This makes it all much easier to read and figure
out what's going on.  It also makes it easier to make changes going
forward because you aren't re-plumbing function arguments if you ever
change the type of data in any given descriptor type.  You just change
the write function.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand 53f53b577f panvk: Re-arrange descriptor set functions
Put them in the order we call them which is also roughly descriptor type
enum order.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand 28333e039c FIXUP: Use 16-bit things for texture sizes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand 38a0742f6a panvk: Implement texture/image queries
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand 714e125ae4 pavnk: Pass bind layouts to texture and image descriptor helpers
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand 6ed298dce7 panvk: Add an elems field to panvk_buffer_view
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand 6621ab8bf9 panvk: Advertise VK_KHR_variable_pointers
Now that our SSBO descriptor handling code no longer craws deref chains
back to the variable, we should be handling variable pointers properly.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand d9f9955f9e panvk: Enable robustBufferAccess
It should already work for UBOs.  This should do everything we need for
SSBOs.  Not sure about vertex and index buffers but we can deal with
those later.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand 6899cd2b6e vulkan: Start collecting enabled features in vk_device
We're not trying to make this 100% complete.  For now, all we care about
is robustBufferAccess.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand a463c58e22 panvk: Put SSBO addresses in the descriptor buffer
Instead of storing SSBO pointers in the very limited sysval space, store
them in the UBO we've attached to the descriptor set.  This gives us a
virtually unlimited number of SSBOs.  Dynamic SSBOs still live in the
sysval space so we can update them as part of vkCmdBindDescriptorSets().
Also, the new code (based on the code in ANV) loads those SSBO addresses
in a way that never chases the deref chain back to the variable so we
should now be able to handle all of variable pointers.  The code as
written in this patch is a bit overly generic because it switches on
address modes a bit more than panvk needs but we ended up needing all
that flexibility in ANV so we may as well leave hooks for it in panvk.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand e265583ee1 panvk: Interleave UBOs with multiple descriptor sets
The original intention was to put all the non-dynamic UBOs first
followed by all the dynamic ones.  However, we got the calculations
wrong and, once you went above one descriptor set, things start stomping
each other.

Also, the whole strategy is a bit busted.  Vulkan pipeline layout
compatability rules say that it's ok to create a pipeline with one
layout and then bind with another so long as the bottom N descriptor set
layouts match and the pipeline uses at most N descriptors.  This means
that, while it's safe to have each subsequent set add onto a given pool
of descriptors, if you're going to combine two of those pools, you need
to be careful that the position of descriptors in set N only depends on
the layouts of sets M <= N.  The easy way to do this is to interleve
where we do the UBOs for set 0 then dynamic for set 0 then UBOs for set
1 then dynamic for set 1, etc.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand 6d15d65e19 panvk: Put the sysval and push const UBOs at fixed indices
In theory, this may cost us a tiny bit of descriptor space but in
practice, given that the viewport transform is a sysval, we'll always
need it for 3D and given that SSBO pointers live there, we'll basically
always need it for compute.  It also makes a lot of things simpler.
We're about to start using the sysval UBO directly in our descriptor set
code and knowing the index up-front is really nice.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand 744b977963 panvk: Stop calling lower_uniforms_to_ubo
We don't need it because Vulkan doesn't have GL-style uniforms.  It
*shouldn't* be doing anything but sometimes it inserts an extra UBO
binding and adds 1 to all our UBO indices for no good reason.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand c32ddb5e77 panvk: Use a flat sysvals struct
PanVK uses fewer sysvals than the GLES driver, as some data that would
be a data in GLES is instead part of the descriptor set or the pipeline
state in Vulkan. Therefore, it is simpler and more efficient to use a
flat, fixed layout provided by the driver for our sysvals, rather than
the compiler choosing a layout.

This commit switches to a flat sysval layout.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand e6091cc578 panvk: Get rid of the per-pipeline sysvals BO
This is a micro-optimization and probably not a correct one at that.
The cost involved in re-uploading the viewport is tiny compared to the
mental overhead from trying to do this juggle.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand f0a47d8602 bifrost,midgard: Allow providing a fixed sysval layout
Vulkan doesn't need nearly as many system values and would like to bake
its layout up-front instead of having it provided by the back-end
compiler.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand e07a296398 panfrost: Add some sanity checking for sysvals
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:15 +00:00
Jason Ekstrand 4e60f0655a panfrost,panvk: Make fixed_sysval_ubo < 0 mean compiler-assigned
In 3559efb9bf ("panfrost: Allow passing an explicit UBO index for the
sysval UBO"), an explicit UBO index was added and it was implicitly
assumed that it would be > num_ubos.  This was convenient because it
meant 0, the default for designated initializers, implicitly meant
compiler-assigned.  However, we're about to move the sysval UBO to 0
which breaks this assumption.   Also, we don't want the back-end
compiler to even look at num_ubos since it's meaningless in Vulkan.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:15 +00:00
Jason Ekstrand 42aca84704 panvk: Add a buffer to each descriptor set
Later in the series, we will map descriptor sets to driver-internal
buffers bound as UBOs. These buffers will contain various internal data,
like buffer and texture sizes. Resource access will be lowered to pull
from this UBO in the shader. To prepare, create a backing buffer when
creating descriptor set and emit a UBO record so we can bind it.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:15 +00:00
Jason Ekstrand bcea5ed2b6 panvk: Break descriptor lowering into its own file
It's about to get a lot more complicated so let's split it out.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:15 +00:00
Jason Ekstrand 8af805a475 panvk: Move CreateDescriptorSetLayout to per-arch
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:15 +00:00
Jordan Justen ad565f6b70 intel/dev: Enable first set of DG2 PCI IDs
Mostly Matt Roper's kernel patch commit message:

The IDs added here are the subset reserved for 'motherboard down'
designs of DG2. We have all the necessary support upstream to enable
these now.

The remaining DG2 IDs for add-in cards will be enabled in a future
patch once some additional required functionality has fully landed.

Ref: https://patchwork.freedesktop.org/patch/msgid/20220425211251.77154-3-matthew.d.roper@intel.com
Cc: 22.1 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16449>
2022-05-12 03:03:57 -07:00
Jordan Justen 99354efe31 intel/dev: Add DG2 G12 PCI IDs
Ref: https://patchwork.freedesktop.org/patch/483381/?series=103098&rev=1
Ref: https://patchwork.freedesktop.org/patch/msgid/20220425211251.77154-3-matthew.d.roper@intel.com
Cc: 22.1 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16449>
2022-05-12 03:03:57 -07:00
Jordan Justen 4456209ce5 intel/dev: Add INTEL_PLATFORM_DG2_G12
Cc: 22.1 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16449>
2022-05-12 03:03:57 -07:00
Samuel Pitoiset c9c74efb02 radv/winsys: allow to use RADV_FORCE_FAMILY=gfx1100
The bare minimum to play with fossils.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16446>
2022-05-12 09:41:40 +00:00
Jason Volk 7a09499fa6 r600: Elide downloads for discarded and immutable compute memories.
Compute memory item demotion invokes a device to host transfer unconditionally,
but there are at least two cases where this is not necessary:

1. The item is mapped for discarding with PIPE_MAP_DISCARD_RANGE (e.g.
CL_MAP_WRITE_INVALIDATE_REGION).

2. The item cannot be written to by the device.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16116>
2022-05-12 08:25:52 +00:00
Jason Volk 12a485dbf9 r600: Improve compute memory pool performance; reduce fragmentation.
The compute memory pool forced a defragmentation (a left-packing relocation)
of items prior to promoting (adding) items to the tail end of the pool.

This patch instead makes an initial pass over the fragmented pool intent on
promoting items back to where they may have been recently demoted, filling
in the gaps first before conducting the defragmentation (if at all).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16117>
2022-05-12 08:15:19 +00:00
Jason Volk 6cc42bc0e7 r600: Fix userspace pointer support for evergreen compute.
Resources returned by r600_buffer_from_user_memory() are not compatible
with the evergreen compute memory pool, though they're added to it anyway.

This results in a segfault reproducible from Clover when the user passes
CL_MEM_USE_HOST_PTR.

This patch allows user_ptr resources to participate in the compute global
memory pool as intended. The result appears to finally allow for zero-copy
DMA out of userspace for anonymous pages.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16114>
2022-05-12 08:08:02 +00:00
Pierre-Eric Pelloux-Prayer db2fd0ca83 amd: fix ac_build_mbcnt_add in wave32 mode
add_src was ignored and i32_0 was always used.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 1e49018ced ("amd: Add extra source to the mbcnt_amd NIR intrinsic.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16427>
2022-05-12 07:46:04 +00:00
Pierre-Eric Pelloux-Prayer 1f31564607 radeonsi: don't use wave32 for GE on gfx10 if culling is used
This is a workaround for issue #6457: it fixes the rendering and
prevent the hang but I can't explain why.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6457
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16427>
2022-05-12 07:46:04 +00:00
Pierre-Eric Pelloux-Prayer f8d205c400 radeonsi: fix gs_invocation query with NGG
When NGG is active, the GS invocation counter is always incremented, even
if there's no explicit GS.

Implementing the counter manually fixes it:
  * in emit_gs_epilogue for the legacy path
  * in gfx10_ngg_gs_emit_prologue for the ngg path

This fixes piglit's arb_query_buffer_object-qbo test.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
2022-05-12 09:16:11 +02:00
Pierre-Eric Pelloux-Prayer 061f64f351 radeonsi/ngg: reuse the pipeline stats buffer when using atomics
To support PIPE_STAT_QUERY_GS_INVOCATIONS and PIPE_STAT_QUERY_GS_PRIMITIVES
being used at the same time we have to reuse the same buffer.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
2022-05-12 09:16:11 +02:00
Pierre-Eric Pelloux-Prayer 0cb6fd0b00 radeonsi/query: use the qbo correct size
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
2022-05-12 09:16:11 +02:00
Pierre-Eric Pelloux-Prayer 58004dfcc9 radeonsi/test: update sienna_cichlid results
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
2022-05-12 09:16:11 +02:00
Pierre-Eric Pelloux-Prayer 38e8a73e14 radeonsi: implement GL_GEOMETRY_SHADER_PRIMITIVES_EMITTED_ARB in shaders
Statistics only work in non-NGG mode. If screen->use_ngg is true, we can't
know if the draw will actually use NGG or not, so this commit switch
to a shader based implementation of this counter.

To avoid modifying si_query, the shader implementation behaves like the hw
one: it uses the same buffer size and offset.

The emulation path activation in the shader is controlled by vs_state_bit[31].

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
2022-05-12 09:16:11 +02:00
Pierre-Eric Pelloux-Prayer bbaf4f1954 radeonsi: store the pipeline stats index
Will be used in later commits.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
2022-05-12 09:16:11 +02:00
Pierre-Eric Pelloux-Prayer 637f09f10e radeonsi: deduplicate query offsets
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
2022-05-12 09:16:11 +02:00
Pierre-Eric Pelloux-Prayer 7f4ee4afab gallium: deduplicate target -> stats index code
Now that target_to_index returns the correct index for
PIPE_QUERY_PIPELINE_STATISTICS we can use it in store_query_result instead
of duplicating the switch statement.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
2022-05-12 09:16:11 +02:00
Pierre-Eric Pelloux-Prayer 3402c435f9 gallium: always return the correct pipeline stats index
Drivers with PIPE_CAP_QUERY_PIPELINE_STATISTICS_SINGLE = 0 shouldn't care
about the value of index, but radeonsi actually needs it in some situations.

So return the correct index instead of 0.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
2022-05-12 09:16:10 +02:00
Pierre-Eric Pelloux-Prayer 9918a9a990 gallium: add a union to access queries counters
This allows to loop over counters easily.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
2022-05-12 09:16:10 +02:00
Pierre-Eric Pelloux-Prayer d3a5f411a3 radeonsi: implement pipeline stats workaround
DISABLE_INSTANCE_PACKING needs to be enabled when stats queries are
active to fix incorrect results.

We need to emit this for indexed and non-indexed draws.

Based on PAL's waDisableInstancePacking.

This fixes:
  KHR-GL46.pipeline_statistics_query_tests_ARB.functional_primitives_vertices_submitted_and_clipping_input_output_primitives

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
2022-05-12 09:16:10 +02:00
Pierre-Eric Pelloux-Prayer 283730f368 radeonsi: flush VGT streamout like PAL
Ported from 165b016bbe.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
2022-05-12 09:16:10 +02:00
Mike Blumenkrantz 1126f42781 zink: fix sparse texture depth calcs for arrayed textures
use the array, not the depth

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16456>
2022-05-12 03:40:04 +00:00
Mike Blumenkrantz 452a028fc2 zink: remove misleading sparse comment
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16456>
2022-05-12 03:40:04 +00:00
Mike Blumenkrantz 56979182dd zink: set sparse flag in cubemap lowering
Fixes: 2d745904ca ("zink: add a gently mangled version of the d3d12 cubemap -> array compiler pass")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16456>
2022-05-12 03:40:04 +00:00
Mike Blumenkrantz 377f5e7af9 zink: fix sparse binding for arrayed textures
this needs to set the arrayLayer, not the z offset

big thanks to Piers Daniell for catching this

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16456>
2022-05-12 03:40:04 +00:00
Mike Blumenkrantz 63dc39ac90 zink: clamp out min_lod operands for explicit lod ops
this is illegal (and nonsensical)

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16456>
2022-05-12 03:40:04 +00:00
Mike Blumenkrantz 88912b3111 zink: fix up sparse texture sampling for shadow samplers
the problem here is that this returns a vec2 instead of a vec5, which
throws all the existing calculations off

given that the shader is (still) expecting a vec2 return from this,
and there's no way to sanely rewrite with nir to be valid for both
sampler types as well as spirv translation, just pad out to a vec2
here and be done with it

Fixes: 73ef54e342 ("zink: handle residency return value from sparse texture instructions")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16456>
2022-05-12 03:40:04 +00:00