Commit Graph

64132 Commits

Author SHA1 Message Date
Rob Clark 694beb8b83 freedreno/ir3: introduce ir3_compiler object
Right now, just provides a cleaner way to get at the gpu-id, given the
separation between compiler and context.  But we will need this also to
hold the reg-set for new register allocation.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:53:50 -04:00
Rob Clark 5c1e153467 freedreno/ir3: dump nocp option
No longer used, or even possible, with NIR frontend.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:53:43 -04:00
Rob Clark 7674ab12e8 freedreno/ir3: silence warnings
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:53:35 -04:00
Rob Clark 0f6faa8ff3 freedreno/ir3: remove tgsi f/e
Also remove ir3_flatten which was only used by tgsi f/e.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:53:25 -04:00
Rob Clark 7273cb4e93 freedreno/ir3/sched: convert to priority queue
Use a more standard priority-queue based scheduling algo.  It is simpler
and will make things easier once we have multiple basic blocks and flow
control.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:53:17 -04:00
Rob Clark adf1659ff5 freedreno/ir3: use standard list implementation
Use standard list_head double-linked list and related iterators,
helpers, etc, rather than weird combo of instruction array and next
pointers depending on stage.  Now block has an instrs_list.  In
certain stages where we want to remove and re-add to the blocks list
we just use list_replace() to copy the list to a new list_head.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:53:09 -04:00
Rob Clark 67d994c676 freedreno/ir3: drop dot graph dumping
At least for now.. right now the instruction and instruction list
printing should suffice, and the re-working of ir3_block would require
a lot of changes in that code.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:52:58 -04:00
Rob Clark 5c8c2e2f97 freedreno/ir3: more builder helpers
Use ir3_MOV() builder in a couple of spots, rather than open-coding the
instruction construction.  Also add ir3_NOP() builder and use that
instead of open coding.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:52:41 -04:00
Rob Clark b33015f889 gallium/ttn: add missing SNE
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-21 07:52:36 -04:00
Rob Clark c79b2e626c util/list: add list_first/last_entry
I need an easier way to get at head/tail in ir3.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:52:36 -04:00
Rob Clark b3d2e36716 gallium/ttn: add texture-type support
v2: rebased on using SVIEW to hold type information

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-21 07:52:29 -04:00
Rob Clark cb258c1dec glsl_to_tgsi: add SVIEW decl support
Freedreno needs sampler type information to deal with int/uint textures.
To accomplish this, start creating sampler-view declarations, as
suggested here:

 http://lists.freedesktop.org/archives/mesa-dev/2014-November/071583.html

create a sampler-view with index matching the sampler, to encode the
texture type (ie. SINT/UINT/FLOAT).  Ie:

   DCL SVIEW[n], 2D, UINT
   DCL SAMP[n]
   TEX OUT[1], IN[1], SAMP[n]

For tgsi texture instructions which do not take an explicit SVIEW
argument, the SVIEW index is implied by the SAMP index.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-21 07:52:22 -04:00
Rob Clark 93379748f7 util/blitter (and friends): generate appropriate SVIEW decls
Some hardware needs to know the sampler type.  Update the blit related
shaders to include SVIEW decl.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-21 07:52:16 -04:00
Rob Clark e536992986 util/pstipple: updates for SVIEW decls
To allow for shaders which use SVIEW decls for TEX* instructions, we
need to preserve the constraint that the shader either has no SVIEW's or
it has one matching SVIEW for each SAMP.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-21 07:52:12 -04:00
Rob Clark b516e68afb draw: updates to support SVIEW decls
To allow for shaders which use SVIEW decls for TEX* instructions, we
need to preserve the constraint that the shader either has no SVIEW's or
it has one matching SVIEW for each SAMP.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-21 07:52:07 -04:00
Rob Clark f481af110e tgsi/transform: add support for SVIEW decls
TODO single return_type (use enum)

v2: single return_type arg, and use enum

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-21 07:52:02 -04:00
Rob Clark b13135e066 tgsi: update docs for SVIEW usage with TEX* instructions
Based on mailing list discussion here:

http://lists.freedesktop.org/archives/mesa-dev/2014-November/071583.html

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-21 07:51:53 -04:00
Eric Anholt 717376155d mesa: Back out an accidental change I had in a VC4 commit.
This was a hack as part of debugging some glamor-on-GLES2 behavior that
ended up being an xserver bug.  I suspect we can just flip this extension
on for GLES2, but the spec says it requires 3.1.
2015-06-20 15:04:17 -07:00
Eric Anholt c009038674 vc4: Use a defined t value for 1D textures.
This doesn't fix the broken 1D cases of texsubimage, but it does prevent
segfaulting when dumping the QIR code generated in fbo-1d.
2015-06-20 00:16:32 -07:00
Eric Anholt bb107110a4 vc4: Fix write-only texsubimage when we had to align.
We need to make sure that when we store the aligned box, we've got
initialized contents in the border.  We could potentially just load the
border area, but for now let's get text rendering working in X (and fix
the GL_TEXTURE_2D errors in piglit's texsubimage test and
gl-2.1-pbo/test_tex_image)
2015-06-20 00:16:32 -07:00
Chia-I Wu 028590cbc7 ilo: clean up header includes
Core is more self-contained now.
2015-06-20 11:20:12 +08:00
Chia-I Wu 244caba250 ilo: avoid ilo_ib_state in genX_3DPRIMITIVE()
ilo_ib_state is not in core.
2015-06-20 11:18:30 +08:00
Chia-I Wu dcb5bad3a3 ilo: move gen6_so_SURFACE_STATE() out of core
It does not belong to core.
2015-06-20 11:18:10 +08:00
Chia-I Wu e3372c4bfb ilo: add ilo_state_sol_buffer
It serves the same purpose as ilo_state_vertex_buffer does.
2015-06-20 11:18:09 +08:00
Chia-I Wu 9904e647cc ilo: add ilo_state_index_buffer
It serves the same purpose as ilo_state_vertex_buffer does.
2015-06-20 11:18:07 +08:00
Chia-I Wu da4878cb80 ilo: add ilo_state_vertex_buffer
Being a parameter-like state, we may want to get rid of
ilo_state_vertex_buffer_info or ilo_state_vertex_buffer eventually.  But we
want them now as they are how we do cross-validation right now.
2015-06-20 11:14:14 +08:00
Chia-I Wu 4555211028 ilo: add 3DSTATE_VF_INSTANCING to ilo_state_vf
3DSTATE_VF_INSTANCING specifies instancing enable and step rate.  They are
specified along with 3DSTATE_VERTEX_BUFFERS instead prior to Gen8.  Both
commands are added.
2015-06-20 11:14:14 +08:00
Chia-I Wu e8d297b7a1 ilo: add 3DSTATE_VF to ilo_state_vf
3DSTATE_VF specifies cut index enable and cut index.  Cut index enable is
specified in 3DSTATE_INDEX_BUFFER instead prior to Gen7.5.  Both commands are
added.
2015-06-20 11:14:14 +08:00
Chia-I Wu 7b3432b62d ilo: embed pipe_index_buffer in ilo_ib_state
Make it obvious that we save a copy of pipe_index_buffer.
2015-06-20 11:14:10 +08:00
Chia-I Wu 73f0d6d22d ilo: fix a buffer overrun
Add missing parentheses in SURFTYPE_NULL initialization.
2015-06-20 11:13:20 +08:00
Chia-I Wu aa3ec8bc46 ilo: fix a -Wmaybe-uninitialized warning
ilo_shader.c: In function ‘ilo_shader_select_kernel_sbe’:
ilo_shader.c:1140:27: warning: ‘src_skip’ may be used uninitialized in this
function [-Wmaybe-uninitialized]
2015-06-20 11:13:20 +08:00
Brian Paul a1f84453a2 glsl: fix formatting glitch in _mesa_print_ir()
Print the closing ) before the newline.  Trivial.
2015-06-19 16:46:29 -06:00
Ben Widawsky 7c3da3592e i965/gen8: Use HALIGN_16 for single sample mcs buffers
The original code meant to do this, but was only checking num_samples == 1 to
figure out if a surface was fast clear capable. However, we can allocate single
sample miptrees with num_samples == 0 (when it's an internally created buffer).

This fixes a bunch of the piglit tests on gen8. Other gens should have been
fine.

Here is the order of events that allowed this to slip through:
t0: I wrote halign patches and tested them. These alignment assertions are for
   gen8 fast clear surfaces, basically.
t1: I pushed bogus perf patch which made fast clears never happen
t2: Reworked halign patches based on Chad's feedback and introduced the bug this
   patch fixes.
t2.5: I tested reworked patches, but assertion wasn't hit because of t1.
t3. Matt fixed issue in t1 which made fast clears happen here:
commit 22af95af83
Author: Matt Turner <mattst88@gmail.com>
Date:   Thu Jun 18 16:14:50 2015 -0700

    i965: Add missing braces around if-statement.

This logic should match that of the v1 of my halign patch series.

Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Matt Turner <mattst88@gmail.com>
Reported-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: Mark Janes <mark.a.janes@intel.com>
2015-06-19 11:25:00 -07:00
Ilia Mirkin 539cb2b76e mesa: move ARB_gs5 enums to core, EXT_polygon_offset_clamp to desktop
When adding EXT_polygon_offset_clamp, I first made it core-only, and
never moved the enum getter back to the GL/GL_CORE section. Similarly,
ARB_gs5 is a core-only extension, so move its getters to the GL_CORE
section.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-19 14:11:27 -04:00
Brian Paul 6ec4e9c28d u_vbuf: fix src_offset alignment in u_vbuf_create_vertex_elements()
If the driver says PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY=1,
the driver should never receive a pipe_vertex_element::src_offset value
that's not a multiple of four.  But the vbuf code wasn't actually adjusting
the src_offset value when creating the vertex element state object.

We just need to align the src_offset values put in the driver_attribs[]
array.

See the piglit gl-1.5-vertex-buffer-offsets test.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-06-19 10:54:24 -06:00
Brian Paul c40f44cc99 gallium: whitespace, formatting clean-up in p_state.h
Remove trailing whitespace, move some braces, 78-column wrapping.
Trivial.
2015-06-19 08:45:00 -06:00
Brian Paul 4c11008eba st/wgl: fix WGL_SWAP_METHOD_ARB query
There are three possible return values (not two): WGL_SWAP_COPY_ARB,
WGL_SWAP_EXCHANGE_EXT and WGL_SWAP_UNDEFINED_ARB.

VMware bug 1431184

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul 73bdf4ba86 stw: use new stw_get_nop_function() function to avoid Viewperf 12 crashes
Also, print a warning if we do return NULL from wglGetProcAddress() to
help spot this sort of problem in the future.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul 8d005a643e stw: add some no-op functions for GL_EXT_dsa, GL_NV_half_float
Viewperf 12 calls wglGetProcAddress() to get pointers to some unsupported
DSA and half-float functions.  We return NULL but Viewperf doesn't check
for null before trying to jump through the pointer.  That causes a crash.

This patch adds no-op functions to call instead (used by the next patch).
This avoids the crash but the rendering is incorrect.

Some DSA functions are being added to Mesa at this time so we may be
able to remove some of these no-ops in the future.

More no-op functions may be added as needed.

VMware PR1383421

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-06-19 08:45:00 -06:00
Jose Fonseca eee9247018 st/wgl: Don't return core profile for 3.1 contexts.
WGL_CONTEXT_PROFILE_MASK_ARB doesn't apply to desktop OpenGL versions
less than 3.2 -- applications can't specify whether they want a core or
a compat 3.1 context -- instead they are supposed the check whether the
returned context advertises GL_ARB_compatibility extension.

Mesa doesn't support compatability contexts for version higher than 3.1,
so we used to return core profile context, but this makes several Windows
applications unhappy, because they just assume they got a compatability
context without checking.

So it seems safer to on Windows to never return core profile for 3.1,
ie, just fail the context creation.

VMware PR1365920.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul 528bd94432 st/wgl: set PIPE_BIND_SAMPLER_VIEW for window color buffers
To allow sampling from the surface for things like glCopyPixels
or glCopyTexSubImage.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul 9405c1b3b0 st/wgl: add support for multisample pixel formats
Create pixel formats with 0, 4, 8 and 16 samples per pixel.
Add a SVGA_FORCE_MSAA env var to force creating all pixel formats
with a particular sample count.  This is useful for testing Mesa/GLUT/
etc. programs which don't ordinarily use multisample.

Reviewed-by: Matthew McClure <mcclurem@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul 0925e5f5bc st/wgl: respect sample count when creating framebuffer surfaces
Use the visual/pixel format's sample count instead of zero.

Reviewed-by: Matthew McClure <mcclurem@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul b8249de646 st/wgl: fix WGL_SAMPLE_BUFFERS_ARB query
Only report 1 for WGL_SAMPLE_BUFFERS_ARB if the number of samples
per pixel > 1.

Reviewed-by: Matthew McClure <mcclurem@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul 5ad5d44af5 tgsi: add comments for ureg_emit_label() 2015-06-19 08:45:00 -06:00
Brian Paul 12c1c0706d tgsi: new comments, assertion for executing TGSI_OPCODE_CAL 2015-06-19 08:45:00 -06:00
Jose Fonseca afeb922206 llvmpipe: Truncate the binned constants to max const buffer size.
Tested with Ilia Mirkin's gzdoom.trace and
"arb_uniform_buffer_object-maxuniformblocksize fsexceed" piglit test
without my earlier fix to fail linkage when UBO exceeds
GL_MAX_UNIFORM_BLOCK_SIZE.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-06-19 07:21:06 +01:00
Jose Fonseca f734d25560 glsl: Fail linkage when UBO exceeds GL_MAX_UNIFORM_BLOCK_SIZE.
It's not totally clear whether other Mesa drivers can safely cope with
over-sized UBOs, but at least for llvmpipe receiving a UBO larger than
its limit causes problems, as it won't fit into its internal display
lists.

This fixes piglit "arb_uniform_buffer_object-maxuniformblocksize
fsexceed" without regressions for llvmpipe.

NVIDIA driver also fails to link the shader from
"arb_uniform_buffer_object-maxuniformblocksize fsexceed".

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65525

PS: I don't recommend cherry-picking this for Mesa stable, as some app
might inadvertently been relying on UBOs larger than
GL_MAX_UNIFORM_BLOCK_SIZE to work on other drivers, so even if this
commit is universally accepted it's probably best to let it mature in
master for a while.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-06-19 07:21:05 +01:00
Ilia Mirkin 5974841fd0 glsl: guard gl_NumSamples enablement on ARB_sample_shading
gl_NumSamples should only be enabled when ARB_sample_shading is enabled.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-06-18 20:40:22 -04:00
Matt Turner 22af95af83 i965: Add missing braces around if-statement.
Fixes a performance problem caused by commit b639ed2f.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90895
2015-06-18 16:45:55 -07:00