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freedreno/ir3: more builder helpers 

Use ir3_MOV() builder in a couple of spots, rather than open-coding the
instruction construction.  Also add ir3_NOP() builder and use that
instead of open coding.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
This commit is contained in:
Rob Clark 2015-04-25 11:05:27 -04:00
parent b33015f889
commit 5c8c2e2f97
4 changed files with 16 additions and 21 deletions
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6
src/gallium/drivers/freedreno/ir3/ir3.h
View File

@ -807,6 +807,12 @@ ir3_COV(struct ir3_block *block, struct ir3_instruction *src,
return instr;
}
static inline struct ir3_instruction *
ir3_NOP(struct ir3_block *block)
{
return ir3_instr_create(block, 0, OPC_NOP);
}
#define INSTR1(CAT, name) \
static inline struct ir3_instruction * \
ir3_##name(struct ir3_block *block, \

23
src/gallium/drivers/freedreno/ir3/ir3_group.c
View File

@ -50,19 +50,6 @@ static bool check_stop(struct ir3_instruction *instr)
return false;
}
static struct ir3_instruction * create_mov(struct ir3_instruction *instr)
{
struct ir3_instruction *mov;
mov = ir3_instr_create(instr->block, 1, 0);
mov->cat1.src_type = TYPE_F32;
mov->cat1.dst_type = TYPE_F32;
ir3_reg_create(mov, 0, 0); /* dst */
ir3_reg_create(mov, 0, IR3_REG_SSA)->instr = instr;
return mov;
}
/* bleh.. we need to do the same group_n() thing for both inputs/outputs
* (where we have a simple instr[] array), and fanin nodes (where we have
* an extra indirection via reg->instr).
@ -78,7 +65,8 @@ static struct ir3_instruction *arr_get(void *arr, int idx)
}
static void arr_insert_mov_out(void *arr, int idx, struct ir3_instruction *instr)
{
((struct ir3_instruction **)arr)[idx] = create_mov(instr);
((struct ir3_instruction **)arr)[idx] =
ir3_MOV(instr->block, instr, TYPE_F32);
}
static void arr_insert_mov_in(void *arr, int idx, struct ir3_instruction *instr)
{
@ -113,7 +101,8 @@ static struct ir3_instruction *instr_get(void *arr, int idx)
}
static void instr_insert_mov(void *arr, int idx, struct ir3_instruction *instr)
{
((struct ir3_instruction *)arr)->regs[idx+1]->instr = create_mov(instr);
((struct ir3_instruction *)arr)->regs[idx+1]->instr =
ir3_MOV(instr->block, instr, TYPE_F32);
}
static struct group_ops instr_ops = { instr_get, instr_insert_mov };
@ -210,8 +199,8 @@ static void pad_and_group_input(struct ir3_instruction **input, unsigned n)
if (instr) {
block = instr->block;
} else if (block) {
instr = ir3_instr_create(block, 0, OPC_NOP);
ir3_reg_create(instr, 0, IR3_REG_SSA); /* dst */
instr = ir3_NOP(block);
ir3_reg_create(instr, 0, IR3_REG_SSA); /* dummy dst */
input[i] = instr;
mask |= (1 << i);
}

4
src/gallium/drivers/freedreno/ir3/ir3_legalize.c
View File

@ -134,14 +134,14 @@ static void legalize(struct ir3_legalize_ctx *ctx)
*/
if ((n->flags & IR3_INSTR_SS) && (n->category >= 5)) {
struct ir3_instruction *nop;
nop = ir3_instr_create(block, 0, OPC_NOP);
nop = ir3_NOP(block);
nop->flags |= IR3_INSTR_SS;
n->flags &= ~IR3_INSTR_SS;
}
/* need to be able to set (ss) on first instruction: */
if ((shader->instrs_count == 0) && (n->category >= 5))
ir3_instr_create(block, 0, OPC_NOP);
ir3_NOP(block);
if (is_nop(n) && shader->instrs_count) {
struct ir3_instruction *last =

4
src/gallium/drivers/freedreno/ir3/ir3_sched.c
View File

@ -125,7 +125,7 @@ static void schedule(struct ir3_sched_ctx *ctx,
* scheduling and depth calculation..
*/
if (ctx->scheduled && is_sfu_or_mem(ctx->scheduled) && is_sfu_or_mem(instr))
schedule(ctx, ir3_instr_create(block, 0, OPC_NOP), false);
schedule(ctx, ir3_NOP(block), false);
/* remove from depth list:
*/
@ -453,7 +453,7 @@ static void block_sched(struct ir3_sched_ctx *ctx, struct ir3_block *block)
* then it is time for nop's:
*/
while (cnt > ctx->cnt)
schedule(ctx, ir3_instr_create(block, 0, OPC_NOP), false);
schedule(ctx, ir3_NOP(block), false);
}
/* at this point, scheduled list is in reverse order, so fix that: */