Commit Graph

100646 Commits

Author SHA1 Message Date
Bas Nieuwenhuizen 26261847cf turnip: Fill command buffer 2019-03-11 10:01:41 -07:00
Bas Nieuwenhuizen abe352525d turnip: Implement submission. 2019-03-11 10:01:41 -07:00
Bas Nieuwenhuizen abf0792bbe turnip: Make bo_list functions not static 2019-03-11 10:01:41 -07:00
Bas Nieuwenhuizen 65e0e79054 turnip: Add msm queue support. 2019-03-11 10:01:41 -07:00
Bas Nieuwenhuizen 8713499657 turnip: Add a command stream. 2019-03-11 10:01:41 -07:00
Bas Nieuwenhuizen e3a9b07923 turnip: Implement a slow bo list 2019-03-11 10:01:41 -07:00
Bas Nieuwenhuizen 48b65201a6 turnip: Implement some UUIDs. 2019-03-11 10:01:41 -07:00
Bas Nieuwenhuizen 7ae005f037 turnip: clean up TODO.
./deqp-vk -n dEQP-VK.info.*
Writing test log into TestResults.qpa
dEQP Core unknown (0xcafebabe) starting..
  target implementation = 'Surfaceless'
WARNING: tu is not a conformant vulkan implementation, testing use only.
WARNING: tu is not a conformant vulkan implementation, testing use only.

Test case 'dEQP-VK.info.build'..
  Pass (Not validated)

Test case 'dEQP-VK.info.device'..
  Pass (Not validated)

Test case 'dEQP-VK.info.platform'..
  Pass (Not validated)

Test case 'dEQP-VK.info.memory_limits'..
  Pass (Pass)

DONE!

Test run totals:
  Passed:        4/4 (100.0%)
  Failed:        0/4 (0.0%)
  Not supported: 0/4 (0.0%)
  Warnings:      0/4 (0.0%)
2019-03-11 10:01:41 -07:00
Bas Nieuwenhuizen 06602bf77f turnip: Remove some radv leftovers. 2019-03-11 10:01:41 -07:00
Bas Nieuwenhuizen c72e6085e7 turnip: Implement some format properties for RGBA8.
Just to get some tests to not skip. This is neither complete
nor completely correct.
2019-03-11 10:01:41 -07:00
Chia-I Wu d30baaaba6 turnip: add .clang-format
Add and apply .clang-format.
2019-03-11 10:01:41 -07:00
Bas Nieuwenhuizen 6401ad389e turnip: Implement pipe-less param query. 2019-03-11 10:01:41 -07:00
Bas Nieuwenhuizen b0562e272f turnip: move tu_gem.c to tu_drm.c 2019-03-11 10:01:41 -07:00
Bas Nieuwenhuizen 3d99dd55a0 turnip: Stop hardcoding the msm version check. 2019-03-11 10:01:41 -07:00
Bas Nieuwenhuizen d9c3dc8ec8 turnip: Add image layout calculations. 2019-03-11 10:01:41 -07:00
Bas Nieuwenhuizen 603354cffa turnip: Fix memory mapping. 2019-03-11 10:01:41 -07:00
Bas Nieuwenhuizen 426f6e46a8 turnip: Fix bo allocation after we stopped using libdrm_freedreno ...
Al this figuring out new errors is why I don't like reinventing the
wheel.
2019-03-11 10:01:41 -07:00
Bas Nieuwenhuizen f0a24e123f turnip: Add 630 to the list. 2019-03-11 10:01:41 -07:00
Chad Versace c3b5eea2cc turnip: Don't return from tu_stub funcs
Since the macros are lowercase and look like normal functions, that they
change control flow with a hidden return is surprising.
2019-03-11 10:01:41 -07:00
Chad Versace bf709dfe3f turnip: Fix 'unused' warnings
Now turnip builds without warnings on my machine.
2019-03-11 10:01:41 -07:00
Chad Versace 471f2d8409 turnip: Add TODO file 2019-03-11 10:01:41 -07:00
Chad Versace 359e9016c5 turnip: Replace fd_bo with tu_bo
(olv, after rebase) remove inc_drm_uapi
2019-03-11 10:01:33 -07:00
Chad Versace eb16ec715f turnip: Use vk_errorf() for initialization error messages
This small cleanup better prepares turnip for VK_EXT_debug_report.
2019-03-11 10:01:33 -07:00
Chad Versace 1372c95ad2 turnip: Add TODO for Android logging 2019-03-11 10:01:33 -07:00
Chad Versace cca208a033 turnip: Require DRM device version >= 1.3
Because the driver will require support for iova.
2019-03-11 10:01:33 -07:00
Chad Versace 5486943ed9 turnip: Fix indentation 2019-03-11 10:01:33 -07:00
Chad Versace 99a5de14cb turnip: Fix a real -Wmaybe-uninitialized 2019-03-11 10:01:33 -07:00
Chad Versace 75f2c8458b turnip: Use vk_outarray in all relevant public functions 2019-03-11 10:01:33 -07:00
Chad Versace 3ec87d56bd turnip: Fix result of vkEnumerate*ExtensionProperties
Given an unsupported layer name, the functions must return
VK_ERROR_LAYER_NOT_PRESENT.
2019-03-11 10:01:33 -07:00
Chad Versace ee835c7790 turnip: Fix result of vkEnumerate*LayerProperties
The functions must not return VK_ERROR_LAYER_NOT_PRESENT. The spec
reserves that error for vkEnumerate*ExtensionProperties.
2019-03-11 10:01:33 -07:00
Chad Versace daffb01704 turnip: Fix indentation in function signatures
Due to s/anv/tu/, in many function signatures the indentation of
parameters was off-by-one.
2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen b4f3e0d549 turnip: Disable more features. 2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen a01edd9c86 turnip: Initialize memory type in requirements. 2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen 7be2e1fc37 turnip: Cargo cult the Intel heap size functionality. 2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen 462b693d94 turnip: Report a memory type and heap. 2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen 8e52e8183c turnip: Add buffer allocation & mapping support. 2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen a0d62e4337 turnip: Fix newly introduced warning. 2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen bcd15ab34e turnip: Remove abort. 2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen 13ff7ffbcb turnip: Gather some device info. 2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen 7922d50bd4 turnip: Fix up detection of device. 2019-03-11 10:01:33 -07:00
Chad Versace c63cb15745 turnip: Drop Makefile.am and Android.mk
The Makefile.am doesn't work. I tried fixing it but gave up because
I don't understand Autotools. I strongly suspect the Android.mk also
doesn't work.

Rather than maintain the broken build files, let's delete them and
re-add working build files if-and-when we need them. (Maybe we'll be
lucky and turnip will never need to support Autotools!).
2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen 26380b3a9f turnip: Add driver skeleton (v2)
meson files have been updated, autotools and android still need
updating.

Only build tested.

v2 (chadv):
  - Rebase onto master.
  - Fix build breakage in Python scripts.
  - Drop the WSI code. The internal WSI apis have changed recently, and
    will likely change again before the driver goes upstream. To avoid
    unnecessary rebase work, let's drop the WSI code and re-add it when
    we're ready to really use WSI.

(olv, after rebase) do not enable freedreno by default on ARM
2019-03-11 10:01:15 -07:00
Connor Abbott d086d16b81 nir/serialize: Prevent writing uninitialized state_slot data
The nir_state_slot struct had some padding that was never initialized.
Serializing the individual parts of the struct is more robust and avoids
the overhead of zeroing it at creation, so just do that.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-11 15:17:41 +01:00
Tapani Pälli 47fc359822 anv: release memory allocated by glsl types during spirv_to_nir
Fixes leaks for each glsl_type generated:

  ==32470== 384 bytes in 3 blocks are possibly lost in loss record 18 of 18
  ==32470==    at 0x483880B: malloc (vg_replace_malloc.c:309)
  ==32470==    by 0x4C43F4A: ralloc_size (ralloc.c:119)
  ==32470==    by 0x4C44014: rzalloc_size (ralloc.c:151)
  ==32470==    by 0x4C44258: rzalloc_array_size (ralloc.c:215)
  ==32470==    by 0x4D38957: glsl_type::glsl_type(glsl_struct_field const*, unsigned int, char const*) (glsl_types.cpp:114)
  ==32470==    by 0x4D3BEED: glsl_type::get_struct_instance(glsl_struct_field const*, unsigned int, char const*) (glsl_types.cpp:1146)
  ==32470==    by 0x4D42ECC: glsl_struct_type (nir_types.cpp:501)
  ==32470==    by 0x4CDB5A1: vtn_handle_type (spirv_to_nir.c:1269)
  ==32470==    by 0x4CE53DD: vtn_handle_variable_or_type_instruction (spirv_to_nir.c:4018)
  ==32470==    by 0x4CD8CFF: vtn_foreach_instruction (spirv_to_nir.c:365)
  ==32470==    by 0x4CE5E6B: spirv_to_nir (spirv_to_nir.c:4490)
  ==32470==    by 0x497AF10: anv_shader_compile_to_nir (anv_pipeline.c:173)

v2: move release call to vkDestroyInstance

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-11 13:14:45 +02:00
Eric Engestrom f9a6460bbf wsi/x11: use WSI_FROM_HANDLE() instead of pointer casts
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-03-11 10:49:36 +00:00
Eric Engestrom f2e24dd81d wsi/wayland: fix pointer casting warning on 32bit
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-03-11 10:49:36 +00:00
Eric Engestrom 687babc045 wsi/display: s/#if/#ifdef/ to fix -Wundef
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-03-11 10:49:36 +00:00
Eric Engestrom 1ee01d91c7 wsi: deduplicate get_current_time() functions between display and x11
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-03-11 10:49:36 +00:00
Tapani Pälli 7bb34ecff9 anv: release memory allocated by bo_heap when descriptor pool is destroyed
Fixes following leak:

   ==21853== 32 bytes in 1 blocks are definitely lost in loss record 2 of 20
   ==21853==    at 0x483AB1A: calloc (vg_replace_malloc.c:762)
   ==21853==    by 0x4C4DD7F: util_vma_heap_free (vma.c:221)
   ==21853==    by 0x4C4D647: util_vma_heap_init (vma.c:46)
   ==21853==    by 0x4957B9F: anv_CreateDescriptorPool (anv_descriptor_set.c:578)

Fixes: c520f4dec9 ("anv: Add a concept of a descriptor buffer")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-11 08:13:27 +02:00
Tapani Pälli 105002bd2d anv: destroy descriptor sets when pool gets destroyed
Patch maintains a list of sets in the pool and destroys possible
remaining sets when pool is destroyed.

As stated in Vulkan spec:
   "When a pool is destroyed, all descriptor sets allocated from
    the pool are implicitly freed and become invalid."

This fixes memory leaks spotted with valgrind:

   ==19622== 96 bytes in 1 blocks are definitely lost in loss record 2 of 3
   ==19622==    at 0x483880B: malloc (vg_replace_malloc.c:309)
   ==19622==    by 0x495B67E: default_alloc_func (anv_device.c:547)
   ==19622==    by 0x4955E05: vk_alloc (vk_alloc.h:36)
   ==19622==    by 0x4956A8F: anv_multialloc_alloc (anv_private.h:538)
   ==19622==    by 0x4956A8F: anv_CreateDescriptorSetLayout (anv_descriptor_set.c:217)

Fixes: 14f6275c92 ("anv/descriptor_set: add reference counting for descriptor set layouts")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-11 08:13:01 +02:00
Timothy Arceri 051b4064da anv: add support for dumping shader info via VK_EXT_debug_report
This information will be used by the vkpipeline-db tool.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-11 16:16:04 +11:00
Kenneth Graunke f36794d1f0 iris: Fix backface stencil write condition
A bit too much search and replace here.
2019-03-10 14:52:53 -07:00
Alyssa Rosenzweig ea2cd73625 panfrost/drm: Cast pointer to u64 to fix warning
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-03-10 19:16:56 +00:00
Tomeu Vizoso 756f7b9989 panfrost: Add backend targeting the DRM driver
This backend interacts with the new DRM driver for Midgard GPUs which is
currently in development.

When using this backend, Panfrost has roughly on-par functionality as
when using the non-DRM driver from Arm.

Alyssa Rosenzweig: To do so, we implement additional routines for
runtime GPU version detection and fencing. We cleanup some duplicate
code interfering with the new driver. We fix a long-standing memory leak
which is aggravated on the new driver. Finally, we implement BO
import/export in a way compatible with the new driver. These changes are
squashed to preserve bisectability given the hard-to-track ABI shifts in
the nondrm module

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-03-10 19:09:23 +00:00
Tomeu Vizoso d4dc79df72 panfrost: Add gem_handle to panfrost_memory and panfrost_bo
It will be used by the DRM backend to store GEM handles from the kernel.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-03-10 18:56:56 +00:00
Rob Clark 941adcef03 freedreno/a6xx: more bcolor fixes
Non-zero offset wasn't working, which breaks a bunch of
dEQP-GLES31.functional.texture.border_clamp.formats.* when doing sharded
deqp runs (because order of tests changes, resulting in different
texture state bound.. deqp doesn't really clean up it's gl state between
tests very well)

Previously, if additional textures were bound, due to using too small of
a bcolor_entry size, the last 32bytes of the bcolor_entry would be
overwritten.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-03-10 11:40:06 -04:00
Eric Engestrom e6ba67dd65 panfrost: move #include to fix compilation
In standalone.h, the struct gl_context type is not declared by #includ'ing
mtypes.h:

In file included from src/gallium/drivers/panfrost/midgard/cmdline.c:24:
src/compiler/glsl/standalone.h:46:14: warning: ‘struct gl_context’ declared inside parameter list will not be visible outside of this definition or declaration
       struct gl_context *ctx);
              ^~~~~~~~~~

This causes the following compilation failure:

src/gallium/drivers/panfrost/midgard/cmdline.c: In function ‘compile_shader’:
src/gallium/drivers/panfrost/midgard/cmdline.c:58:61: error: passing argument 4 of ‘standalone_compile_shader’ from incompatible pointer type [-Werror=incompatible-pointer-types]
         prog = standalone_compile_shader(&options, 2, argv, &local_ctx);
                                                             ^~~~~~~~~~
In file included from src/gallium/drivers/panfrost/midgard/cmdline.c:24:
src/compiler/glsl/standalone.h:43:28: note: expected ‘struct gl_context *’ but argument is of type ‘struct gl_context *’
 struct gl_shader_program * standalone_compile_shader(
                            ^~~~~~~~~~~~~~~~~~~~~~~~~

Fixes: e67e072637 "panfrost: Implement Midgard shader toolchain"
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-03-09 22:37:40 +00:00
Eric Engestrom d4d29c0455 panfrost: fix tgsi_to_nir() call
Bug: https://bugs.freedesktop.org/show_bug.cgi?id=109945
Fixes: 7da251fc72 "panfrost: Check in sources for command stream"
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-03-09 22:06:19 +00:00
Axel Davy 5475434fa6 Revert "d3dadapter9: Support software renderer on any DRI device"
This reverts commit 0d08476593.

It makes gitlab's travis fail. Revert until patch is fixed.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
2019-03-09 14:29:43 +01:00
Axel Davy 597b5e27fa st/nine: Change a few advertised caps
Most hw on the native platform advertise these
caps this way.

D3DCAPS_READ_SCANLINE: We don't really have hardware
support for that, but many games don't even check the
flag, and expect GetRasterStatus to work, which is
why we emulated it with a timer (like wine). So we
may as well advertise the cap.
D3DCURSORCAPS_LOWRES: I don't know what is the status
of this on X11, but I don't know of any dx9 game
running at height < 400 either.
D3DPTEXTURECAPS_TEXREPEATNOTSCALEDBYSIZE: The cap should
correspond to what the current generation of hw is doing.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-03-09 13:57:49 +01:00
Axel Davy 0d3c37e2f9 st/nine: Do not advertise CANMANAGERESOURCE
It doesn't seem the main vendors advertise it.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-03-09 13:57:49 +01:00
Axel Davy a8583e75d6 st/nine: Do not advertise support for D15S1 and D24X4S4
The former is supported on Matrox cards but no other hw.
The latter isn't supported anywhere.

It is fine to not advertise them as supported,
and it could prevent apps to trigger weird rendering paths.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-03-09 13:57:49 +01:00
Patrick Rudolph 0d08476593 d3dadapter9: Support software renderer on any DRI device
If D3D_ALWAYS_SOFTWARE is set for debugging purposes,
run on any DRI enabled platform.
Instead of probing for a compatible gallium driver (which might
fail if there's none) always use the KMS DRI software renderer.

Allows to run nine on i915 when D3D_ALWAYS_SOFTWARE=1.

Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
2019-03-09 13:57:49 +01:00
Axel Davy f7b9c09c7c st/nine: Disable depth write when nothing gets updated
I do not see any perf impact on radeonsi, but it
seems iris needs this.
It seems something sensible to do.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Andre Heider <a.heider@gmail.com>
2019-03-09 13:57:49 +01:00
Elie Tournier d7b3196976 virgl: Return an error if we use fp64 on top of GLES
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: <Gurchetan Singh gurchetansingh@chromium.org>
2019-03-09 11:33:20 +01:00
Elie Tournier 1f1514e1aa virgl: Set PIPE_CAP_DOUBLES when running on GLES This is a lie but no known app use fp64.
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: <Gurchetan Singh gurchetansingh@chromium.org>
2019-03-09 11:33:14 +01:00
Elie Tournier 8ad1e86bb0 virgl: Add a caps to advertise GLES backend
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: <Gurchetan Singh gurchetansingh@chromium.org>
2019-03-09 11:32:30 +01:00
Kenneth Graunke da51e3f1b0 Revert MR 369 (Fix extract_i8 and extract_u8 for 64-bit integers)
This broke piles of image load store tests (179 failures on CI,
mesa_master build #15546, previous build right before this landed
was green).  I'd rather not leave the tree on fire over the weekend,
so let's revert for now, and we can figure out what happened next week.
2019-03-09 01:42:16 -08:00
Ian Romanick 18e4bf65de nir/algebraic: Add missing 16-bit extract_[iu]8 patterns
No shader-db changes on any Intel platform.

v2: Use a loop to generate patterns.  Suggested by Jason.

Reviewed-by: Matt Turner <mattst88@gmail.com> [v1]
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-08 22:24:19 -08:00
Ian Romanick 55c1ac4b75 nir/algebraic: Add missing 64-bit extract_[iu]8 patterns
No shader-db changes on any Intel platform.

v2: Use a loop to generate patterns.  Suggested by Jason.

Reviewed-by: Matt Turner <mattst88@gmail.com> [v1]
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-08 22:24:19 -08:00
Ian Romanick 9aaaac6080 nir/algebraic: Remove redundant extract_[iu]8 patterns
No shader-db changes on any Intel platform.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-08 22:24:19 -08:00
Ian Romanick 37ee462e03 nir/algebraic: Fix up extract_[iu]8 after loop unrolling
Skylake, Broadwell, and Haswell had similar results. (Skylake shown)
total instructions in shared programs: 15256840 -> 15256837 (<.01%)
instructions in affected programs: 4713 -> 4710 (-0.06%)
helped: 3
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.06% max: 0.08% x̄: 0.06% x̃: 0.06%

total cycles in shared programs: 372286583 -> 372286583 (0.00%)
cycles in affected programs: 198516 -> 198516 (0.00%)
helped: 1
HURT: 1
helped stats (abs) min: 10 max: 10 x̄: 10.00 x̃: 10
helped stats (rel) min: <.01% max: <.01% x̄: <.01% x̃: <.01%
HURT stats (abs)   min: 10 max: 10 x̄: 10.00 x̃: 10
HURT stats (rel)   min: 0.01% max: 0.01% x̄: 0.01% x̃: 0.01%

No changes on any other Intel platform.

v2: Use a loop to generate patterns.  Suggested by Jason.

Reviewed-by: Matt Turner <mattst88@gmail.com> [v1]
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-08 22:24:19 -08:00
Jason Ekstrand 8fdee457a4 anv/pipeline: Move lower_explicit_io much later
Now that nir_opt_copy_prop_vars can properly handle array derefs on
vectors, it's safe to move UBO and SSBO lowering to late in the
pipeline.  This should allow NIR to actually start optimizing SSBO
access.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-03-08 22:03:34 -06:00
Jason Ekstrand 179d254cba intel/nir: Move lower_mem_access_bit_sizes to postprocess_nir
It doesn't really matter where this pass goes as long as it's after we
call nir_lower_explicit_io and before we go into the back-end.  Putting
it brw_postprocess_nir lets us move nir_lower_explicit_io significantly
later in the pipeline.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-03-08 22:03:14 -06:00
Rob Clark ad25948261 freedreno/ir3: turn on [iu]mul_high
Which also requires uadd_carry lowering

Until recently this was lowered in glsl ir so it went unnoticed that we
weren't lowering it.

Fixes: 1d8994a63b glsl: [u/i]mulExtended optimization for GLSL
Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-03-08 18:44:57 -05:00
Rob Clark 53083e4fbc freedreno/ir3: fix ir3_cmdline harder
Fixes: 45271702ec freedreno: fix ir3_cmdline build
Fixes: 7530d4abfc glsl/freedreno/panfrost: pass gl_context to the standalone compiler
Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-03-08 18:44:57 -05:00
Eric Anholt fafead7b62 st/dri: Set the PIPE_BIND_SHARED flag on create_image_with_modifiers.
With createImage(), the caller was expected to set a SHARED flag if they
needed the ability to get a GEM handle.  DRI3, wayland, and gbm all set
it, EGL_MESA_drm_image passes it through, and surfaceless doesn't need it
because there's no way to request a handle.

With the new createImageWithModifiers() DRI method to replace it, the
expectation is that you'll always be able to share the buffer, so the flag
is unnecessary in its arguments.  However, we do need to tell gallium
about this expectation.

Without this, kmscube's modifiers path using
gbm_bo_create_with_modifiers(&modifier, 1) instead of
gbm_bo_create(SCANOUT | SHARED) will call the driver's resource_create()
function wtih PIPE_BIND_SHARED unset, so the driver (particularly
renderonly drivers) may allocate in such a way that it can't return an
answer from gbm_bo_get_handle().  I used to have a hack in v3d using
count==1 && modifier==LINEAR to indicate that you wanted SHARED anyway,
but that was dropped recently.

Fixes: 59527a36e9 ("v3d: Restructure RO allocations using
resource_from_handle.")
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
2019-03-08 15:33:35 -08:00
Kenneth Graunke 9d1334d2a0 iris: Use copy_region and staging resources to avoid transfer stalls
This is similar to intel_miptree_map_blit and intel_buffer_object.c's
temporary blits in i965.

Improves performance of DiRT Rally by 20-25% by eliminating stalls.

Breaks piglit's spec/arb_shader_image_load_store/host-mem-barrier,
by using the GPU to do uploads, exposing a st/mesa issue where it
doesn't give us memory_barrier() calls.  This is a pre-existing issue
and will be fixed by a later patch (currently out for review).
2019-03-08 13:29:39 -08:00
Karol Herbst 8a8742d327 prog_to_nir: fix write from vps to FOG
for fragment programs we already treat fog as a single component value,
but for vp we didn't.

Fixes fog related piglit tests with my out of tree Nouveau nir patches.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-03-08 10:35:12 -08:00
Sagar Ghuge bca28deb46 iris: Track last VS URB entry size
Return immediately if last VS URB entry size is good enough for BLORP
operation

v2: Fix comments (Caio)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Suggested-by: Kenneth Graunke<kenneth@whitecape.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-03-08 10:01:39 -08:00
Sagar Ghuge d0a8fba69a iris: Refactor code to share 3DSTATE_URB_* packet
v2: 1) Set IRIS_DIRTY_URB bit (Caio)
    2) Get rid of unnecessary function (Caio)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Suggested-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-03-08 10:01:39 -08:00
Eric Engestrom 6e3d3f5b2c glx/meson: use full include path for dri_interface.h
Everything else uses `#include "GL/internal/dri_interface.h"` instead,
and this full path was even already used in other parts of GLX.

While at it, nothing uses `inc_gl_internal` anymore so let's remove it
as well.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Clayton Craft <clayton.a.craft@intel.com>
2019-03-08 18:00:19 +00:00
Eric Engestrom b1218d8cf7 hgl/meson: drop unused include directory
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Clayton Craft <clayton.a.craft@intel.com>
2019-03-08 18:00:19 +00:00
Brian Paul 0de83bacf0 intel/compiler: silence unitialized variable warning in opt_vector_float()
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-08 10:23:11 -07:00
Brian Paul b5ea56e411 intel/decoders: silence uninitialized variable warnings in gen_print_batch()
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-08 10:23:11 -07:00
Brian Paul e5e2be3c73 st/mesa: init hash keys with memset(), not designated initializers
Since the compiler may not zero-out padding in the object.
Add a couple comments about this to prevent misunderstandings in
the future.

Fixes: 67d96816ff ("st/mesa: move, clean-up shader variant key decls/inits")

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2019-03-08 10:23:11 -07:00
Eric Engestrom 598f10eacc r600: cast pointer to expected type
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-By: Gert Wollny <gert.wollny@collabora.com>
2019-03-08 16:24:06 +00:00
Eric Engestrom 9cf85d3b78 autotools: don't build libGLES*.so with GLVND
GLVND already provides these, so distro packagers have been deleting
them all along. Let's save ourselves the trouble and not build them in
the first place.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-03-08 15:13:36 +00:00
Eric Engestrom b01524fff0 meson: don't build libGLES*.so with GLVND
GLVND already provides these, so distro packagers have been deleting
them all along. Let's save ourselves the trouble and not build them in
the first place.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-03-08 15:13:36 +00:00
Brian Paul 2c387819f4 pipebuffer: s/PB_ALL_USAGE_FLAGS/PB_USAGE_ALL/
To fix build failure.  I guess my meson configuration has assertions
disabled for some reason.

Trivial fix.
2019-03-08 08:07:24 -07:00
Brian Paul d4381cf593 svga: remove SVGA_RELOC_READ flag in SVGA3D_BindGBSurface()
This fixes a rendering issue where UBO updates aren't always picked
up by drawing calls.  This issue effected the Webots robotics
simulator.  VMware bug 2175527.

Testing Done: Webots replay, piglit, misc Linux games

Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
2019-03-08 07:40:35 -07:00
Brian Paul 07e8a31e49 svga: refactor draw_vgpu10() function
The draw_vgpu10() function was huge.  Move the code for preparing the
vertex buffers and the index buffer into separate functions.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
2019-03-08 07:40:35 -07:00
Brian Paul 53acd4c688 st/mesa: whitespace, formatting fixes in st_cb_flush.c
Trivial.
2019-03-08 07:40:35 -07:00
Brian Paul 67d96816ff st/mesa: move, clean-up shader variant key decls/inits
Move the variant key declarations inside the scope they're used.
Use designated initializers instead of memset() calls.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
2019-03-08 07:40:35 -07:00
Brian Paul 76a10fc89e winsys/svga: use new pb_usage_flags enum type
And add a comment that we're implicitly converting PIPE_TRANSFER_
flags to PB_USAGE_ flags in one place.  And statically assert that
the enum values match.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
2019-03-08 07:40:35 -07:00
Brian Paul b5f2b0d6b6 pipebuffer: whitespace fixes in pb_buffer.h
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
2019-03-08 07:40:35 -07:00
Brian Paul b286e74df6 pipebuffer: use new pb_usage_flags enum type
Use a new enum type instead of 'unsigned' to make things a bit more
understandable.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
2019-03-08 07:40:35 -07:00
Charmaine Lee daf567f797 svga: add svga shader type in the shader variant
With this patch, the svga shader type will be saved in the shader variant,
and there is no need to pass in the shader type to the define/destroy
variant functions.

Reviewed-by: Brian Paul <brianp@vmware.com>
2019-03-08 07:40:34 -07:00
Brian Paul ac6b33a50d gallium/util: add some const qualifiers in u_bitmask.c
And add/update comments.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2019-03-08 07:40:34 -07:00
Brian Paul b5a3a90c0c gallium/util: whitespace cleanups in u_bitmask.[ch]
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2019-03-08 07:40:34 -07:00
Alejandro Piñeiro 686b7b1d48 nir/linker: fix ARRAY_SIZE query with xfb varyings
For a non-array varying, it is expecting ARRAY_SIZE as 1, instead of 0.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-03-08 15:00:50 +01:00
Antia Puentes de31fb2f4f nir/linker: Fix TRANSFORM_FEEDBACK_BUFFER_INDEX
From the ARB_enhanced_layouts specification:

  "For the property TRANSFORM_FEEDBACK_BUFFER_INDEX, a single integer
   identifying the index of the active transform feedback buffer
   associated with an active variable is written to <params>.  For
   variables corresponding to the special names "gl_NextBuffer",
   "gl_SkipComponents1", "gl_SkipComponents2", "gl_SkipComponents3",
   and "gl_SkipComponents4", -1 is written to <params>."

We were storing the xfb_buffer value, instead of the value
corresponding to GL_TRANSFORM_FEEDBACK_BUFFER_INDEX.

Note that the implementation assumes that varyings would be sorted by
offset and buffer.

Signed-off-by: Antia Puentes <apuentes@igalia.com>
Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-03-08 15:00:50 +01:00
Alejandro Piñeiro 7c0f411c27 nir/linker: use nir_gather_xfb_info
Instead of a custom ARB_gl_spirv xfb gather info pass.

In fact, this is not only about reusing code, but the current custom
code was not handling properly how many varyings are enumerated from
some complex types. So this change is also about fixing some corner
cases.

v2: Use util_bitcount, simplify current stage check (Kenneth)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-03-08 15:00:50 +01:00
Alejandro Piñeiro b2a212ac2e nir/xfb: handle arrays and AoA of basic types
On OpenGL, a array of a simple type adds just one varying. So
gl_transform_feedback_varying_info struct defined at mtypes.h includes
the parameters Type (base_type) and Size (number of elements).

This commit checks this when the recursive add_var_xfb_outputs call
handles arrays, to ensure that just one is addded.

We also need to take into account AoA here

v2: use glsl_type_is_leaf from nir_types (Timothy Arceri)

v3: simplified aoa check, without the need ot using glsl_type_is_leaf,
    using glsl_types_is_struct (Timothy Arceri)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-03-08 15:00:50 +01:00
Alejandro Piñeiro 2b65fecd85 nir_types: add glsl_type_is_struct helper
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-03-08 15:00:50 +01:00
Alejandro Piñeiro 8d693746e9 nir/xfb: sort varyings too
Right now we are only re-sorting outputs. But it is better to sort too
varyings, as linker expect them to be sorted out (as it was done on
GLSL). For varyings, and to make easier to compute buffer_index, we
sort also by buffer. We could do the same for outputs, but we lack a
reason for that, so we left it as it is (just offset).

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-03-08 15:00:50 +01:00
Alejandro Piñeiro cf0b2ad486 nir/xfb: adding varyings on nir_xfb_info and gather_info
In order to be used for OpenGL (right now for ARB_gl_spirv).

This commit adds two new structures:

  * nir_xfb_varying_info: that identifies each individual varying. For
    each one, we need to know the type, buffer and xfb_offset

  * nir_xfb_buffer_info: as now for each buffer, in addition to the
    stride, we need to know how many varyings are assigned to it.

For this patch, the only case where num_outputs != num_varyings is
with the case of doubles, that for dvec3/4 could require more than one
output. There are more cases though (like aoa), that will be handled
on following patches.

v2: updated after new nir general XFB support introduced for "anv: Add
    support for VK_EXT_transform_feedback"

v3: compute num_varyings beforehand for allocating, instead of relying
    on num_outputs as approximate value (Timothy Arceri)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-03-08 15:00:50 +01:00
Alejandro Piñeiro 9f68b9ac71 nir_types: add glsl_varying_count helper
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-03-08 15:00:50 +01:00
Alejandro Piñeiro b62a8149ab nir/xfb: add component_offset at nir_xfb_info
Where component_offset here is the offset when accessing components of
a packed variable. Or in other words, location_frac on
nir.h. Different places of mesa use different names for it.

Technically nir_xfb_info consumer can get the same from the
component_mask, it seems somewhat forced to make it to compute it,
instead of providing it.

v2: rename local location_frac for comp_offset, more similar to the
intended use (Timothy Arceri)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-03-08 15:00:50 +01:00
Samuel Pitoiset e72daf3e70 Revert "radv: execute external subpass barriers after ending subpasses"
This changes is actually wrong because we have to sync
before doing image layout transitions.

This fixes rendering issues in Batman, Path of Exile and
probably more titles.

This reverts commit 76c17cfd8d.

Fixes: 76c17cfd8d ("radv: execute external subpass barriers after ending subpasses")
Cc: 19.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-03-08 14:59:26 +01:00
Lionel Landwerlin 7271808df8 intel/error2aub: support older style engine names
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin a036eac029 intel/error2aub: deal with GuC log buffer
When Guc is enabled, the error state will contain a "global" buffer
for the GuC log buffer.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin c619ea945d intel/error2aub: add a verbose option
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin ca0161f890 intel/error2aub: write GGTT buffers into the aub file
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin 9b5dc2124f intel/error2aub: store engine last ring buffer head/tail pointers
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin cdab19fa57 intel/error2aub: annotate buffer with their address space
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin 630a72827a intel/error2aub: parse other buffer types
We don't write them in the aub file yet.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin c0ea043888 intel/error2aub: strenghten batchbuffer identifier marker
Found out that some base64 data matched the '---' identifier. We can
avoid this by adding the surrounding spaces.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin 650e6e5d33 intel/error2aub: identify buffers by engine
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin a07f5262f0 intel/error2aub: build a list of BOs before writing them
The error state contains several kind of BOs, including the context
image which we will want to write in a later commit. Because it can
come later in the error state than the user buffers and because we
need to write it first in the aub file, we have to first build a list
of BOs and then write them in the appropriate order.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Chris Wilson 04ddff1aa4 iris: Wire up EGL_IMG_context_priority
Add the missing PIPE_CAP_CONTEXT_PRIORITY_MASK and parsing of the context
construction flags.

Testcase: piglit/egl-context-priority

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-03-07 20:27:10 -08:00
Kenneth Graunke 2993088500 iris: Export a copy_region helper that doesn't flush
I'll want to use this for transfer maps, which already do their own
flushing.  This lets us avoid a double flush, and also gives us more
control over the batch which is selected.
2019-03-07 17:08:19 -08:00
Kenneth Graunke 335726fdac iris: Spruce up "are we using this engine?" checks for flushing
We were using batch->contains_draw as a proxy for "are we even using
this engine?"  That isn't quite right, because it only counts regular
draws.  BLORP operations may have also rendered to a resource, which
needs to trigger flushing.  To check for this, we also see if the
render and sometimes depth caches are non-empty.

We can also drop the "but there might already be stale data in the
cache even if we haven't emitted any commands yet" concern in the
comments.  The kernel flushes caches between batches.

This may not be great but it's at least better than what was there.
2019-03-07 17:08:07 -08:00
Timur Kristóf b0c214ccee radeonsi/nir: Only set window_space_position for vertex shaders.
By mistake, this was previously set for all shaders.
It is a vertex shader property so only makes sense to
set it for vertex shaders.

Signed-Off-By: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-By: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2019-03-08 00:39:45 +00:00
Jason Ekstrand 1664de5924 nir/builder: Add a build_deref_array_imm helper
Unlike most of the cases in which we do this by hand, the new helper
properly handles non-32-bit pointers.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-07 21:20:30 +00:00
Jason Ekstrand fcf2a0122e nir/builder: Cast array indices in build_deref_follower
There's no guarantee when build_deref_follower is called that the two
derefs have the same bit size destination.  Insert a cast on the array
index in case we have differing bit sizes.  While we're here, insert
some asserts in build_deref_array and build_deref_ptr_as_array.  The
validator will catch violations here but they're easier to debug if we
catch them while building.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-07 21:20:30 +00:00
Jason Ekstrand cd4c1458ba nir/builder: Emit better code for iadd/imul_imm
Because we already know the immediate right-hand parameter, we can
potentially save the optimizer a bit of work.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-03-07 21:20:30 +00:00
Rob Clark ebbb6b8eaa freedreno/a6xx: perfcntrs
Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-03-07 15:33:42 -05:00
Rob Clark 40d8ed5ef3 freedreno/a6xx: fix border-color swizzles
Fixes nearly all of the remaining
dEQP-GLES31.functional.texture.border_clamp.formats.* fails

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
2019-03-07 15:33:42 -05:00
Rob Clark f5d80ff2db freedreno/a6xx: refactor fd6_tex_swiz()
We need a version of fd6_tex_swiz() that just returns the composed
swizzle without building part of the TEX_CONST_0 state.  So just
refactor the existing function to build more of the TEX_CONST_0 state,
and leave fd6_tex_swiz() simply composing swizzles.

The small IBO state change (to use LINEAR for smaller sizes/levels) is
to match the state in fd6_tex_const_0().  It seems like maybe tiled
actually works at the smaller sizes but not if minification is in play,
so best just to make images match what we do for textures.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
2019-03-07 15:33:42 -05:00
Rob Clark 8dc47490c8 freedreno/a6xx: remove astc_srgb workaround
Not used on a6xx, so remove some of the related plumbing that was copied
over from older gens.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-03-07 15:33:42 -05:00
Rob Clark 45271702ec freedreno: fix ir3_cmdline build
Fixes: 7530d4abfc glsl/freedreno/panfrost: pass gl_context to the standalone compiler
Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-03-07 15:33:20 -05:00
Kenneth Graunke d53b1b6215 iris: Drop PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY
This cap is mainly for working around a r600 texture swizzle issue,
but it also controls whether ARB_texture_buffer_object (with legacy
formats) is enabled.  I suspect the missing I/L/A/LA faking is why
I had it set in the first place.

Thanks to Ilia for pointing out that I shouldn't be setting this.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-07 11:39:27 -08:00
Kenneth Graunke 809a81ec3a iris: Properly support alpha and luminance-alpha formats
For texturing, we map alpha formats to the corresponding red format,
as many alpha formats are outright missing, and red is more efficient
when sampling anyway.

When rendering to A8_UNORM, we use that format directly, so the image
gets the shader output's .a/.w channel, rather than the .r/.x channel.

All other A* formats are non-renderable, so we can't do much and just
mark them as unsupported for rendering.  Fortunately, GL only requires
rendering to A8_UNORM, so that works out.

According to Andre Heider and Timur Kristóf, this fixes font rendering
in Witcher 1 (via nine).  Andre also reported that it fixes Unigine
Heaven (presumably via nine).

v2: Use the same swizzle for both sampler views and "render targets".
    BLORP expects the read swizzle, and will take the inverse when
    setting up the destination swizzle (and actually applying it in
    the shaders).  We ignore the format swizzle when setting up normal
    rendering SURFACE_STATEs, which is necessary because it would be
    an illegal shader channel select combination.  Thanks to Jason
    Ekstrand for pointing out that BLORP took an inverse swizzle.

Tested-by: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-07 11:39:27 -08:00
Kenneth Graunke fbc51c4c95 iris: Defer uploading sampler state tables until draw time
Gallium might call us multiple times to bind subsets of the samplers,
at which point we'd recreate the table a bunch of times.  It doesn't
really buy us anything to do it here - even if we defer to draw time,
the dirty tracking ensures we'll only do it on the first draw after a
bind_sampler_states() call.

We now use the number of samplers specified by the shader instead of
the binding count.  If this number changes, we flag sampler state as
dirty so we re-upload a table with the right number of entries.

This also fixes a bug where ice->state.need_border_colors was never
unset, so once something needed border colors, the pool would always
be pinned in all future batches.

v2: Explicitly flag sampler states as dirty, rather than assuming that
    bind_sampler_states() will be called if the program texture count
    changes.  While this may be true for st/mesa, it isn't the case for
    Gallium HUD.

Tested-by: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-07 11:39:27 -08:00
Kenneth Graunke 9caabd6c5f iris: Plumb through ISL_SWIZZLE_IDENTITY in buffer surface emitters
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-07 11:39:27 -08:00
Kenneth Graunke 4787bc944a isl: Add a swizzle parameter to isl_buffer_fill_state()
This is necessary for legacy texture buffer object formats, where we'll
need to use a swizzle to fake e.g. luminance.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-07 11:39:27 -08:00
Lionel Landwerlin 575f8e8b60 iris: fix decode_get_bo callback
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: acb50d6b1f ("intel/decoders: handle decoding MI_BBS from ring")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-03-07 17:39:07 +00:00
Erik Faye-Lund 55e4759c8d virgl: remove unused variable
This variable is now unused, so let's remove it.

Fixes: 9c4930946a (virgl: add encoder functions for new protocol)
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2019-03-07 17:24:54 +00:00
Erik Faye-Lund 44620d4ef7 virgl: remove unused variable
This variable is now unused, so let's remove it.

Fixes: db77573d7b (virgl: modify how we handle GL_MAP_FLUSH_EXPLICIT_BIT)
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2019-03-07 17:24:54 +00:00
Erik Faye-Lund 524934586b virgl: remove unused variable
This variable is now unused, so let's remove it.

Fixes: c19aedcf1a (virgl: don't mark unclean after a flush)
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2019-03-07 17:24:54 +00:00
Erik Faye-Lund af29c93f22 virgl: remove unused variables
These variables are now unused, let's remove them to get rif of a few
warnings.

Fixes: f0e71b1088 (virgl: use transfer queue)
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2019-03-07 17:24:54 +00:00
Lionel Landwerlin 0e269c0ac2 iris: fix decoder call
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: acb50d6b1f ("intel/decoders: handle decoding MI_BBS from ring")
2019-03-07 16:15:03 +00:00
Lionel Landwerlin 0b3871bc7f intel/aub_write: factorize context image/pphwsp/ring creation
We allocate GGTT entries and physical addresses are we create engines
rather than having a fixed layout.

Context images now receive a parameter argument which is used to setup
pml4 & ring buffer addresses.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin c1a2c72e76 intel/aub_write: turn context images arrays into functions
We'll make them more parameterized in a later commit.

As this is just a transitional commit, we allow ourself to leak the
context images allocated in get_context_init(). We'll fix this in the
next commit.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin 8e14c9b7db intel/aub_write: store the physical page allocator in struct
We want to use this allocator in the next commit for GGTT pages.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin 0343a3b42b intel/aub_write: log mmio writes
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin 6ef46972d9 intel/aub_write: switch to use i915_drm engine classes
Prepare aub write to deal with multiple engine instances. We don't
pass the instance number yet this could be done in the future by
having a 2 dimensional array of struct engine.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin 8a81f5c255 intel/aub_write: break execlist write in 2
We want to reuse the execlist submission, but won't need the ring
buffer update.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin 69ee5bde4e intel/aub_write: write header in init
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:31 +00:00