iris: Refactor code to share 3DSTATE_URB_* packet

v2: 1) Set IRIS_DIRTY_URB bit (Caio)
    2) Get rid of unnecessary function (Caio)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Suggested-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Sagar Ghuge 2019-03-06 13:27:28 -08:00
parent 6e3d3f5b2c
commit d0a8fba69a
3 changed files with 60 additions and 59 deletions

View File

@ -246,26 +246,11 @@ blorp_emit_urb_config(struct blorp_batch *blorp_batch,
{
struct iris_context *ice = blorp_batch->blorp->driver_ctx;
struct iris_batch *batch = blorp_batch->driver_batch;
const struct gen_device_info *devinfo = &batch->screen->devinfo;
// XXX: Track last URB config and avoid re-emitting it if it's good enough
const unsigned push_size_kB = 32;
unsigned entries[4];
unsigned start[4];
unsigned size[4] = { vs_entry_size, 1, 1, 1 };
gen_get_urb_config(devinfo, 1024 * push_size_kB,
1024 * ice->shaders.urb_size,
false, false, size, entries, start);
for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
blorp_emit(blorp_batch, GENX(3DSTATE_URB_VS), urb) {
urb._3DCommandSubOpcode += i;
urb.VSURBStartingAddress = start[i];
urb.VSURBEntryAllocationSize = size[i] - 1;
urb.VSNumberofURBEntries = entries[i];
}
}
genX(emit_urb_setup)(ice, batch, size, false, false);
ice->state.dirty |= IRIS_DIRTY_URB;
}
static void

View File

@ -711,6 +711,22 @@ void gen8_init_state(struct iris_context *ice);
void gen9_init_state(struct iris_context *ice);
void gen10_init_state(struct iris_context *ice);
void gen11_init_state(struct iris_context *ice);
void gen8_emit_urb_setup(struct iris_context *ice,
struct iris_batch *batch,
const unsigned size[4],
bool tess_present, bool gs_present);
void gen9_emit_urb_setup(struct iris_context *ice,
struct iris_batch *batch,
const unsigned size[4],
bool tess_present, bool gs_present);
void gen10_emit_urb_setup(struct iris_context *ice,
struct iris_batch *batch,
const unsigned size[4],
bool tess_present, bool gs_present);
void gen11_emit_urb_setup(struct iris_context *ice,
struct iris_batch *batch,
const unsigned size[4],
bool tess_present, bool gs_present);
/* iris_program.c */
const struct shader_info *iris_get_shader_info(const struct iris_context *ice,

View File

@ -3670,47 +3670,6 @@ iris_store_derived_program_state(struct iris_context *ice,
/* ------------------------------------------------------------------- */
/**
* Configure the URB.
*
* XXX: write a real comment.
*/
static void
iris_upload_urb_config(struct iris_context *ice, struct iris_batch *batch)
{
const struct gen_device_info *devinfo = &batch->screen->devinfo;
const unsigned push_size_kB = 32;
unsigned entries[4];
unsigned start[4];
unsigned size[4];
for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
if (!ice->shaders.prog[i]) {
size[i] = 1;
} else {
struct brw_vue_prog_data *vue_prog_data =
(void *) ice->shaders.prog[i]->prog_data;
size[i] = vue_prog_data->urb_entry_size;
}
assert(size[i] != 0);
}
gen_get_urb_config(devinfo, 1024 * push_size_kB,
1024 * ice->shaders.urb_size,
ice->shaders.prog[MESA_SHADER_TESS_EVAL] != NULL,
ice->shaders.prog[MESA_SHADER_GEOMETRY] != NULL,
size, entries, start);
for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
iris_emit_cmd(batch, GENX(3DSTATE_URB_VS), urb) {
urb._3DCommandSubOpcode += i;
urb.VSURBStartingAddress = start[i];
urb.VSURBEntryAllocationSize = size[i] - 1;
urb.VSNumberofURBEntries = entries[i];
}
}
}
static const uint32_t push_constant_opcodes[] = {
[MESA_SHADER_VERTEX] = 21,
[MESA_SHADER_TESS_CTRL] = 25, /* HS */
@ -4309,7 +4268,22 @@ iris_upload_dirty_render_state(struct iris_context *ice,
}
if (dirty & IRIS_DIRTY_URB) {
iris_upload_urb_config(ice, batch);
unsigned size[4];
for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
if (!ice->shaders.prog[i]) {
size[i] = 1;
} else {
struct brw_vue_prog_data *vue_prog_data =
(void *) ice->shaders.prog[i]->prog_data;
size[i] = vue_prog_data->urb_entry_size;
}
assert(size[i] != 0);
}
genX(emit_urb_setup)(ice, batch, size,
ice->shaders.prog[MESA_SHADER_TESS_EVAL] != NULL,
ice->shaders.prog[MESA_SHADER_GEOMETRY] != NULL);
}
if (dirty & IRIS_DIRTY_BLEND_STATE) {
@ -5881,6 +5855,32 @@ iris_emit_raw_pipe_control(struct iris_batch *batch, uint32_t flags,
}
}
void
genX(emit_urb_setup)(struct iris_context *ice,
struct iris_batch *batch,
const unsigned size[4],
bool tess_present, bool gs_present)
{
const struct gen_device_info *devinfo = &batch->screen->devinfo;
const unsigned push_size_kB = 32;
unsigned entries[4];
unsigned start[4];
gen_get_urb_config(devinfo, 1024 * push_size_kB,
1024 * ice->shaders.urb_size,
tess_present, gs_present,
size, entries, start);
for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
iris_emit_cmd(batch, GENX(3DSTATE_URB_VS), urb) {
urb._3DCommandSubOpcode += i;
urb.VSURBStartingAddress = start[i];
urb.VSURBEntryAllocationSize = size[i] - 1;
urb.VSNumberofURBEntries = entries[i];
}
}
}
void
genX(init_state)(struct iris_context *ice)
{