4641dca269
radeonsi: don't update indexed flag in SGPR if it's unused
...
to skip the register update when switching between indexed and non-indexed
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7721 >
2020-12-01 15:33:03 -05:00
509142876b
radeonsi: add AMD_DEBUG=nofastlaunch for debugging
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7721 >
2020-12-01 15:33:03 -05:00
aaed7a29be
radeonsi: implement GS fast launch for indexed triangle strips
...
This increases performance for indexed triangle strips up to +100%.
In practice, it's limited by memory bandwidth and compute power,
so 256-bit memory bus and a lot of CUs are recommended.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7681 >
2020-11-27 06:16:59 +00:00
61fe66a2e4
radeonsi: pass VS->TCS IO via VGPRs if VS and TCS have the same thread count
...
It can only be done if a TCS input is accessed without indirect indexing and
with gl_InvocationID as the vertex index, and the number of VS and TCS threads
is the same.
This eliminates LDS stores and loads for VS->TCS IO, reducing shader lifetime
and LDS traffic.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7623 >
2020-11-23 02:22:21 +00:00
1190808eca
radeonsi: if VS and TCS have the same number of threads, merge the conditonals
...
Instead of:
if (VS) {
VS;
}
if (TCS) {
TCS;
}
Do this if the number of threads is the same in VS and TCS:
exec = enabled_threads;
VS;
TCS;
Skipping declare_vb_descriptor_input_sgprs is needed to match the VS return
values.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7623 >
2020-11-23 02:22:21 +00:00
c4310f70aa
radeonsi: swap DrawId and StartInstance SGPR locations
...
We need to change both values at the same time, so they need to be next
to each other.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7441 >
2020-11-18 01:41:25 +00:00
b7501184b9
radeonsi: implement inlinable uniforms
...
This improves performance for uber shaders.
It must be enabled using the new driconf option.
The driver compiles the specialized shaders in another thread without stalls,
same as all other optimizations.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7057 >
2020-10-30 11:07:22 +00:00
1de0bf0a56
radeonsi: remove indirection when loading position at the end for NGG culling
...
If we store the position into LDS after we know the new thread ID,
we don't need to remember the old thread ID.
The culling code only needs W, X/W, Y/W, so we have to keep those.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7172 >
2020-10-17 01:58:19 +00:00
f5912c6d32
radeonsi: kill disabled clip distances and planes at per-channel granularity
...
Apps often enable only 1 plane for gl_ClipVertex, which means 1 scalar
clip distance.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6948 >
2020-10-01 16:29:46 +00:00
30c3b2c0b6
radeonsi: simplify NGG culling enablement and add radeonsi_shader_culling option
...
Add a vertex count threshold into si_shader_selector to simplify
the draw_vbo code.
The new option is supposed to be used in 00-mesa-defaults.conf and should be
tweaked for best performance unlike the AMD_DEBUG experimental options.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6948 >
2020-10-01 16:29:46 +00:00
d1d27e9db4
radeonsi: remove redundant info.uses_fbfetch
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6782 >
2020-09-25 04:37:23 -04:00
98a52fecda
radeonsi: implement 16-bit FS color outputs
...
This removes type conversions from 16 bits to 32 bits in the main function
and then back to 16 bits in the epilog.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622 >
2020-09-22 02:44:53 +00:00
c56fbed99b
radeonsi: kill point size VS output if it's not used by the rasterizer
...
Fixed-func shaders can contain the output, because their generator
doesn't consider the current primitive type into account.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6620 >
2020-09-07 11:27:30 +00:00
1dd243d4f5
radeonsi: use shader_info::cs::local_size_variable to clean up some code
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:41 +00:00
757f790ad8
radeonsi: remove redundant si_shader_info::uses_derivatives
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:41 +00:00
f3f08bca23
radeonsi: remove redundant si_shader_selector::max_gs_stream
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:41 +00:00
2b4fa68808
radeonsi: remove redundant GS variables in si_shader_selector
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:40 +00:00
7960668dc9
radeonsi: remove redundant si_shader_info::writes_memory
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:40 +00:00
83cdffd435
radeonsi: rename num_memory_instructions -> num_memory_stores
...
it only counts stores
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:40 +00:00
c8ab5899c1
radeonsi: reduce type sizes in si_shader_selector
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:40 +00:00
99c4e61084
radeonsi: remove redundant si_shader_info::uses_kill
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:40 +00:00
8df349a31e
radeonsi: merge uses_persp_opcode_interp_sample/uses_linear_opcode_interp_sample
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:40 +00:00
7b3e24c2d8
radeonsi: remove unused si_shader_info::uses_(vertexid|basevertex)
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:40 +00:00
f02cd0e027
radeonsi: remove redundant si_shader_info:*(clip|cull)* fields
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:40 +00:00
d15a7d16d6
radeonsi: remove redundant si_shader_info::const_buffers_declared
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:40 +00:00
0dabcb9e53
radeonsi: remove redundant si_shader_info::images_declared
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:40 +00:00
c1af2f4bee
radeonsi: remove redundant si_shader_info::shader_buffers_declared
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:40 +00:00
cb63e4afc9
radeonsi: remove info::samplers_declared, image_buffers, msaa_images_declared
...
They are redundant with shader_info.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:40 +00:00
cb7bc983ae
radeonsi: stop using TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:40 +00:00
89cf8789cd
radeonsi: stop using TGSI_PROPERTY_CS_LOCAL_SIZE
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:40 +00:00
46bb051bc2
radeonsi: stop using TGSI_PROPERTY_NEXT_SHADER
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624 >
2020-09-07 11:15:40 +00:00
98e866c669
radeonsi: optimize out the loop in si_get_ps_input_cntl
...
Use a remap table from a semantic to an index instead of searching
for the correct index.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340 >
2020-09-02 23:03:00 -04:00
6ecb8b6899
radeonsi: replace TGSI_SEMANTIC with VARYING_SLOT and FRAG_RESULT
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340 >
2020-09-02 23:03:00 -04:00
6925401a38
radeonsi: remove si_shader_selector::type
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340 >
2020-09-02 23:03:00 -04:00
966307983b
radeonsi: precompute si_*_descriptors_idx in si_shader_selector
...
It helps remove one use of sel->type.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340 >
2020-09-02 23:03:00 -04:00
b1cb72c449
radeonsi: change PIPE_SHADER to MESA_SHADER (si_shader_selector::type)
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340 >
2020-09-02 23:03:00 -04:00
562b8c1a47
radeonsi: don't execute LDS stores for TCS outputs that are never read
...
This is a per-component version of the previous mechanism.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340 >
2020-09-02 23:03:00 -04:00
81d106d6ec
radeonsi: lower IO intrinsics - complete rewrite of input/output scanning
...
Input and output info is gathered from intrinsics. nir_variables are
ignored (and we'll remove them anyway).
This is a prerequisite for ACO, but also makes the IR prettier.
The ac_nir_to_llvm change has to be in this commit.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6445 >
2020-09-02 22:45:38 -04:00
ed9391df3f
radeonsi: get color interpolation info from shader_info
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6445 >
2020-09-02 22:45:38 -04:00
5a05f9714b
radeonsi: bump SI_NUM_SHADER_BUFFERS to 32
...
Some app uses more than 8 SSBOs (https://gitlab.freedesktop.org/mesa/mesa/-/issues/2946 ),
so increase SI_NUM_SHADER_BUFFERS to 32 (which allows 16 SSBOs).
Since we're now using a 64 bits number to track buffers, we could bump
SI_NUM_SHADER_BUFFERS to 48 but that would conflict with Mesa's
MAX_COMBINED_ATOMIC_BUFFERS limit (= 90).
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2122
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5632 >
2020-06-30 09:23:14 +02:00
85a6bcca61
radeonsi: pass at most 3 images and/or shader buffers via user SGPRs for compute
...
This should slightly decrease shader lifetime.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5209 >
2020-06-02 20:47:49 +00:00
d7008fe46a
radeonsi: switch to 3-spaces style
...
Generated automatically using clang-format and the following config:
AlignAfterOpenBracket: true
AlignConsecutiveMacros: true
AllowAllArgumentsOnNextLine: false
AllowShortCaseLabelsOnASingleLine: false
AllowShortFunctionsOnASingleLine: false
AlwaysBreakAfterReturnType: None
BasedOnStyle: LLVM
BraceWrapping:
AfterControlStatement: false
AfterEnum: true
AfterFunction: true
AfterStruct: false
BeforeElse: false
SplitEmptyFunction: true
BinPackArguments: true
BinPackParameters: true
BreakBeforeBraces: Custom
ColumnLimit: 100
ContinuationIndentWidth: 3
Cpp11BracedListStyle: false
Cpp11BracedListStyle: true
ForEachMacros:
- LIST_FOR_EACH_ENTRY
- LIST_FOR_EACH_ENTRY_SAFE
- util_dynarray_foreach
- nir_foreach_variable
- nir_foreach_variable_safe
- nir_foreach_register
- nir_foreach_register_safe
- nir_foreach_use
- nir_foreach_use_safe
- nir_foreach_if_use
- nir_foreach_if_use_safe
- nir_foreach_def
- nir_foreach_def_safe
- nir_foreach_phi_src
- nir_foreach_phi_src_safe
- nir_foreach_parallel_copy_entry
- nir_foreach_instr
- nir_foreach_instr_reverse
- nir_foreach_instr_safe
- nir_foreach_instr_reverse_safe
- nir_foreach_function
- nir_foreach_block
- nir_foreach_block_safe
- nir_foreach_block_reverse
- nir_foreach_block_reverse_safe
- nir_foreach_block_in_cf_node
IncludeBlocks: Regroup
IncludeCategories:
- Regex: '<[[:alnum:].]+>'
Priority: 2
- Regex: '.*'
Priority: 1
IndentWidth: 3
PenaltyBreakBeforeFirstCallParameter: 1
PenaltyExcessCharacter: 100
SpaceAfterCStyleCast: false
SpaceBeforeCpp11BracedList: false
SpaceBeforeCtorInitializerColon: false
SpacesInContainerLiterals: false
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4319 >
2020-03-30 11:05:52 +00:00
4ef1c8d60b
radeonsi/gfx10: fix the wave size for compute-based culling
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
9d64ad2fe7
radeonsi: lower discard to demote when FS_CORRECT_DERIVS_AFTER_KILL is enabled
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047 >
2020-03-09 12:29:32 +00:00
0db74f479b
radeonsi: use the live shader cache
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2929 >
2020-01-24 20:29:29 -05:00
7ce84b256e
radeonsi: make si_compile_shader return bool
...
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421 >
2020-01-23 19:10:21 +00:00
735a3ba007
radeonsi/gfx10: enable GS fast launch for triangles and strips with NGG culling
...
Only non-indexed triangle lists and strips are supported. This increases
performance if there is something to cull.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-20 16:16:11 -05:00
8db00a51f8
radeonsi/gfx10: implement NGG culling for 4x wave32 subgroups
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-20 16:16:11 -05:00
aa2d846604
radeonsi/gfx10: move GE_PC_ALLOC setting to shader states
...
The value is not changed. I just use a different way to compute it.
The value will vary with NGG culling.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-20 16:16:11 -05:00
68586bdd21
radeonsi: remove useless #includes
...
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399 >
2020-01-15 21:54:55 +00:00
Marek Olšák
Pierre-Eric Pelloux-Prayer
Daniel Schürmann