radeonsi: remove redundant si_shader_info::writes_memory

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
This commit is contained in:
Marek Olšák 2020-09-06 11:19:58 -04:00 committed by Marge Bot
parent 83cdffd435
commit 7960668dc9
5 changed files with 8 additions and 14 deletions

View File

@ -371,7 +371,6 @@ struct si_shader_info {
bool writes_primid;
bool writes_viewport_index;
bool writes_layer;
bool writes_memory; /**< contains stores or atomics to buffers or images */
bool uses_derivatives;
bool uses_bindless_samplers;
bool uses_bindless_images;

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@ -297,7 +297,7 @@ static void si_llvm_emit_vertex(struct ac_shader_abi *abi, unsigned stream, LLVM
LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, gs_next_vertex,
LLVMConstInt(ctx->ac.i32, shader->selector->gs_max_out_vertices, 0), "");
bool use_kill = !info->writes_memory;
bool use_kill = !info->base.writes_memory;
if (use_kill) {
ac_build_kill_if_false(&ctx->ac, can_emit);
} else {

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@ -323,11 +323,9 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info
break;
case nir_intrinsic_bindless_image_store:
info->uses_bindless_images = true;
info->writes_memory = true;
info->num_memory_stores++;
break;
case nir_intrinsic_image_deref_store:
info->writes_memory = true;
info->num_memory_stores++;
break;
case nir_intrinsic_bindless_image_atomic_add:
@ -341,7 +339,6 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info
case nir_intrinsic_bindless_image_atomic_exchange:
case nir_intrinsic_bindless_image_atomic_comp_swap:
info->uses_bindless_images = true;
info->writes_memory = true;
info->num_memory_stores++;
break;
case nir_intrinsic_image_deref_atomic_add:
@ -356,7 +353,6 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info
case nir_intrinsic_image_deref_atomic_comp_swap:
case nir_intrinsic_image_deref_atomic_inc_wrap:
case nir_intrinsic_image_deref_atomic_dec_wrap:
info->writes_memory = true;
info->num_memory_stores++;
break;
case nir_intrinsic_store_ssbo:
@ -370,7 +366,6 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info
case nir_intrinsic_ssbo_atomic_xor:
case nir_intrinsic_ssbo_atomic_exchange:
case nir_intrinsic_ssbo_atomic_comp_swap:
info->writes_memory = true;
info->num_memory_stores++;
break;
case nir_intrinsic_load_color0:

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@ -3353,7 +3353,7 @@ static bool si_out_of_order_rasterization(struct si_context *sctx)
/* The set of PS invocations is always order invariant,
* except when early Z/S tests are requested. */
if (sctx->ps_shader.cso && sctx->ps_shader.cso->info.writes_memory &&
if (sctx->ps_shader.cso && sctx->ps_shader.cso->info.base.writes_memory &&
sctx->ps_shader.cso->info.base.fs.early_fragment_tests &&
!dsa_order_invariant.pass_set)
return false;

View File

@ -1763,7 +1763,7 @@ static void si_shader_selector_key_hw_vs(struct si_context *sctx, struct si_shad
unsigned ps_colormask = si_get_total_colormask(sctx);
ps_disabled = sctx->queued.named.rasterizer->rasterizer_discard ||
(!ps_colormask && !ps_modifies_zs && !ps->info.writes_memory);
(!ps_colormask && !ps_modifies_zs && !ps->info.base.writes_memory);
}
/* Find out which VS outputs aren't used by the PS. */
@ -2623,7 +2623,7 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
sel->prim_discard_cs_allowed =
sel->info.stage == MESA_SHADER_VERTEX && !sel->info.uses_bindless_images &&
!sel->info.uses_bindless_samplers && !sel->info.writes_memory &&
!sel->info.uses_bindless_samplers && !sel->info.base.writes_memory &&
!sel->info.writes_viewport_index &&
!sel->info.base.vs.window_space_position && !sel->so.num_outputs;
@ -2745,7 +2745,7 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
sscreen->always_use_ngg_culling_tess))) &&
sel->info.writes_position &&
!sel->info.writes_viewport_index && /* cull only against viewport 0 */
!sel->info.writes_memory && !sel->so.num_outputs &&
!sel->info.base.writes_memory && !sel->so.num_outputs &&
(sel->info.stage != MESA_SHADER_VERTEX ||
(!sel->info.base.vs.blit_sgprs_amd &&
!sel->info.base.vs.window_space_position));
@ -2798,8 +2798,8 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
/* Cases 3, 4. */
sel->db_shader_control |= S_02880C_DEPTH_BEFORE_SHADER(1) |
S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z) |
S_02880C_EXEC_ON_NOOP(sel->info.writes_memory);
} else if (sel->info.writes_memory) {
S_02880C_EXEC_ON_NOOP(sel->info.base.writes_memory);
} else if (sel->info.base.writes_memory) {
/* Case 2. */
sel->db_shader_control |= S_02880C_Z_ORDER(V_02880C_LATE_Z) | S_02880C_EXEC_ON_HIER_FAIL(1);
} else {
@ -3058,7 +3058,7 @@ static void si_bind_ps_shader(struct pipe_context *ctx, void *state)
si_mark_atom_dirty(sctx, &sctx->atoms.s.cb_render_state);
if (sctx->screen->has_out_of_order_rast &&
(!old_sel || old_sel->info.writes_memory != sel->info.writes_memory ||
(!old_sel || old_sel->info.base.writes_memory != sel->info.base.writes_memory ||
old_sel->info.base.fs.early_fragment_tests !=
sel->info.base.fs.early_fragment_tests))
si_mark_atom_dirty(sctx, &sctx->atoms.s.msaa_config);