Commit Graph

120925 Commits

Author SHA1 Message Date
Jason Ekstrand 4610d69e37 anv: Delete some pointless break statements
They immediately follow returns.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:28 +00:00
Jason Ekstrand 28c243e9ec anv: Pass buffer addresses into emit_push_constant*
While we're here, we add an assert that bind_map::push_ranges is tightly
packed.  If it isn't, it breaks assumptions in the emit_push_constant*
functions.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:28 +00:00
Jason Ekstrand ff5de35127 anv: Mark max_push_range UNUSED and simplify the code
The compiler should be smart enough to figure out that it's unused on
Gen11 and earlier and delete the code which calculates.  Us adding an
`if (GEN_GEN >= 12)` check is unnecessary and just dirties the code.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:28 +00:00
Jason Ekstrand 35ca2ad22e anv: Parse VkPhysicalDeviceFeatures2 in CreateDevice
The client may enable robustBufferAccess2 via either
pCreateInfo->pEnabledFeatures or via a chained-in
VkPhysicalDeviceFeatures2 struct.  We need to parse both.

Fixes: 022e5c7e5a "anv: Implement VK_KHR_get_physical_device_properties2"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:28 +00:00
Eric Engestrom 0e4c001951 docs/relnotes/20.0: fix vulkan version reported
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
2020-03-07 00:57:15 +00:00
Eric Engestrom 5ff443b8aa docs/relnotes/19.3: fix vulkan version reported
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
2020-03-07 00:57:15 +00:00
Eric Engestrom 2557d614d3 gen_release_notes: fix vulkan version reported
Fixes: 4ef3f7e3d3 ("anv: Enable Vulkan 1.2 support")
Fixes: 7f5462e349 ("radv: enable Vulkan 1.2")
Fixes: 75755e0eba ("turnip: Pretend to support Vulkan 1.2")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
2020-03-07 00:57:15 +00:00
Alyssa Rosenzweig de30a7ae6e pan/bi: Fix Android.mk
Files listed in Makefile.sources did not exist, this affects the android
build for other drivers as well.

[Patch by Tapani manually cherrypicked into this branch]

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 0b0be49005 pan/bi: Rename next-wait to simply 'wait'
next-wait is from a quirk of packing that the dependency indices are
"off by one"; we don't emulate this quirk in the IR since it's easy
enough to patch over in the disassembler. Let's not confuse anybody with
it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig b329f8c750 pan/bi: Add dummy scheduler
Do the absolute simplest possible thing -- create a clause for every
instruction, and just pick whichever slot we can, nopping the other,
copying whatever constant we have whether it's used or not.

To be clear - this is not to be used in a production compiler. But this
lets actual bundles and clauses show up in the BIR, which unblocks work
on final code generation and packing (which can happen more or less in
parallel to NIR->BIR, optimization, register allocation, and writing an
actual scheduling).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 51e537c9fa pan/bi: Implement load_const
In the laziest possible way...  We can just emit worst case moves which
DCE will eat for breakfast anyway, and inline constants on instructions
where that is supported directly. This approach eliminates a lot of
nasty corner cases that Midgard's crazy cache scheme has hit, at the
expense of slightly more work for DCE (but it's only a single iteration
of an O(N) pass that has to run anyway..)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 1ead0d3488 pan/bi: Add preliminary LOAD_UNIFORM implementation
Lots of things are missing (indirect access, UBOs) but we have this
stubbed out for now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 48910e8388 pan/bi: Implement store_vary for vertex shaders
As far as I/O goes, these four should hold us over for a while.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig d86659ca57 pan/bi: Add helpers for creating temporaries
Also from Midgard, adapted to our addressing scheme.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 59b476e11a pan/bi: Implement load_input for vertex shaders
Corresponds to a single LD_ATTR instruction, easy enough.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig dabb6c6b9f pan/bi: Implement store_output for fragment shaders
Corresponds to a BLEND instruction, possibly preceded by an ATEST
instruction.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 79c1af0623 pan/bi: Add bi_schedule_barrier helper
Copypaste from Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 92a4f26e7f pan/bi: Add blend_location to IR for BI_BLEND
To specify which render target is being written.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 0767182665 pan/bi: Implement nir_intrsinic_load_interpolated_input
Enough for basic varying reads.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 806533ba7f pan/bi: Fix destination printing
It should get the same treatment as sources to handle SSA/reg/etc.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 65c8dcca3b pan/bi: Handle jumps (breaks, continues)
Loops should behave reasonably now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 987aea1400 pan/bi: Handle loops when ingesting CFG
Not very useful without also handling breaks and continues, of course.
We use the strategy from v3d (vir_to_nir) instead of Midgard's, since
the latter is mildly insane. I mean, it passes deqp but...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 9a00cf3d1e pan/bi: Add support for if-else blocks
Branch lowering code lifted from Midgard as usual.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 977a38c87f pan/bi: Call nir_lower_io_to_temporaries in cmdline
Normally mesa/st would do this for us, but we're using the standalone
compiler (in advance of having the hardware) and need this pass
particularly for fragment writeout.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 55dab92073 pan/bi: Add instruction emit/remove helpers
As we start descending into code generation these will be of interest.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 7fd22c3bbd pan/bi: Print branch target
...if it's present, anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 2e9b5f8ef4 pan/bi: Don't print types for unconditional branches
There's nothing to type!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 5c7ee8a974 pan/bi: Improve block printing
Skip predecessor printing if there are none and match a missing brace,
also fixup the spacing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 83c4562503 pan/bi: Walk through the NIR control flow graph
Copypaste from Midgard with some cleanups. That seems to be a trend
these days. Hopefully boilerplate will come to a close soon.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig 0d29184f69 pan/bi: Lower and optimize NIR
Pretty much a copypaste from Midgard except where architectural
decisions diverge around vectorization. On that note, we will need our
own ALU scalarization pass at some point (or rather we'll need to extend
nir_lower_alu_scalar) to allow partial lowering for 8/16-bit ops. I.e.
we'll approximately need to lower

   vec4 16 ssa_2 = fadd ssa_0, ssa_1

to

   vec2 16 ssa_2 = fadd ssa_0.xy, ssa_1.xy
   vec2 16 ssa_3 = fadd ssa_0.zw, ssa_1.zw
   vec4 16 ssa_4 = vec4 ssa_2.x, ssa_2.y, ssa_3.x, ssa_4

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Chad Versace c652ff8caa anv: Flatten the logic add_aux_surface_if_supported (v3)
Reduces the function's max indentation level from 5 to 3 inside the big
'if' tree. And enables more comments to be attached to the condition
they describe.

v2:
  - Add missing DEBUG_NO_RBC check.
v3:
  - Return early on DISABLE_AUX_BIT.
  - Restore original order of gen7 hiz check.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
2020-03-06 23:40:41 +00:00
Chad Versace 615c65ba1b anv: Refactor creation of aux surfaces (v2)
make_surface() contained a giant if-tree for creation of aux surfaces.
Move the if-tree into its own function, add_aux_surface_if_supported().
This will simplify future changes for VK_EXT_image_drm_format_modifier.

This patch merely moves the code verbatim, then extracts duplicate
assertions to the top.

v2: Rename func to add_aux_surface_if_supported [for jekstrand].

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
2020-03-06 23:40:41 +00:00
Chad Versace d1b7d80bc3 anv: Add anv_image_plane_needs_shadow_surface() (v2)
The function returns true if hardware limitations require the image
plane to use a shadow surface. It replaces equivalent code in
make_surface().

Refactor only. No intended change in behavior.

Why extract this code out of vkCreateImage? If an image requires
a shadow surface, then that may impact its support for DRM format
modifiers, which must be evaluated during
vkGetPhysicalDeviceImageFormatProperties2.

v2:
  - Use early return. [for jekstrand]
  - Unexport function.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
2020-03-06 23:40:41 +00:00
Timothy Arceri 1da6b7f8a3 glsl: add subroutine support to nir linker
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri b1bc24f826 glsl: dont try to assign uniform storage for uniform blocks
Fixes a crash in some shaders.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri 576b5ace9e glsl: add support for builtins to the nir uniform linker
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri 79127f8d5b glsl: set ShaderStorageBlocksWriteAccess in the nir linker
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri 17f240b874 glsl: nir linker fix setting of ssbo top level array
This helps correcly set it for each top level member and correctly
handle unsized arrays.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri 8ffd09f311 glsl: find the base offset for block members from unnamed blocks
These block member have been split into individual vars so we need
to set the correct offsets for each member in the new glsl nir
linker. We also take this opportunity to set the correct location
for the variable.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri 76ce775240 glsl: correctly set explicit offsets for struct members
This correctly sets offsets set in glsl when using the nir linker.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri 590a59437f glsl: add std140 and std430 layouts to nir uniform linker
The current ARB_gl_spirv linking only supports explicit layouts so
we need to update it to support std140 and std430 layouts before
we can use the linker for glsl.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri 858a49a10d nir: add glsl_get_std430_size() helper
This will be used by the nir glsl linker for linking uniforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri a005f1a6e7 nir: add glsl_get_std430_base_alignment() helper
This will be used by the nir glsl linker for linking uniforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri 1ccfe821b2 nir: add glsl_get_std140_size() helper
This will be used by the nir glsl linker for linking uniforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri 120a26c6f2 nir: add glsl_get_std140_base_alignment() helper
This will be used by the nir glsl linker for linking uniforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri 262b611a5b nir: add glsl_get_internal_ifc_packing() helper
This will be used by the nir glsl linker for linking uniforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri a02d8e040f glsl: correctly find block index when linking glsl with nir linker
The existing code for spirv expects all vars to have explicit
bindings set which is not true for glsl.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri 10b816d27e glsl: add name support to nir uniform linker
Name support is optional for spirv support but is required for glsl
support.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri aa9b457062 glsl: move get_next_index() earlier in nir link uniforms
We will use get_next_index() in more of the helper functions in
the following patches.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri 219cefe24f glsl: move add_parameter() earlier in nir link uniforms
We will use add_parameter() in more of the helper functions in
the following patches.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00