pan/bi: Add preliminary LOAD_UNIFORM implementation
Lots of things are missing (indirect access, UBOs) but we have this stubbed out for now. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
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@ -122,6 +122,7 @@ bi_class_name(enum bi_class cl)
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case BI_FMA: return "fma";
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case BI_FREXP: return "frexp";
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case BI_LOAD: return "load";
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case BI_LOAD_UNIFORM: return "load_uniform";
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case BI_LOAD_ATTR: return "load_attr";
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case BI_LOAD_VAR: return "load_var";
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case BI_LOAD_VAR_ADDRESS: return "load_var_address";
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@ -290,7 +291,7 @@ bi_print_instruction(bi_instruction *ins, FILE *fp)
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if (ins->type == BI_MINMAX)
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fprintf(fp, "%s", bi_minmax_mode_name(ins->minmax));
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else if (ins->type == BI_LOAD_ATTR || ins->type == BI_LOAD_VAR_ADDRESS)
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else if (ins->type == BI_LOAD_ATTR || ins->type == BI_LOAD_VAR_ADDRESS || ins->type == BI_LOAD_UNIFORM)
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bi_print_load(&ins->load, fp);
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else if (ins->type == BI_LOAD_VAR)
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bi_print_load_vary(&ins->load_vary, fp);
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@ -39,6 +39,7 @@ unsigned bi_class_props[BI_NUM_CLASSES] = {
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[BI_FMA] = BI_ROUNDMODE | BI_SCHED_FMA,
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[BI_FREXP] = BI_SCHED_ALL,
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[BI_LOAD] = BI_SCHED_HI_LATENCY,
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[BI_LOAD_UNIFORM] = BI_SCHED_HI_LATENCY,
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[BI_LOAD_ATTR] = BI_SCHED_HI_LATENCY,
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[BI_LOAD_VAR] = BI_SCHED_HI_LATENCY,
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[BI_LOAD_VAR_ADDRESS] = BI_SCHED_HI_LATENCY,
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@ -165,6 +165,24 @@ bi_emit_st_vary(bi_context *ctx, nir_intrinsic_instr *instr)
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bi_emit(ctx, st);
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}
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static void
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bi_emit_ld_uniform(bi_context *ctx, nir_intrinsic_instr *instr)
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{
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/* TODO: Indirect access */
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bi_instruction ld = {
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.type = BI_LOAD_UNIFORM,
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.load = bi_direct_load_for_instr(instr),
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.dest = bir_dest_index(&instr->dest),
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.dest_type = nir_intrinsic_type(instr),
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.src = {
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BIR_INDEX_ZERO /* TODO: UBOs */
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}
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};
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bi_emit(ctx, ld);
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}
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static void
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emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr)
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{
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@ -192,6 +210,11 @@ emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr)
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else
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unreachable("Unsupported shader stage");
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break;
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case nir_intrinsic_load_uniform:
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bi_emit_ld_uniform(ctx, instr);
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break;
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default:
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/* todo */
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break;
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@ -59,6 +59,7 @@ enum bi_class {
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BI_FMA,
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BI_FREXP,
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BI_LOAD,
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BI_LOAD_UNIFORM,
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BI_LOAD_ATTR,
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BI_LOAD_VAR,
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BI_LOAD_VAR_ADDRESS,
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@ -112,12 +113,12 @@ extern unsigned bi_class_props[BI_NUM_CLASSES];
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/* It can't get any worse than csel4... can it? */
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#define BIR_SRC_COUNT 4
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/* Class-specific data for BI_LD_ATTR, BI_LD_VAR_ADDR */
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/* Class-specific data for BI_LOAD, BI_LD_ATTR, BI_LD_VAR_ADDR */
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struct bi_load {
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/* Note: no indirects here */
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/* Note: LD_ATTR does not support indirects */
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unsigned location;
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/* Only for BI_LD_ATTR. But number of vector channels */
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/* Number of vector channels */
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unsigned channels;
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};
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