Commit Graph

135593 Commits

Author SHA1 Message Date
Mike Blumenkrantz 73e84c33a2 zink: rework xfb barrier transitions when reusing as vertex inputs
if we have proper barrier usage to start with, then we don't need to do
any kind of weird flushing upon changing vertex inputs and can also remove
a flag from zink_resource

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz fb14793ebb zink: rework xfb counter resource barriers
using the new helper functions, we can now more accurately determine
exactly which barriers we need/want and avoid setting unnecessary barriers
or ending a renderpass early

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz dd858be011 zink: set buffer resource barriers for descriptor resources in update_descriptors()
need to make sure these are properly synchronized

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 69304052e3 zink: add helper function for getting pipeline stage from shader stage
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Alyssa Rosenzweig cf6794eb8e panfrost/ci: Mark flaky test
I cannot reproduce the issue in local runs.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 2346a94de0 docs/features: Mark atomics/images done on Bifrost
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 10b9e3ca0a panfrost: Advertise FRAMEBUFFER_NO_ATTACHMENTS
Passes dEQP-GLES31.functional.fbo.no_attachments.*, it doesn't look like
we need to do anything special.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 91d2171902 panfrost: Comment on state of ARB_shader_clock
Pending on kernel work.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig ed29a2beb8 pan/bi: Use explicit move even for RT#0 of MRT
Otherwise we get a bad RA if RT 0 = RT 3 (for example), fixes
dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler.const_literal.fragment.sampler2d

Fixes: a6f1500bed ("pan/bi: Workaround BLEND precolour with explicit moves")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 02d68b9b83 pan/bi: Allow dynamically uniform tex indices
Passes the relevant tests of
dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler.*, a few
failures that seem to relate to MRT instead of this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig dfe309e707 pan/bi: Implement interpolateAtOffset
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 7ec9dc98d7 pan/bi: Add imm_f16 helper
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig e4ae458df8 pan/bi: Implement interpolateAtSample
Passes dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_sample.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 1f265ef6c1 pan/bi: Preload sample ID for sample shading
Used in the LD_VAR_IMM. Wondering if preload requirements shouldn't
instead be pushed from the compiler based on actual usage instead of
guessing from the NIR...

Fixes dEQP-GLES31.functional.shaders.multisample_interpolation.sample_qualifier.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 96ea2c3e9d pan/bi: Elucidate slot 6/7 operation
Used to order fragments. With that clarified it's clear that we need to
wait on slot 7 for LD_TILE too (outside the limited context of a blend
shader).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 7f2d618867 pan/bi: Flesh out LD_TILE emit
Needs to support non-blend shader operation (conversion descriptor
sourced from a sysval), as well as MRT. Fixes fbfetch on Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig cff5c40fc3 pan/bi: Fix blend shaders using LD_TILE with MRT
Don't hardcode the RT to 0. Affects ES3.0 which already exposes MRT --
despite no dEQP coverage of this particular corner case, apps could hit
this in the wild on 21.0. Fixes

dEQP-GLES31.functional.draw_buffers_indexed.overwrite_indexed.common_blend_func_buffer_blend_func

Fixes: c7e1ef7c0c ("panfrost: Advertise ES3.0 on Bifrost")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 9151329fd2 pan/bi: Implement shader_clock intrinsic
Trivial.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 8081811f2e pan/bi: Implement image_atomic_comp_swap
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 078a84f474 pan/bi: Implement image_atomic_exchange
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Icecream95 afe4f0e6b1 pan/bi: nir_intrinsic_image_size support
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Icecream95 075d9a1084 pan/bi: Implement image load/store
v2 (Alyssa): Split out functions, support 3D/array

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 1c495323ce pan/bi: Materialize *DTSEL_IMM in the scheduler
We want to be able to set a descriptor table and have the instruction
pair "magically" come to be. To do so, we adjust the definition of
DTSEL_IMM (deviating a bit from the architectural definition but in
practice simplifying disassembly immensely) and add a scheduler
lowering. This ensures DTSEL is always paired correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Icecream95 71f849a292 pan/bi: Remove check for first_ubo_is_default_ubo
It won't be set for OpenCL.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig cd21f0e1c5 pan/bi: Handle computational atomics
All the same formula: calculate an address, emit a pseudoinstruction for
the atomic, emit a postprocess that can be DCE'd if not needed.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 8358321801 pan/bi: Add ATOM_C1 promotion check
Optimizes atomic counters.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig b9d277f644 pan/bi: Extract bi_atom_opc from NIR intrinsic
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig f1adbd5d33 pan/bi: Lower atomic pseudo-instructions
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig c51c3a8fe3 pan/bi: Add 32-bit atomic pseudoinstruction
To enable scheduler lowering to an ATOM_CX pair.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig a687d11093 pan/bi: Add SEG_ADD.i64 pseudoinstruction
Expands to a pair *SEG_ADD/+SEG_ADD, which is used for lowering shared
atomics.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig d31df8416b pan/bi: Allow @rNULL with tied operands
Will enable DCE of atomics.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 111255512a pan/bi: Don't read alpha out of bounds
RT#0 may not have alpha, do something safe instead of risking issues
with RA later.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 68539ba5eb pan/bi: Fix LD_GCLK staging count
64-bit result

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 5f84568a71 pan/bi: Don't inline 64-bit constants
Will drop the upper bits incorrectly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 69f11f9e26 pan/bi: Fix RA of node 0 again
Botched rebase.

Fixes: c578ca7393 ("pan/bi: Add interference per clause")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 88ede65be8 panfrost: Remove useless check
Already checked in format_supported (only difference being cube map
arrays but the extension isn't advertised yet anyway due to missing
geometry shaders.)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 2be7c89d48 panfrost: Set border colour on Bifrost sampler
Passes dEQP-GLES31.functional.texture.border_clamp.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig fa251afb82 panfrost: Take panfrost_dev for AFBC selection
This appears to be architecture dependent.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 6a5052d836 panfrost: Spell fix
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 50f32bb6e2 panfrost: Fix NULL deref for an empty frag shader
Fixes debug builds of dEQP-GLES31.functional.stencil_texturing.render.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig fa9046b262 panfrost: Add RT conversion sysval
Contains the InternalConversionDescriptor corresponding to the selected
render target, ready to be fed into LD_TILE.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 7dc60fc3c8 panfrost: Export bifrost_get_blend_desc with type size
Will be used to lower EXT_shader_framebuffer_fetch on Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 9d2b2e3c67 panfrost: Flesh out allow_forward_pixel_to_kill check
A few cases missed, probably some more bugs hidden here!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 2e83481a1a panfrost: Handle PIPE_FORMAT_NONE as 'constant'
We can use the constant format anywhere safely as a 0-component format,
which will map fine for PIPE_FORMAT_NONE. Used so
ARB_framebuffer_no_attachments can probe.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig b3e3daa603 panfrost: Flesh out pixel kill / zs update
Add some notes on what the useful combinations do and flesh out the
logic. Fixes fails in
dEQP-GLES31.functional.image_load_store.early_fragment_tests.*

It's still not entirely clear to me what the difference between "force
early" and "weak early" is from the driver's perspective, though I
suspect there are performance implications to getting it wrong. Follow
what the blob does in case of doubt..

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig a25b9cd8d0 panfrost: Track coverage, early fragment tests
These extra pieces of data are needed to correctly compute pixel kill /
zs update settings.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 3399673ba4 panfrost: Label groups in GenXML
Helps debug pandecode issues.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig ba3ad38260 pan/decode: Disambiguate border colours
Can be small ints that will just be 0.0 if interpreted as float.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig bc494b30b7 pan/decode: Pretty print 22-bit pixel formats
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Suggested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:21 +00:00
Alyssa Rosenzweig 61584bb4e8 pan/decode: Fix tiler printing on Bifrost
Fixes: 9d682ad7f9 ("pan/decode: Only print local storage for vertex jobs")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:21 +00:00