Commit Graph

146287 Commits

Author SHA1 Message Date
Edward O'Callaghan 3200669c2b clover: Implement CL_MEM_OBJECT_IMAGE1D_BUFFER
v2: Consider surface height as valid when unused by using 1.
     Fixup width boundary checking.
v3 (Karol): Pull in changes from later commits
v4:(airlied): use max_buffer_size as the limit (Fixes CTS test)

Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13401>
2021-10-18 12:23:41 +10:00
Edward O'Callaghan 0ec5e50d8a clover: Implement CL_MEM_OBJECT_IMAGE2D_ARRAY
v2: Ensure we pass in row_pitch state as well.
v3 (Karol): Pull in changes from later commits

Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13401>
2021-10-18 12:23:00 +10:00
Aaron Watry 0abfbb76ff clover: implement CL_IMAGE_BUFFER
We will also need it to implement image1Dbuffer_t

v2 (Karol Herbst): extracted from other commit

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13401>
2021-10-18 12:22:41 +10:00
Edward O'Callaghan 3298ee546e clover/images: Add array_size to implement CL_IMAGE_ARRAY_SIZE
This will be needed to implement array immages.

v2 (Karol Herbst): Extracted from other commit
                   Fix clEnqueueMapImage for arrays
                   Add some basic support for image arrays

Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13401>
2021-10-18 12:22:21 +10:00
Karol Herbst 029f22e430 clover/image: add templated basic_image class to simplify image subclassing
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13401>
2021-10-18 12:22:01 +10:00
Karol Herbst f6ecd284e5 spirv: Don't add 0.5 to array indicies for OpImageSampleExplicitLod
This fixes CLs 1.2 1Darray and 2Darray images.

Fixes: 589d918a4f
       ("spirv: Add 0.5 to integer coordinates for OpImageSampleExplicitLod")

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13401>
2021-10-18 12:21:52 +10:00
Juan A. Suarez Romero ab2cfeba48 vc4/ci: update expected results
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13397>
2021-10-17 23:41:02 +02:00
Dave Airlie 17a565e0cf llvmpipe: fix userptr for texture resources.
This is needed for CL image hostptr support, but it's possible
it could hit these paths from GL/Vulkan

Fixes: 9a57dceeb7 ("llvmpipe: add support for user memory pointers")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13375>
2021-10-18 06:30:07 +10:00
Alyssa Rosenzweig d31ca63527 panfrost: Don't allow rendering/texturing 48-bit
Matches freedreno. Fixes crashes in Piglit arb_texture_view.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13394>
2021-10-16 23:49:13 +00:00
Derek Foreman 28d12716e8 egl/wayland: Properly clear stale buffers on resize
The following chain of events results in an incorrectly sized buffer
persisting beyond its useful lifetime, and causing visual artifacts.

buffer is attached at size A
window is resized to size B
rendering takes place for size B
window is resized back to size A
swapbuffers with damage is called

In this scenario, update_buffers fails to recognize that the surface it's
about to commit is a different size than it has rendered. The
attached_width and attached_height are set incorrectly, and periodic
flickering is observed.

Instead, we set a boolean flag at time of resize and use this at the time
we latch the window dimensions as surface dimensions to decide whether to
discard stale buffers.

Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13270>
2021-10-16 19:13:58 +00:00
Marek Olšák 885f9b3b75 radeonsi: don't memcmp inlined uniform values if uniform inlining is disabled
This uses a C++ template to compute the memcmp size at compile time,
which is important for getting inlined memcmp.

There are 4 different key sizes now:

    GE with inlined uniforms:    68 bytes
    GE without inlined uniforms: 52 bytes
    PS with inlined uniforms:    28 bytes
    PS without inlined uniforms: 12 bytes

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13285>
2021-10-16 10:41:51 +00:00
Marek Olšák 8c5a32b5fe radeonsi: split si_shader_key into ps and ge parts to minimize memcmp overhead
ps is for the pixel shader, while ge is for VS, TCS, TES, and GS.

si_shader_key: 68 bytes
si_shader_key_ge: 68 bytes
si_shader_key_ps: 28 bytes

The only notable change is that si_shader_select_with_key is changed
to a C++ template. Other changes are trivial.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13285>
2021-10-16 10:41:51 +00:00
Marek Olšák 385c9e1caf radeonsi: si_state_shaders.c -> cpp
We'll add some templates here.

Why is `extern "C"` not needed for exported functions?

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13285>
2021-10-16 10:41:51 +00:00
Marek Olšák 8a42ea69a6 gallium/util: add some extern "C" guards
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13285>
2021-10-16 10:41:51 +00:00
Jason Ekstrand b62b2fa4b9 compiler/types: Add a wrap_in_arrays helper
This has been copied+pasted 3 times now.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13389>
2021-10-16 05:49:34 +00:00
Jason Ekstrand 5818d47ae6 spirv: Use texture types for sampled images
Instead of using gsamplerND types for sampled images, use the new
gtextureND types for sampled images and reserve gsamplerND for combined
image+samplers.  Combined image+sampler bindings still get a gsamplerND
type.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13389>
2021-10-16 05:49:34 +00:00
Jason Ekstrand 99cda38c81 clover/nir: Don't remove texture variables
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13389>
2021-10-16 05:49:34 +00:00
Jason Ekstrand 3c398139e1 lavapipe: Allow for texture types
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13389>
2021-10-16 05:49:34 +00:00
Jason Ekstrand b8a0bf2343 nir/deref: Also optimize samplerND -> textureND casts
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13389>
2021-10-16 05:49:34 +00:00
Jason Ekstrand 2ab5546a96 nir: Allow texture types
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13389>
2021-10-16 05:49:34 +00:00
Jason Ekstrand 3ace6b968b compiler/types: Add a texture type
This is separate from images and samplers.  It's a texture (not a
storage image) without a sampler.  We also add C-visible helpers to
convert between sampler and image types.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13389>
2021-10-16 05:49:34 +00:00
Jason Ekstrand 7558c9cb07 compiler/types: Unify the guts of get_sampler/image_count
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13389>
2021-10-16 05:49:34 +00:00
Jason Ekstrand 175f33e88f compiler/types: Combine image and sampler type serialization
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13389>
2021-10-16 05:49:34 +00:00
Yiwei Zhang 2d58e31f10 dri_interface: remove gl header
Only gl typedefs are used. So just remove the header and update the
types to the underlying types.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13387>
2021-10-16 04:48:40 +00:00
Yiwei Zhang e19d9046db dri_interface: remove obsolete interfaces
Below are removed:
__DRI_FRAME_TRACKING
__DRI_TEX_OFFSET
__DRI_GET_DRAWABLE_INFO

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13387>
2021-10-16 04:48:39 +00:00
Jason Ekstrand d343aef942 nir/serialize: Pack deref modes better
With nir_var_image, we've now run out of bits in our packed blob for
deref instructions.  We could revert to an unpacked blob or we could be
a bit more clever about how we encode deref modes and pack them into 5
bits.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13386>
2021-10-16 03:47:10 +00:00
Jason Ekstrand 9272a952c9 nir: Re-arrange the variable modes
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13386>
2021-10-16 03:47:10 +00:00
Jason Ekstrand 956199e870 nir: s/nir_var_mem_image/nir_var_image/g
We typically use nir_var_mem_* for stuff that has an explicit byte-based
memory layout.  Images are opaque.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13386>
2021-10-16 03:47:10 +00:00
Dylan Baker e73096bd6d meson: use gtest protocol for gtest based tests when possible
With the `gtest` protocol meson will add some extra arguments to the
test to generate better junit results, which may be useful. This
protocol is only available in meson 0.55.0+, so keep using the default
`exitcode` protocol for meson older than that.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8484>
2021-10-16 03:22:24 +00:00
Enrico Galli aac47c4b24 microsoft/compiler: Shadow tex instructions always use shadow samplers
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13321>
2021-10-16 00:12:04 +00:00
Mike Blumenkrantz fe2674dd52 aux/pb: more correctly check number of reclaims
the increment needs to happen before the comparison here

Fixes: 3d6c8829f5 ("aux/pb: add a tolerance for reclaim failure")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13388>
2021-10-15 23:36:48 +00:00
Jason Ekstrand 58f605e4d4 nir: Drop our attempt at typed-based image mode validation
This is broken for bindless images declared as local variables.  It
turns out nir_variable::data::bindless is only used for uniforms and we
already assume anything in nir_var_function_temp or similar is bindless.
We could try to make a tricky assert but now that we have everything
else passing but now that we've got everyone converted the extra
validation probably isn't necessary.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13384>
2021-10-15 22:35:59 +00:00
Marcin Ślusarz d05f7b4a2c intel: fix INTEL_DEBUG environment variable on 32-bit systems
INTEL_DEBUG is defined (since 4015e1876a) as:

 #define INTEL_DEBUG __builtin_expect(intel_debug, 0)

which unfortunately chops off upper 32 bits from intel_debug
on platforms where sizeof(long) != sizeof(uint64_t) because
__builtin_expect is defined only for the long type.

Fix this by changing the definition of INTEL_DEBUG to be function-like
macro with "flags" argument. New definition returns 0 or 1 when
any of the flags match.

Most of the changes in this commit were generated using:
for c in `git grep INTEL_DEBUG | grep "&" | grep -v i915 | awk -F: '{print $1}' | sort | uniq`; do
    perl -pi -e "s/INTEL_DEBUG & ([A-Z0-9a-z_]+)/INTEL_DBG(\1)/" $c
    perl -pi -e "s/INTEL_DEBUG & (\([A-Z0-9_ |]+\))/INTEL_DBG\1/" $c
done
but it didn't handle all cases and required minor cleanups (like removal
of round brackets which were not needed anymore).

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13334>
2021-10-15 19:55:14 +00:00
Mike Blumenkrantz 182237e1e8 virgl: remove unused pipebuffer include
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13385>
2021-10-15 19:03:46 +00:00
Mike Blumenkrantz 3d6c8829f5 aux/pb: add a tolerance for reclaim failure
originally, a slab attempts to reclaim a single bo. there are two outcomes
to this which can occur:
* the bo is reclaimed
* the bo is not reclaimed

if the bo is reclaimed, great.

if the bo is not reclaimed, it remains at the head of the list until it can
be reclaimed. this means that any bo with a "long" work queue which makes it
into a slab will effectively kill the entire slab. in a benchmarking scenario,
this can occur in rapid succession, and every slab will get 1-2 suballocations
before it reaches a bo that blocks long enough for a new slab to be needed.

the inevitable result of this scenario is that all memory is depleted almost instantly,
all because pb assumes that if the first bo in the reclaim list isn't ready, none of them
can be ready

for drivers like radeonsi, this happens to be a fine assumption

for drivers like zink, this is entirely not workable and explodes the gpu

Cc: mesa-stable

Reviewed-by: Witold Baryluk <witold.baryluk@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Witold Baryluk <witold.baryluk@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13345>
2021-10-15 17:46:51 +00:00
Caio Marcelo de Oliveira Filho 29177c7cee intel/compiler: Build all tests in a single binary
With gtest is possible to filter execution and run only a specific
test suite or individual test, so there's no particular reason here to
generate multiple binaries for the tests of a single module.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13303>
2021-10-15 10:06:51 -07:00
Caio Marcelo de Oliveira Filho 35b6990706 intel/compiler: Rename vec4 test fixtures
Include vec4 in their names to avoid same names as the fs
counterparts.  This will allow compiling all the tests together in the
future.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13303>
2021-10-15 10:06:51 -07:00
Rob Clark 0480595d03 freedreno/isa: Add immed reg accessors
This way we can assert that a src that we expect to be an immediate
actually is.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark e08d152d68 isaspec: Add bitfield size assertions
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark 4166635bd1 isaspec: Do not emit duplicate field encodes
If an <override> overrides the definition of a field, don't emit
encoding for both the override's definition and the fallback.  (See
"SAMP" in #cat5-src3).  It is harmless currently, because (in this
case) it will just re-encode the low bits of "SAMP".  But when we
start asserting on that the field being encoded fits in the allowed
number of bits, the re-encoding of the fallback field definition
will start triggering asserts.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark e01759e6f3 isaspec: Fix derived field width
The low/high bit positions should be integers.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark 5b6e5db5d0 freedreno/ir3: Don't lower s2en if samp/tex is too large
We only have four bits to encode an immediate samp/tex.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark bfd8b7c930 freedreno/ir3/tests: Add additional disasm test vectors
Add branch with negative offset, and a couple others to trigger issues I
found while adding pack_field() overflow asserts.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark c0ecfeb023 freedreno/ir3/tests: Fix indentation
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark 8b0550f09f freedreno/isa: Fixes for validation
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark 9516d8ce98 freedreno/ir3+isa: Cleanup bindless cat5 samp/tex encoding
Don't let the way they are encoded at the isa level leak thru to the
ir3 level.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Jason Ekstrand d43f89f17a ir3: Images are always nir_var_mem_image
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jesse Natalie 9601556079 microsoft/clc: Images use nir_var_mem_image
The only big change is that lower_vars_to_explicit no longer assigns
a driver_location for images. That means that the storage for the
format/order loads is no longer implicitly "allocated" in the middle
of the kernel args. Instead, manually add the storage for that to the end
of the input args buffer.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand 26d603da07 nir/gl_nir_lower_images: Require nir_var_mem_image
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand e6cce80976 intel/fs: Stop emitting TGM fences for nir_var_mem_ssbo
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00