Commit Graph

128599 Commits

Author SHA1 Message Date
Pierre-Eric Pelloux-Prayer 2479689968 radeonsi/tmz: add workaround for mpv/vaapi subtitles
Subtitles are rendering with an upload through a staging texture.
So the sequence is:
  1. draw video (with a secure cs)
  2. copy staging texture to the real texture (via si_resource_copy_region) in
    a non-secure cs.
  3. draw video (with a secure cs)

Step 2 and 3 both generates a flush with RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION.
These flushes are executed quite late: right before doing the draw/dispatch,
so maybe the issue here is the handling of dependencies.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
2020-09-24 14:51:16 +00:00
Pierre-Eric Pelloux-Prayer 2c6643546a radeonsi/tmz: add a tmz variant for sctx::eop_bug_scratch
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
2020-09-24 14:51:16 +00:00
Pierre-Eric Pelloux-Prayer 133895574c radeonsi: disable primitive discard if tmz is in use
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
2020-09-24 14:51:16 +00:00
Pierre-Eric Pelloux-Prayer 8e2768bbfb radeonsi/tmz: add tmz variant for sctx::tess_rings
tess_rings must be encrypted when used in a secure job so this commit
introduces a tess_rings_tmz resource.

The cs_preamble_state doesn't contain the tess_rings address anymore since
it can change. The tess_rings related registers go in a separate preamble.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
2020-09-24 14:51:16 +00:00
Pierre-Eric Pelloux-Prayer 2589888ce9 radeonsi/tmz: add tmz variant of sctx::wait_mem_scratch
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
2020-09-24 14:51:16 +00:00
Pierre-Eric Pelloux-Prayer de088daccc radeonsi/tmz: fail si_texture_transfer_map if tex is encrypted
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
2020-09-24 14:51:16 +00:00
Pierre-Eric Pelloux-Prayer 55b018b634 amd/winsys: add RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION
Instead of exposing a cs_set_secure() callback that always needs a call
to si_flush_gfx_cs before a switch, this commit introduces a new
flag to switch between secure and non-secure on submissions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
2020-09-24 14:51:16 +00:00
Pierre-Eric Pelloux-Prayer 1b0d660cbc radeonsi/tmz: allow secure job if the app made a tmz allocation
This commit makes TMZ always allowed instead of being either off or forced-on
with AMD_DEBUG=tmz.

With this change:
- secure job can be used as soon as the application made a tmz allocation. Driver
  internal allocations are not enough to enable secure jobs (if tmz is supported
  and enabled by the kernel)
- AMD_DEBUG=tmz forces all scanout/depth/stencil buffers to be allocated as TMZ.
  This is useful to test app thats don't explicitely support protected content.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
2020-09-24 14:51:16 +00:00
Pierre-Eric Pelloux-Prayer f5ec617677 ac/gpu_info: add detection of TMZ support
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
2020-09-24 14:51:16 +00:00
Pierre-Eric Pelloux-Prayer 846e393142 amd: add AMDGPU_IDS_FLAGS_TMZ definition to amdgpu_drm.h
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
2020-09-24 14:51:16 +00:00
Pierre-Eric Pelloux-Prayer 5e4aecec93 radeonsi: introduce SI_RESOURCE_FLAG_INTERNAL / RADEON_FLAG_DRIVER_INTERNAL
Tag allocations as driver internal.
Some of these allocations will need to be doubled to handle TMZ (one secure bo,
one normal bo) but these allocations shouldn't switch the winsys in "the app
is using TMZ".

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
2020-09-24 14:51:16 +00:00
Pierre-Eric Pelloux-Prayer 131412cc4d radeonsi/tmz: allocate depth/stencil buffers as encrypted
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
2020-09-24 14:51:16 +00:00
Pierre-Eric Pelloux-Prayer 0a59d2a3e9 radeonsi/tmz: add safety assert when tmz is enabled
This commit adds asserts verifying the following conditions when
using a secure job:
- fb textures are encrypted (both colors and depth/stencil buffers)
- all writeable bo are encrypted

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
2020-09-24 14:51:16 +00:00
Pierre-Eric Pelloux-Prayer 59b267dea4 radeonsi/tmz: use secure job if using an encrypted z/s buffer
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
2020-09-24 14:51:16 +00:00
Pierre-Eric Pelloux-Prayer 5bc24fe283 radeonsi/tmz: use secure job if framebuffer has dcc
Fixes a hang with DCC.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
2020-09-24 14:51:16 +00:00
Jonathan Marek cec0bc73e5 turnip: rework fences to use syncobjs
Fences are now just a syncobj, which makes our life easier.

The next step will be to fill out ImportFenceFdKHR()/GetFenceFdKHR().

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6683>
2020-09-24 14:37:13 +00:00
Jonathan Marek c23206757a turnip: require syncobj support
Note: this means turnip requires kernel 5.8 (or older with syncobj patch).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6683>
2020-09-24 14:37:13 +00:00
Jonathan Marek 89ffe859a8 turnip: add a fd field to tu_device
Avoid the extra indirect for this commonly used field.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6683>
2020-09-24 14:37:13 +00:00
Jonathan Marek ec4fe92c83 turnip: delete unused tu_fence_signal function
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6683>
2020-09-24 14:37:13 +00:00
Erik Faye-Lund 9e13a16c97 mesa: handle GL_FRONT after translating to it
Without this, we end up throwing errors on code along these lines when
rendering using single-buffering:

GLint att;
glGetIntegerv(GL_READ_BUFFER, &att);
glGetFramebufferAttachmentParameteriv(GL_READ_FRAMEBUFFER, att, ...);

This is because we internally translate GL_BACK (which is what
glGetIntegerv returned) to GL_FRONT, which we don't handle in the
Desktop GL case. So let's start handling it.

This fixes the GLTF-GL33.gtf21.GL2FixedTests.buffer_color.blend_color
test for me.

Fixes: e6ca6e587e ("mesa: Handle pbuffers in desktop GL framebuffer attachment queries")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6815>
2020-09-24 14:11:29 +00:00
Samuel Pitoiset 005d9d2219 ci: adjust RadeonSI rules
src/amd/vulkan is specific to RADV and shouldn't trigger RadeonSI CI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6839>
2020-09-24 13:54:49 +00:00
Jonathan Marek 4c71cda9ab vulkan/wsi/display: add option for display fence to signal syncobj
To avoid having a separate "wsi_fence" path in the driver, make it so wsi
fences can signal a syncobj.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6707>
2020-09-24 13:20:00 +00:00
Marek Olšák 32d754825c radeonsi: always inline draw-related functions that have only one use
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
2020-09-24 13:08:03 +00:00
Marek Olšák f24b5894f8 radeonsi: lift the conditional for skipping si_upload_vertex_buffer_descriptors
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
2020-09-24 13:08:03 +00:00
Marek Olšák 0b2f75f9ac radeonsi: add unlikely statements into si_draw_vbo
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
2020-09-24 13:08:03 +00:00
Marek Olšák 8ab15c9e33 radeonsi: move si_upload_vertex_buffer_descriptors into si_state_draw.c
It will be inlined there.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
2020-09-24 13:08:03 +00:00
Marek Olšák 12b1e8a35d radeonsi: reorganize the code around the gfx9 scissor bug
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
2020-09-24 13:08:03 +00:00
Marek Olšák 532259b8a3 radeonsi: don't call emit_cache_flush after uploading bindless descriptors
The next draw call will do it.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
2020-09-24 13:08:03 +00:00
Marek Olšák d647065b06 radeonsi: move a displaced comment in si_draw_vbo
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
2020-09-24 13:08:03 +00:00
Marek Olšák 816a867bbd radeonsi: call si_upload_graphics_shader_descriptors before the big conditional
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
2020-09-24 13:08:03 +00:00
Marek Olšák 0051f2cb2a radeonsi: use optimal order of operations when setting up a compute dispatch
The order is:
- set registers
- flush caches
- set render condition
- prefetch the shader
- set registers that may be read from memory (indirect draw)
- dispatch

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
2020-09-24 13:08:03 +00:00
Icecream95 e560028c8e panfrost: Remove redundant casts of viewport position
The position is already converted to int when clamping to framebuffer
size.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6840>
2020-09-24 12:56:31 +00:00
Icecream95 3d0ae7a9da panfrost: Handle non-positive viewport positions
It's possible for viewport positions to be negative, so add a lower
bound of zero and avoid wraparound when maximum values are zero.

Fixes the menu blur effect in the OpenGL 3.3 render of GZDoom.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6840>
2020-09-24 12:56:31 +00:00
Icecream95 2aa48bb5a8 panfrost: Clamp uniform buffer size
Issue (57) for the ARB_uniform_buffer_object spec states:
    "The uniform buffer could be larger than the amount of uniform
    block(s) data inside it."

This means we need to clamp the uniform buffer size in case it is
bigger than what hardware supports.

Fixes the OpenGL 3.3 renderer of GZDoom.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6835>
2020-09-24 12:43:19 +00:00
Marek Olšák 939ddf3f67 nir: replace lower_ffma and fuse_ffma with has_ffma
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6756>
2020-09-24 12:29:11 +00:00
Marek Olšák f1284505f0 radeonsi: fuse or lower ffma optimally on all chips
LLVM is going to support the legacy instructions soon.

This change switches FMA to MAD for gfx10.

54793 shaders in 33659 tests
Totals:
SGPRS: 2632554 -> 2629570 (-0.11 %)
VGPRS: 1536364 -> 1535312 (-0.07 %)
Spilled SGPRs: 3602 -> 3562 (-1.11 %)
Spilled VGPRs: 44 -> 40 (-9.09 %)
Private memory VGPRs: 256 -> 256 (0.00 %)
Scratch size: 312 -> 308 (-1.28 %) dwords per thread
Code Size: 55422660 -> 55345408 (-0.14 %) bytes
Max Waves: 963983 -> 964200 (0.02 %)

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6756>
2020-09-24 12:29:11 +00:00
Marek Olšák 771aad3027 nir: split lower_ffma into lower_ffma16/32/64
AMD wants different behavior for each bit size

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6756>
2020-09-24 12:29:11 +00:00
Marek Olšák 21174dedec nir: split fuse_ffma into fuse_ffma16/32/64
AMD wants different behavior for each bit size

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6756>
2020-09-24 12:29:11 +00:00
Pierre-Eric Pelloux-Prayer c58b46edf0 radeonsi: force linear for textures with height=1 (gfx6-8)
addrlib will force it only for level = 0, so force it when we create
a height=1/multi-level texture.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2250
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6775>
2020-09-24 12:17:35 +00:00
Marek Olšák 5f27777379 radeonsi: add a tweak for PS wave CU utilization for gfx10.3
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6822>
2020-09-24 11:55:06 +00:00
Marek Olšák b5debe180e radeonsi: break a binning batch on a new PS if bins can use multiple state sets
ported from PAL

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6822>
2020-09-24 11:55:06 +00:00
Marek Olšák 972fb0368c radeonsi: move binning parameters into si_screen
it will be used in the next commit

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6822>
2020-09-24 11:55:06 +00:00
Marek Olšák 8b134fb915 radeonsi: set KEEP_TOGETHER_ENABLE if needed
ported from PAL

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6822>
2020-09-24 11:55:06 +00:00
Alyssa Rosenzweig 28a76161e5 pan/bi: Remove old register mode definitions
Now replaced by canonical equivalents.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
2020-09-24 11:27:22 +00:00
Alyssa Rosenzweig 7a0f3b607e pan/bi: Use canonical register packing
This better matches the hardware behaviour and will allow us to
implement write masks down the line.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
2020-09-24 11:27:22 +00:00
Alyssa Rosenzweig 514da97cca pan/bi: Rename port -> slot
To match the canonical naming convention.

$ sed -i -e 's/\([_ \.>"!]\)[pP]ort\([ ,'"'"'_0123s\(\[]\)/\1slot\2/g' *.c *.h

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
2020-09-24 11:27:22 +00:00
Alyssa Rosenzweig c749803dbb pan/bi: Decode all 32-bit register modes
There's actually more than 16 of them, disambiguated by `r2 == r3` and
`first?` as conditions for another "fun" encoding. The extra space
allows for writing half-registers.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
2020-09-24 11:27:22 +00:00
Alyssa Rosenzweig bdb33f7529 pan/bi: Pass 'first' through disassembler
Required to decode the registers of the first instruction of a clause
correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
2020-09-24 11:27:22 +00:00
Alyssa Rosenzweig 4d3d5a66c9 pan/bi: Add bifrost_reg_mode enum
This generalizes the previous control field, adding in the full set of
enums required for 16-bit writemasks.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
2020-09-24 11:27:22 +00:00
Alyssa Rosenzweig b392c07983 pan/bi: Disassemble PC-relative addresses
Apply whatever modifier we computed and symbolically work out the
behaviour of the hardware. This involves some pretty gnarly primitives
(e.g. 28-bit sign extensions) but seems to works ok.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
2020-09-24 11:27:22 +00:00