2010-05-08 21:09:24 +01:00
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/*
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* Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Jerome Glisse
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* Corbin Simpson
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*/
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2010-08-22 19:22:00 +01:00
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#include <errno.h>
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2010-05-08 21:09:24 +01:00
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#include <pipe/p_screen.h>
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#include <util/u_format.h>
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#include <util/u_math.h>
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#include <util/u_inlines.h>
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#include <util/u_memory.h>
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2010-06-24 01:10:18 +01:00
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#include "state_tracker/drm_driver.h"
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2010-10-15 14:44:30 +01:00
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#include "pipebuffer/pb_buffer.h"
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2010-09-29 19:26:29 +01:00
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#include "r600_pipe.h"
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2010-07-28 17:18:19 +01:00
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#include "r600_resource.h"
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2010-08-22 19:22:00 +01:00
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#include "r600_state_inlines.h"
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2010-08-12 07:06:40 +01:00
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#include "r600d.h"
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2010-10-06 03:49:26 +01:00
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#include "r600_formats.h"
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2010-05-08 21:09:24 +01:00
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2010-05-10 02:27:58 +01:00
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extern struct u_resource_vtbl r600_texture_vtbl;
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2010-11-02 17:51:34 +00:00
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/* Copy from a full GPU texture to a transfer's staging one. */
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static void r600_copy_to_staging_texture(struct pipe_context *ctx, struct r600_transfer *rtransfer)
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2010-08-22 03:49:22 +01:00
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{
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struct pipe_transfer *transfer = (struct pipe_transfer*)rtransfer;
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struct pipe_resource *texture = transfer->resource;
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struct pipe_subresource subdst;
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subdst.face = 0;
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subdst.level = 0;
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2010-11-02 17:51:34 +00:00
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ctx->resource_copy_region(ctx, rtransfer->staging_texture,
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2010-08-22 03:49:22 +01:00
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subdst, 0, 0, 0, texture, transfer->sr,
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transfer->box.x, transfer->box.y, transfer->box.z,
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transfer->box.width, transfer->box.height);
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}
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2010-10-12 02:54:16 +01:00
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2010-11-02 17:51:34 +00:00
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/* Copy from a transfer's staging texture to a full GPU one. */
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static void r600_copy_from_staging_texture(struct pipe_context *ctx, struct r600_transfer *rtransfer)
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2010-10-12 02:54:16 +01:00
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{
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struct pipe_transfer *transfer = (struct pipe_transfer*)rtransfer;
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struct pipe_resource *texture = transfer->resource;
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struct pipe_subresource subsrc;
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subsrc.face = 0;
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subsrc.level = 0;
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ctx->resource_copy_region(ctx, texture, transfer->sr,
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transfer->box.x, transfer->box.y, transfer->box.z,
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2010-11-02 17:51:34 +00:00
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rtransfer->staging_texture, subsrc,
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2010-10-12 02:54:16 +01:00
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0, 0, 0,
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transfer->box.width, transfer->box.height);
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ctx->flush(ctx, 0, NULL);
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}
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2010-10-13 02:08:44 +01:00
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static unsigned r600_texture_get_offset(struct r600_resource_texture *rtex,
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2010-07-28 17:18:19 +01:00
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unsigned level, unsigned zslice,
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unsigned face)
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2010-05-08 21:09:24 +01:00
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{
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2010-10-13 02:08:44 +01:00
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unsigned offset = rtex->offset[level];
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2010-05-08 21:09:24 +01:00
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2010-07-28 17:18:19 +01:00
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switch (rtex->resource.base.b.target) {
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2010-05-08 21:09:24 +01:00
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case PIPE_TEXTURE_3D:
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assert(face == 0);
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return offset + zslice * rtex->layer_size[level];
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case PIPE_TEXTURE_CUBE:
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assert(zslice == 0);
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return offset + face * rtex->layer_size[level];
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default:
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assert(zslice == 0 && face == 0);
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return offset;
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}
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}
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2010-10-21 04:27:07 +01:00
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static unsigned r600_get_pixel_alignment(struct pipe_screen *screen,
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enum pipe_format format,
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unsigned array_mode)
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{
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2010-10-21 04:37:54 +01:00
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struct r600_screen* rscreen = (struct r600_screen *)screen;
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unsigned pixsize = util_format_get_blocksize(format);
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int p_align;
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switch(array_mode) {
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case V_038000_ARRAY_1D_TILED_THIN1:
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p_align = MAX2(8,
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((rscreen->tiling_info->group_bytes / 8 / pixsize)));
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break;
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case V_038000_ARRAY_2D_TILED_THIN1:
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p_align = MAX2(rscreen->tiling_info->num_banks,
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(((rscreen->tiling_info->group_bytes / 8 / pixsize)) *
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2010-11-18 02:30:09 +00:00
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rscreen->tiling_info->num_banks)) * 8;
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2010-10-21 04:37:54 +01:00
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break;
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2010-11-18 02:30:09 +00:00
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case V_038000_ARRAY_LINEAR_GENERAL:
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2010-10-21 04:37:54 +01:00
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default:
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2010-11-18 02:30:09 +00:00
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p_align = rscreen->tiling_info->group_bytes / pixsize;
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2010-10-21 04:37:54 +01:00
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break;
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}
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return p_align;
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2010-10-21 04:27:07 +01:00
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}
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static unsigned r600_get_height_alignment(struct pipe_screen *screen,
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unsigned array_mode)
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{
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2010-10-21 04:37:54 +01:00
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struct r600_screen* rscreen = (struct r600_screen *)screen;
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int h_align;
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switch (array_mode) {
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case V_038000_ARRAY_2D_TILED_THIN1:
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h_align = rscreen->tiling_info->num_channels * 8;
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break;
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case V_038000_ARRAY_1D_TILED_THIN1:
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h_align = 8;
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break;
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default:
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h_align = 1;
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break;
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}
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return h_align;
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2010-10-21 04:27:07 +01:00
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}
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2010-11-18 02:30:09 +00:00
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static unsigned r600_get_base_alignment(struct pipe_screen *screen,
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enum pipe_format format,
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unsigned array_mode)
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{
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struct r600_screen* rscreen = (struct r600_screen *)screen;
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unsigned pixsize = util_format_get_blocksize(format);
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int p_align = r600_get_pixel_alignment(screen, format, array_mode);
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int h_align = r600_get_height_alignment(screen, array_mode);
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int b_align;
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switch (array_mode) {
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case V_038000_ARRAY_2D_TILED_THIN1:
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b_align = MAX2(rscreen->tiling_info->num_banks * rscreen->tiling_info->num_channels * 8 * 8 * pixsize,
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p_align * pixsize * h_align);
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break;
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case V_038000_ARRAY_1D_TILED_THIN1:
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default:
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b_align = rscreen->tiling_info->group_bytes;
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break;
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}
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return b_align;
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}
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2010-10-21 04:20:14 +01:00
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static unsigned mip_minify(unsigned size, unsigned level)
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{
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unsigned val;
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val = u_minify(size, level);
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if (level > 0)
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val = util_next_power_of_two(val);
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return val;
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}
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2010-10-12 00:53:17 +01:00
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static unsigned r600_texture_get_stride(struct pipe_screen *screen,
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struct r600_resource_texture *rtex,
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unsigned level)
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2010-05-08 21:09:24 +01:00
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{
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2010-11-18 02:30:09 +00:00
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struct r600_screen* rscreen = (struct r600_screen *)screen;
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2010-07-28 17:18:19 +01:00
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struct pipe_resource *ptex = &rtex->resource.base.b;
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2010-10-12 00:53:17 +01:00
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struct radeon *radeon = (struct radeon *)screen->winsys;
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enum chip_class chipc = r600_get_family_class(radeon);
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2010-10-21 04:27:07 +01:00
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unsigned width, stride, tile_width;
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2010-11-18 02:30:09 +00:00
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2010-10-12 01:51:03 +01:00
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if (rtex->pitch_override)
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return rtex->pitch_override;
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2010-10-21 04:20:14 +01:00
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width = mip_minify(ptex->width0, level);
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2010-10-21 04:27:07 +01:00
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if (util_format_is_plain(ptex->format)) {
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tile_width = r600_get_pixel_alignment(screen, ptex->format,
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rtex->array_mode[level]);
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width = align(width, tile_width);
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}
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stride = util_format_get_stride(ptex->format, width);
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2010-11-11 16:20:24 +00:00
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2010-10-12 00:53:17 +01:00
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return stride;
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}
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static unsigned r600_texture_get_nblocksy(struct pipe_screen *screen,
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struct r600_resource_texture *rtex,
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unsigned level)
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{
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struct pipe_resource *ptex = &rtex->resource.base.b;
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2010-10-21 04:27:07 +01:00
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unsigned height, tile_height;
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2010-10-12 00:53:17 +01:00
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2010-10-21 04:20:14 +01:00
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height = mip_minify(ptex->height0, level);
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2010-10-21 04:27:07 +01:00
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if (util_format_is_plain(ptex->format)) {
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tile_height = r600_get_height_alignment(screen,
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rtex->array_mode[level]);
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height = align(height, tile_height);
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}
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2010-10-12 00:53:17 +01:00
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return util_format_get_nblocksy(ptex->format, height);
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}
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2010-10-13 02:03:18 +01:00
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/* Get a width in pixels from a stride in bytes. */
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static unsigned pitch_to_width(enum pipe_format format,
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unsigned pitch_in_bytes)
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{
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return (pitch_in_bytes / util_format_get_blocksize(format)) *
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util_format_get_blockwidth(format);
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}
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2010-10-21 04:26:04 +01:00
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static void r600_texture_set_array_mode(struct pipe_screen *screen,
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struct r600_resource_texture *rtex,
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unsigned level, unsigned array_mode)
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{
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2010-10-21 04:37:54 +01:00
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struct pipe_resource *ptex = &rtex->resource.base.b;
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switch (array_mode) {
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case V_0280A0_ARRAY_LINEAR_GENERAL:
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case V_0280A0_ARRAY_LINEAR_ALIGNED:
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case V_0280A0_ARRAY_1D_TILED_THIN1:
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default:
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rtex->array_mode[level] = array_mode;
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break;
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case V_0280A0_ARRAY_2D_TILED_THIN1:
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{
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unsigned w, h, tile_height, tile_width;
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tile_height = r600_get_height_alignment(screen, array_mode);
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tile_width = r600_get_pixel_alignment(screen, ptex->format, array_mode);
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w = mip_minify(ptex->width0, level);
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h = mip_minify(ptex->height0, level);
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if (w < tile_width || h < tile_height)
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rtex->array_mode[level] = V_0280A0_ARRAY_1D_TILED_THIN1;
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else
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rtex->array_mode[level] = array_mode;
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}
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break;
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}
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2010-10-21 04:26:04 +01:00
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}
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2010-10-12 00:53:17 +01:00
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static void r600_setup_miptree(struct pipe_screen *screen,
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2010-10-21 04:26:04 +01:00
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struct r600_resource_texture *rtex,
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unsigned array_mode)
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2010-10-12 00:53:17 +01:00
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{
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struct pipe_resource *ptex = &rtex->resource.base.b;
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struct radeon *radeon = (struct radeon *)screen->winsys;
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enum chip_class chipc = r600_get_family_class(radeon);
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2010-10-13 02:08:44 +01:00
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unsigned pitch, size, layer_size, i, offset;
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2010-10-12 00:53:17 +01:00
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unsigned nblocksy;
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2010-05-08 21:09:24 +01:00
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for (i = 0, offset = 0; i <= ptex->last_level; i++) {
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2010-10-21 04:26:04 +01:00
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r600_texture_set_array_mode(screen, rtex, i, array_mode);
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2010-10-12 00:53:17 +01:00
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pitch = r600_texture_get_stride(screen, rtex, i);
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nblocksy = r600_texture_get_nblocksy(screen, rtex, i);
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layer_size = pitch * nblocksy;
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2010-09-20 06:30:52 +01:00
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if (ptex->target == PIPE_TEXTURE_CUBE) {
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2010-09-21 10:57:15 +01:00
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if (chipc >= R700)
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2010-09-20 06:30:52 +01:00
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size = layer_size * 8;
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else
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size = layer_size * 6;
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}
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2010-05-08 21:09:24 +01:00
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else
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size = layer_size * u_minify(ptex->depth0, i);
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2010-11-18 02:30:09 +00:00
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/* align base image and start of miptree */
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if ((i == 0) || (i == 1))
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offset = align(offset, r600_get_base_alignment(screen, ptex->format, array_mode));
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2010-05-08 21:09:24 +01:00
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rtex->offset[i] = offset;
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rtex->layer_size[i] = layer_size;
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2010-10-13 02:02:52 +01:00
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rtex->pitch_in_bytes[i] = pitch;
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2010-10-13 02:03:18 +01:00
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rtex->pitch_in_pixels[i] = pitch_to_width(ptex->format, pitch);
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2010-07-29 19:51:06 +01:00
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offset += size;
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2010-05-08 21:09:24 +01:00
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}
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rtex->size = offset;
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}
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2010-10-12 01:51:03 +01:00
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static struct r600_resource_texture *
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r600_texture_create_object(struct pipe_screen *screen,
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const struct pipe_resource *base,
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unsigned array_mode,
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unsigned pitch_in_bytes_override,
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unsigned max_buffer_size,
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struct r600_bo *bo)
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2010-05-08 21:09:24 +01:00
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{
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2010-07-28 17:18:19 +01:00
|
|
|
struct r600_resource_texture *rtex;
|
|
|
|
struct r600_resource *resource;
|
2010-09-15 16:47:32 +01:00
|
|
|
struct radeon *radeon = (struct radeon *)screen->winsys;
|
2010-05-08 21:09:24 +01:00
|
|
|
|
2010-07-28 17:18:19 +01:00
|
|
|
rtex = CALLOC_STRUCT(r600_resource_texture);
|
2010-10-12 01:51:03 +01:00
|
|
|
if (rtex == NULL)
|
2010-05-08 21:09:24 +01:00
|
|
|
return NULL;
|
2010-10-12 01:51:03 +01:00
|
|
|
|
2010-07-28 17:18:19 +01:00
|
|
|
resource = &rtex->resource;
|
2010-10-12 01:51:03 +01:00
|
|
|
resource->base.b = *base;
|
2010-07-28 17:18:19 +01:00
|
|
|
resource->base.vtbl = &r600_texture_vtbl;
|
|
|
|
pipe_reference_init(&resource->base.b.reference, 1);
|
|
|
|
resource->base.b.screen = screen;
|
2010-10-12 01:51:03 +01:00
|
|
|
resource->bo = bo;
|
|
|
|
rtex->pitch_override = pitch_in_bytes_override;
|
|
|
|
|
2010-10-18 00:45:58 +01:00
|
|
|
if (array_mode)
|
|
|
|
rtex->tiled = 1;
|
2010-10-21 04:26:04 +01:00
|
|
|
r600_setup_miptree(screen, rtex, array_mode);
|
2010-05-10 02:27:58 +01:00
|
|
|
|
2010-09-16 11:22:09 +01:00
|
|
|
resource->size = rtex->size;
|
2010-10-12 01:51:03 +01:00
|
|
|
|
|
|
|
if (!resource->bo) {
|
2010-11-18 02:30:09 +00:00
|
|
|
struct pipe_resource *ptex = &rtex->resource.base.b;
|
|
|
|
int base_align = r600_get_base_alignment(screen, ptex->format, array_mode);
|
|
|
|
|
|
|
|
resource->bo = r600_bo(radeon, rtex->size, base_align, base->bind, base->usage);
|
2010-10-12 01:51:03 +01:00
|
|
|
if (!resource->bo) {
|
|
|
|
FREE(rtex);
|
|
|
|
return NULL;
|
|
|
|
}
|
2010-05-08 21:09:24 +01:00
|
|
|
}
|
2010-10-12 01:51:03 +01:00
|
|
|
return rtex;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
|
|
|
|
const struct pipe_resource *templ)
|
|
|
|
{
|
|
|
|
unsigned array_mode = 0;
|
2010-11-03 10:31:55 +00:00
|
|
|
static int force_tiling = -1;
|
2010-10-12 01:51:03 +01:00
|
|
|
|
2010-11-03 10:31:55 +00:00
|
|
|
/* Would like some magic "get_bool_option_once" routine.
|
|
|
|
*/
|
|
|
|
if (force_tiling == -1)
|
|
|
|
force_tiling = debug_get_bool_option("R600_FORCE_TILING", FALSE);
|
|
|
|
|
|
|
|
if (force_tiling) {
|
2010-10-21 04:40:45 +01:00
|
|
|
if (!(templ->flags & R600_RESOURCE_FLAG_TRANSFER) &&
|
|
|
|
!(templ->bind & PIPE_BIND_SCANOUT)) {
|
|
|
|
array_mode = V_038000_ARRAY_2D_TILED_THIN1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-10-12 01:51:03 +01:00
|
|
|
return (struct pipe_resource *)r600_texture_create_object(screen, templ, array_mode,
|
|
|
|
0, 0, NULL);
|
|
|
|
|
2010-05-08 21:09:24 +01:00
|
|
|
}
|
|
|
|
|
2010-05-10 02:27:58 +01:00
|
|
|
static void r600_texture_destroy(struct pipe_screen *screen,
|
|
|
|
struct pipe_resource *ptex)
|
2010-05-08 21:09:24 +01:00
|
|
|
{
|
2010-07-28 17:18:19 +01:00
|
|
|
struct r600_resource_texture *rtex = (struct r600_resource_texture*)ptex;
|
|
|
|
struct r600_resource *resource = &rtex->resource;
|
2010-09-15 16:47:32 +01:00
|
|
|
struct radeon *radeon = (struct radeon *)screen->winsys;
|
2010-05-08 21:09:24 +01:00
|
|
|
|
2010-09-23 04:34:36 +01:00
|
|
|
if (rtex->flushed_depth_texture)
|
2010-09-23 07:02:54 +01:00
|
|
|
pipe_resource_reference((struct pipe_resource **)&rtex->flushed_depth_texture, NULL);
|
2010-09-23 04:34:36 +01:00
|
|
|
|
2010-07-28 17:18:19 +01:00
|
|
|
if (resource->bo) {
|
2010-10-04 15:06:13 +01:00
|
|
|
r600_bo_reference(radeon, &resource->bo, NULL);
|
2010-07-28 17:18:19 +01:00
|
|
|
}
|
2010-05-08 21:09:24 +01:00
|
|
|
FREE(rtex);
|
|
|
|
}
|
|
|
|
|
2010-11-03 20:41:48 +00:00
|
|
|
static boolean r600_texture_get_handle(struct pipe_screen* screen,
|
|
|
|
struct pipe_resource *ptex,
|
|
|
|
struct winsys_handle *whandle)
|
|
|
|
{
|
|
|
|
struct r600_resource_texture *rtex = (struct r600_resource_texture*)ptex;
|
|
|
|
struct r600_resource *resource = &rtex->resource;
|
|
|
|
struct radeon *radeon = (struct radeon *)screen->winsys;
|
|
|
|
|
|
|
|
return r600_bo_get_winsys_handle(radeon, resource->bo,
|
|
|
|
rtex->pitch_in_bytes[0], whandle);
|
|
|
|
}
|
|
|
|
|
2010-05-08 21:09:24 +01:00
|
|
|
static struct pipe_surface *r600_get_tex_surface(struct pipe_screen *screen,
|
2010-05-10 02:27:58 +01:00
|
|
|
struct pipe_resource *texture,
|
2010-05-08 21:09:24 +01:00
|
|
|
unsigned face, unsigned level,
|
|
|
|
unsigned zslice, unsigned flags)
|
|
|
|
{
|
2010-07-28 17:18:19 +01:00
|
|
|
struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
|
2010-10-21 04:31:27 +01:00
|
|
|
struct r600_surface *surface = CALLOC_STRUCT(r600_surface);
|
|
|
|
unsigned offset, tile_height;
|
2010-05-08 21:09:24 +01:00
|
|
|
|
|
|
|
if (surface == NULL)
|
|
|
|
return NULL;
|
|
|
|
offset = r600_texture_get_offset(rtex, level, zslice, face);
|
2010-10-21 04:31:27 +01:00
|
|
|
pipe_reference_init(&surface->base.reference, 1);
|
|
|
|
pipe_resource_reference(&surface->base.texture, texture);
|
|
|
|
surface->base.format = texture->format;
|
|
|
|
surface->base.width = mip_minify(texture->width0, level);
|
|
|
|
surface->base.height = mip_minify(texture->height0, level);
|
|
|
|
surface->base.offset = offset;
|
|
|
|
surface->base.usage = flags;
|
|
|
|
surface->base.zslice = zslice;
|
|
|
|
surface->base.texture = texture;
|
|
|
|
surface->base.face = face;
|
|
|
|
surface->base.level = level;
|
|
|
|
|
|
|
|
tile_height = r600_get_height_alignment(screen, rtex->array_mode[level]);
|
|
|
|
surface->aligned_height = align(surface->base.height, tile_height);
|
|
|
|
return &surface->base;
|
2010-05-08 21:09:24 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static void r600_tex_surface_destroy(struct pipe_surface *surface)
|
|
|
|
{
|
2010-05-10 02:27:58 +01:00
|
|
|
pipe_resource_reference(&surface->texture, NULL);
|
2010-05-08 21:09:24 +01:00
|
|
|
FREE(surface);
|
|
|
|
}
|
|
|
|
|
2010-10-12 01:51:03 +01:00
|
|
|
|
2010-05-10 02:27:58 +01:00
|
|
|
struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen,
|
2010-07-28 17:18:19 +01:00
|
|
|
const struct pipe_resource *templ,
|
2010-05-10 02:27:58 +01:00
|
|
|
struct winsys_handle *whandle)
|
2010-05-08 21:09:24 +01:00
|
|
|
{
|
2010-07-28 17:18:19 +01:00
|
|
|
struct radeon *rw = (struct radeon*)screen->winsys;
|
2010-10-04 15:06:13 +01:00
|
|
|
struct r600_bo *bo = NULL;
|
2010-10-18 00:45:58 +01:00
|
|
|
unsigned array_mode = 0;
|
2010-05-08 21:09:24 +01:00
|
|
|
|
|
|
|
/* Support only 2D textures without mipmaps */
|
2010-08-18 16:28:08 +01:00
|
|
|
if ((templ->target != PIPE_TEXTURE_2D && templ->target != PIPE_TEXTURE_RECT) ||
|
|
|
|
templ->depth0 != 1 || templ->last_level != 0)
|
2010-05-08 21:09:24 +01:00
|
|
|
return NULL;
|
2010-05-10 02:27:58 +01:00
|
|
|
|
2010-10-18 00:45:58 +01:00
|
|
|
bo = r600_bo_handle(rw, whandle->handle, &array_mode);
|
2010-09-09 13:03:46 +01:00
|
|
|
if (bo == NULL) {
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2010-10-18 00:45:58 +01:00
|
|
|
return (struct pipe_resource *)r600_texture_create_object(screen, templ, array_mode,
|
2010-10-12 01:51:03 +01:00
|
|
|
whandle->stride,
|
|
|
|
0,
|
|
|
|
bo);
|
2010-05-08 21:09:24 +01:00
|
|
|
}
|
|
|
|
|
2010-07-28 17:18:19 +01:00
|
|
|
static unsigned int r600_texture_is_referenced(struct pipe_context *context,
|
|
|
|
struct pipe_resource *texture,
|
|
|
|
unsigned face, unsigned level)
|
2010-05-08 21:09:24 +01:00
|
|
|
{
|
2010-07-28 17:18:19 +01:00
|
|
|
/* FIXME */
|
|
|
|
return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
|
|
|
|
}
|
2010-05-10 02:27:58 +01:00
|
|
|
|
2010-09-28 13:59:47 +01:00
|
|
|
int (*r600_blit_uncompress_depth_ptr)(struct pipe_context *ctx, struct r600_resource_texture *texture);
|
|
|
|
|
2010-09-23 04:34:36 +01:00
|
|
|
int r600_texture_depth_flush(struct pipe_context *ctx,
|
|
|
|
struct pipe_resource *texture)
|
|
|
|
{
|
|
|
|
struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
|
|
|
|
struct pipe_resource resource;
|
|
|
|
|
|
|
|
if (rtex->flushed_depth_texture)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
resource.target = PIPE_TEXTURE_2D;
|
|
|
|
resource.format = texture->format;
|
|
|
|
resource.width0 = texture->width0;
|
|
|
|
resource.height0 = texture->height0;
|
2010-10-12 05:43:44 +01:00
|
|
|
resource.depth0 = 1;
|
2010-09-23 04:34:36 +01:00
|
|
|
resource.last_level = 0;
|
|
|
|
resource.nr_samples = 0;
|
|
|
|
resource.usage = PIPE_USAGE_DYNAMIC;
|
|
|
|
resource.bind = 0;
|
2010-10-21 04:36:01 +01:00
|
|
|
resource.flags = R600_RESOURCE_FLAG_TRANSFER;
|
2010-09-23 04:34:36 +01:00
|
|
|
|
2010-10-18 04:23:34 +01:00
|
|
|
resource.bind |= PIPE_BIND_DEPTH_STENCIL;
|
2010-09-23 04:34:36 +01:00
|
|
|
|
2010-09-23 07:02:54 +01:00
|
|
|
rtex->flushed_depth_texture = (struct r600_resource_texture *)ctx->screen->resource_create(ctx->screen, &resource);
|
2010-09-23 04:34:36 +01:00
|
|
|
if (rtex->flushed_depth_texture == NULL) {
|
|
|
|
R600_ERR("failed to create temporary texture to hold untiled copy\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
out:
|
2010-11-02 17:51:34 +00:00
|
|
|
/* XXX: only do this if the depth texture has actually changed:
|
|
|
|
*/
|
2010-09-28 13:59:47 +01:00
|
|
|
r600_blit_uncompress_depth_ptr(ctx, rtex);
|
2010-09-23 04:34:36 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-11-02 17:51:34 +00:00
|
|
|
/* Needs adjustment for pixelformat:
|
|
|
|
*/
|
|
|
|
static INLINE unsigned u_box_volume( const struct pipe_box *box )
|
|
|
|
{
|
|
|
|
return box->width * box->depth * box->height;
|
|
|
|
};
|
|
|
|
|
|
|
|
|
2010-11-03 14:06:33 +00:00
|
|
|
/* Figure out whether u_blitter will fallback to a transfer operation.
|
|
|
|
* If so, don't use a staging resource.
|
|
|
|
*/
|
|
|
|
static boolean permit_hardware_blit(struct pipe_screen *screen,
|
|
|
|
struct pipe_resource *res)
|
|
|
|
{
|
|
|
|
unsigned bind;
|
|
|
|
|
|
|
|
if (util_format_is_depth_or_stencil(res->format))
|
|
|
|
bind = PIPE_BIND_DEPTH_STENCIL;
|
|
|
|
else
|
|
|
|
bind = PIPE_BIND_RENDER_TARGET;
|
|
|
|
|
2010-11-11 15:41:49 +00:00
|
|
|
/* See r600_resource_copy_region: there is something wrong
|
|
|
|
* with depth resource copies at the moment so avoid them for
|
|
|
|
* now.
|
|
|
|
*/
|
|
|
|
if (util_format_get_component_bits(res->format,
|
|
|
|
UTIL_FORMAT_COLORSPACE_ZS,
|
|
|
|
0) != 0)
|
|
|
|
return FALSE;
|
|
|
|
|
2010-11-03 14:06:33 +00:00
|
|
|
if (!screen->is_format_supported(screen,
|
|
|
|
res->format,
|
|
|
|
res->target,
|
|
|
|
res->nr_samples,
|
|
|
|
bind, 0))
|
|
|
|
return FALSE;
|
|
|
|
|
|
|
|
if (!screen->is_format_supported(screen,
|
|
|
|
res->format,
|
|
|
|
res->target,
|
|
|
|
res->nr_samples,
|
|
|
|
PIPE_BIND_SAMPLER_VIEW, 0))
|
|
|
|
return FALSE;
|
|
|
|
|
|
|
|
return TRUE;
|
|
|
|
}
|
|
|
|
|
2010-07-28 17:18:19 +01:00
|
|
|
struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
|
|
|
|
struct pipe_resource *texture,
|
|
|
|
struct pipe_subresource sr,
|
|
|
|
unsigned usage,
|
|
|
|
const struct pipe_box *box)
|
|
|
|
{
|
|
|
|
struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
|
2010-08-22 03:49:22 +01:00
|
|
|
struct pipe_resource resource;
|
2010-07-28 17:18:19 +01:00
|
|
|
struct r600_transfer *trans;
|
2010-09-23 04:34:36 +01:00
|
|
|
int r;
|
2010-11-02 17:51:34 +00:00
|
|
|
boolean use_staging_texture = FALSE;
|
|
|
|
|
|
|
|
/* We cannot map a tiled texture directly because the data is
|
|
|
|
* in a different order, therefore we do detiling using a blit.
|
|
|
|
*
|
|
|
|
* Also, use a temporary in GTT memory for read transfers, as
|
|
|
|
* the CPU is much happier reading out of cached system memory
|
|
|
|
* than uncached VRAM.
|
|
|
|
*/
|
|
|
|
if (rtex->tiled)
|
|
|
|
use_staging_texture = TRUE;
|
|
|
|
|
2010-11-09 20:08:45 +00:00
|
|
|
if ((usage & PIPE_TRANSFER_READ) &&
|
2010-11-02 17:51:34 +00:00
|
|
|
u_box_volume(box) > 1024)
|
|
|
|
use_staging_texture = TRUE;
|
|
|
|
|
|
|
|
/* XXX: Use a staging texture for uploads if the underlying BO
|
|
|
|
* is busy. No interface for checking that currently? so do
|
|
|
|
* it eagerly whenever the transfer doesn't require a readback
|
|
|
|
* and might block.
|
|
|
|
*/
|
|
|
|
if ((usage & PIPE_TRANSFER_WRITE) &&
|
2010-11-09 20:08:45 +00:00
|
|
|
!(usage & (PIPE_TRANSFER_READ |
|
|
|
|
PIPE_TRANSFER_DONTBLOCK |
|
|
|
|
PIPE_TRANSFER_UNSYNCHRONIZED)))
|
2010-11-02 17:51:34 +00:00
|
|
|
use_staging_texture = TRUE;
|
2010-05-10 02:27:58 +01:00
|
|
|
|
2010-11-03 14:06:33 +00:00
|
|
|
if (!permit_hardware_blit(ctx->screen, texture) ||
|
|
|
|
(texture->flags & R600_RESOURCE_FLAG_TRANSFER))
|
|
|
|
use_staging_texture = FALSE;
|
|
|
|
|
2010-07-28 17:18:19 +01:00
|
|
|
trans = CALLOC_STRUCT(r600_transfer);
|
|
|
|
if (trans == NULL)
|
|
|
|
return NULL;
|
|
|
|
pipe_resource_reference(&trans->transfer.resource, texture);
|
|
|
|
trans->transfer.sr = sr;
|
|
|
|
trans->transfer.usage = usage;
|
|
|
|
trans->transfer.box = *box;
|
2010-09-23 04:34:36 +01:00
|
|
|
if (rtex->depth) {
|
2010-11-02 17:51:34 +00:00
|
|
|
/* XXX: only readback the rectangle which is being mapped?
|
|
|
|
*/
|
|
|
|
/* XXX: when discard is true, no need to read back from depth texture
|
|
|
|
*/
|
2010-09-23 04:34:36 +01:00
|
|
|
r = r600_texture_depth_flush(ctx, texture);
|
|
|
|
if (r < 0) {
|
|
|
|
R600_ERR("failed to create temporary texture to hold untiled copy\n");
|
|
|
|
pipe_resource_reference(&trans->transfer.resource, NULL);
|
|
|
|
FREE(trans);
|
|
|
|
return NULL;
|
|
|
|
}
|
2010-11-02 17:51:34 +00:00
|
|
|
} else if (use_staging_texture) {
|
2010-08-22 03:49:22 +01:00
|
|
|
resource.target = PIPE_TEXTURE_2D;
|
|
|
|
resource.format = texture->format;
|
|
|
|
resource.width0 = box->width;
|
|
|
|
resource.height0 = box->height;
|
2010-10-12 05:43:44 +01:00
|
|
|
resource.depth0 = 1;
|
2010-08-22 03:49:22 +01:00
|
|
|
resource.last_level = 0;
|
|
|
|
resource.nr_samples = 0;
|
2010-11-02 17:51:34 +00:00
|
|
|
resource.usage = PIPE_USAGE_STAGING;
|
2010-08-22 03:49:22 +01:00
|
|
|
resource.bind = 0;
|
2010-10-21 04:36:01 +01:00
|
|
|
resource.flags = R600_RESOURCE_FLAG_TRANSFER;
|
2010-08-22 03:49:22 +01:00
|
|
|
/* For texture reading, the temporary (detiled) texture is used as
|
|
|
|
* a render target when blitting from a tiled texture. */
|
|
|
|
if (usage & PIPE_TRANSFER_READ) {
|
|
|
|
resource.bind |= PIPE_BIND_RENDER_TARGET;
|
|
|
|
}
|
|
|
|
/* For texture writing, the temporary texture is used as a sampler
|
|
|
|
* when blitting into a tiled texture. */
|
|
|
|
if (usage & PIPE_TRANSFER_WRITE) {
|
|
|
|
resource.bind |= PIPE_BIND_SAMPLER_VIEW;
|
|
|
|
}
|
|
|
|
/* Create the temporary texture. */
|
2010-11-02 17:51:34 +00:00
|
|
|
trans->staging_texture = ctx->screen->resource_create(ctx->screen, &resource);
|
|
|
|
if (trans->staging_texture == NULL) {
|
2010-08-22 03:49:22 +01:00
|
|
|
R600_ERR("failed to create temporary texture to hold untiled copy\n");
|
|
|
|
pipe_resource_reference(&trans->transfer.resource, NULL);
|
|
|
|
FREE(trans);
|
|
|
|
return NULL;
|
|
|
|
}
|
2010-10-13 01:14:55 +01:00
|
|
|
|
|
|
|
trans->transfer.stride =
|
2010-11-02 17:51:34 +00:00
|
|
|
((struct r600_resource_texture *)trans->staging_texture)->pitch_in_bytes[0];
|
2010-11-09 20:08:45 +00:00
|
|
|
if (usage & PIPE_TRANSFER_READ) {
|
2010-11-02 17:51:34 +00:00
|
|
|
r600_copy_to_staging_texture(ctx, trans);
|
2010-08-22 03:49:22 +01:00
|
|
|
/* Always referenced in the blit. */
|
|
|
|
ctx->flush(ctx, 0, NULL);
|
|
|
|
}
|
2010-10-13 01:44:46 +01:00
|
|
|
return &trans->transfer;
|
2010-08-22 03:49:22 +01:00
|
|
|
}
|
2010-10-13 01:44:46 +01:00
|
|
|
trans->transfer.stride = rtex->pitch_in_bytes[sr.level];
|
|
|
|
trans->offset = r600_texture_get_offset(rtex, sr.level, box->z, sr.face);
|
2010-07-28 17:18:19 +01:00
|
|
|
return &trans->transfer;
|
|
|
|
}
|
|
|
|
|
|
|
|
void r600_texture_transfer_destroy(struct pipe_context *ctx,
|
2010-08-22 03:49:22 +01:00
|
|
|
struct pipe_transfer *transfer)
|
2010-07-28 17:18:19 +01:00
|
|
|
{
|
2010-08-22 03:49:22 +01:00
|
|
|
struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
|
2010-09-23 04:34:36 +01:00
|
|
|
struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
|
2010-08-22 03:49:22 +01:00
|
|
|
|
2010-11-02 17:51:34 +00:00
|
|
|
if (rtransfer->staging_texture) {
|
2010-10-12 02:54:16 +01:00
|
|
|
if (transfer->usage & PIPE_TRANSFER_WRITE) {
|
2010-11-02 17:51:34 +00:00
|
|
|
r600_copy_from_staging_texture(ctx, rtransfer);
|
2010-10-12 02:54:16 +01:00
|
|
|
}
|
2010-11-02 17:51:34 +00:00
|
|
|
pipe_resource_reference(&rtransfer->staging_texture, NULL);
|
2010-08-22 03:49:22 +01:00
|
|
|
}
|
2010-09-23 04:34:36 +01:00
|
|
|
if (rtex->flushed_depth_texture) {
|
2010-09-23 07:02:54 +01:00
|
|
|
pipe_resource_reference((struct pipe_resource **)&rtex->flushed_depth_texture, NULL);
|
2010-09-23 04:34:36 +01:00
|
|
|
}
|
2010-08-22 03:49:22 +01:00
|
|
|
pipe_resource_reference(&transfer->resource, NULL);
|
|
|
|
FREE(transfer);
|
2010-07-28 17:18:19 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void* r600_texture_transfer_map(struct pipe_context *ctx,
|
|
|
|
struct pipe_transfer* transfer)
|
|
|
|
{
|
|
|
|
struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
|
2010-10-04 15:06:13 +01:00
|
|
|
struct r600_bo *bo;
|
2010-07-28 17:18:19 +01:00
|
|
|
enum pipe_format format = transfer->resource->format;
|
2010-09-15 16:47:32 +01:00
|
|
|
struct radeon *radeon = (struct radeon *)ctx->screen->winsys;
|
2010-10-13 02:08:44 +01:00
|
|
|
unsigned offset = 0;
|
2010-10-15 14:44:30 +01:00
|
|
|
unsigned usage = 0;
|
2010-07-28 17:18:19 +01:00
|
|
|
char *map;
|
2010-05-10 02:27:58 +01:00
|
|
|
|
2010-11-02 17:51:34 +00:00
|
|
|
if (rtransfer->staging_texture) {
|
|
|
|
bo = ((struct r600_resource *)rtransfer->staging_texture)->bo;
|
2010-08-22 03:49:22 +01:00
|
|
|
} else {
|
2010-09-23 04:34:36 +01:00
|
|
|
struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
|
|
|
|
|
|
|
|
if (rtex->flushed_depth_texture)
|
|
|
|
bo = ((struct r600_resource *)rtex->flushed_depth_texture)->bo;
|
|
|
|
else
|
2010-08-22 22:13:58 +01:00
|
|
|
bo = ((struct r600_resource *)transfer->resource)->bo;
|
2010-09-23 04:34:36 +01:00
|
|
|
|
2010-08-22 22:13:58 +01:00
|
|
|
offset = rtransfer->offset +
|
|
|
|
transfer->box.y / util_format_get_blockheight(format) * transfer->stride +
|
|
|
|
transfer->box.x / util_format_get_blockwidth(format) * util_format_get_blocksize(format);
|
2010-08-22 03:49:22 +01:00
|
|
|
}
|
2010-10-15 14:44:30 +01:00
|
|
|
|
|
|
|
if (transfer->usage & PIPE_TRANSFER_WRITE) {
|
|
|
|
usage |= PB_USAGE_CPU_WRITE;
|
|
|
|
|
|
|
|
if (transfer->usage & PIPE_TRANSFER_DISCARD) {
|
|
|
|
}
|
|
|
|
|
|
|
|
if (transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT) {
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (transfer->usage & PIPE_TRANSFER_READ) {
|
|
|
|
usage |= PB_USAGE_CPU_READ;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (transfer->usage & PIPE_TRANSFER_DONTBLOCK) {
|
|
|
|
usage |= PB_USAGE_DONTBLOCK;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
|
|
|
|
usage |= PB_USAGE_UNSYNCHRONIZED;
|
|
|
|
}
|
|
|
|
|
|
|
|
map = r600_bo_map(radeon, bo, usage, ctx);
|
2010-09-16 11:22:09 +01:00
|
|
|
if (!map) {
|
2010-07-28 17:18:19 +01:00
|
|
|
return NULL;
|
|
|
|
}
|
2010-05-10 02:27:58 +01:00
|
|
|
|
2010-08-22 22:13:58 +01:00
|
|
|
return map + offset;
|
2010-05-08 21:09:24 +01:00
|
|
|
}
|
|
|
|
|
2010-07-28 17:18:19 +01:00
|
|
|
void r600_texture_transfer_unmap(struct pipe_context *ctx,
|
|
|
|
struct pipe_transfer* transfer)
|
2010-05-08 21:09:24 +01:00
|
|
|
{
|
2010-08-22 03:49:22 +01:00
|
|
|
struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
|
2010-09-15 16:47:32 +01:00
|
|
|
struct radeon *radeon = (struct radeon *)ctx->screen->winsys;
|
2010-10-04 15:06:13 +01:00
|
|
|
struct r600_bo *bo;
|
2010-05-10 02:27:58 +01:00
|
|
|
|
2010-11-02 17:51:34 +00:00
|
|
|
if (rtransfer->staging_texture) {
|
|
|
|
bo = ((struct r600_resource *)rtransfer->staging_texture)->bo;
|
2010-08-22 03:49:22 +01:00
|
|
|
} else {
|
2010-09-23 04:34:36 +01:00
|
|
|
struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
|
|
|
|
|
|
|
|
if (rtex->flushed_depth_texture) {
|
|
|
|
bo = ((struct r600_resource *)rtex->flushed_depth_texture)->bo;
|
2010-08-22 22:13:58 +01:00
|
|
|
} else {
|
|
|
|
bo = ((struct r600_resource *)transfer->resource)->bo;
|
|
|
|
}
|
2010-08-22 03:49:22 +01:00
|
|
|
}
|
2010-10-04 15:06:13 +01:00
|
|
|
r600_bo_unmap(radeon, bo);
|
2010-05-08 21:09:24 +01:00
|
|
|
}
|
|
|
|
|
2010-05-10 02:27:58 +01:00
|
|
|
struct u_resource_vtbl r600_texture_vtbl =
|
|
|
|
{
|
2010-11-03 20:41:48 +00:00
|
|
|
r600_texture_get_handle, /* get_handle */
|
2010-05-10 02:27:58 +01:00
|
|
|
r600_texture_destroy, /* resource_destroy */
|
|
|
|
r600_texture_is_referenced, /* is_resource_referenced */
|
|
|
|
r600_texture_get_transfer, /* get_transfer */
|
|
|
|
r600_texture_transfer_destroy, /* transfer_destroy */
|
|
|
|
r600_texture_transfer_map, /* transfer_map */
|
|
|
|
u_default_transfer_flush_region,/* transfer_flush_region */
|
|
|
|
r600_texture_transfer_unmap, /* transfer_unmap */
|
|
|
|
u_default_transfer_inline_write /* transfer_inline_write */
|
|
|
|
};
|
|
|
|
|
2010-05-08 21:09:24 +01:00
|
|
|
void r600_init_screen_texture_functions(struct pipe_screen *screen)
|
|
|
|
{
|
|
|
|
screen->get_tex_surface = r600_get_tex_surface;
|
|
|
|
screen->tex_surface_destroy = r600_tex_surface_destroy;
|
|
|
|
}
|
2010-08-12 07:06:40 +01:00
|
|
|
|
|
|
|
static unsigned r600_get_swizzle_combined(const unsigned char *swizzle_format,
|
2010-08-22 03:49:22 +01:00
|
|
|
const unsigned char *swizzle_view)
|
2010-08-12 07:06:40 +01:00
|
|
|
{
|
2010-08-22 03:49:22 +01:00
|
|
|
unsigned i;
|
|
|
|
unsigned char swizzle[4];
|
|
|
|
unsigned result = 0;
|
|
|
|
const uint32_t swizzle_shift[4] = {
|
|
|
|
16, 19, 22, 25,
|
|
|
|
};
|
|
|
|
const uint32_t swizzle_bit[4] = {
|
|
|
|
0, 1, 2, 3,
|
|
|
|
};
|
|
|
|
|
|
|
|
if (swizzle_view) {
|
|
|
|
/* Combine two sets of swizzles. */
|
|
|
|
for (i = 0; i < 4; i++) {
|
|
|
|
swizzle[i] = swizzle_view[i] <= UTIL_FORMAT_SWIZZLE_W ?
|
|
|
|
swizzle_format[swizzle_view[i]] : swizzle_view[i];
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
memcpy(swizzle, swizzle_format, 4);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get swizzle. */
|
|
|
|
for (i = 0; i < 4; i++) {
|
|
|
|
switch (swizzle[i]) {
|
|
|
|
case UTIL_FORMAT_SWIZZLE_Y:
|
|
|
|
result |= swizzle_bit[1] << swizzle_shift[i];
|
|
|
|
break;
|
|
|
|
case UTIL_FORMAT_SWIZZLE_Z:
|
|
|
|
result |= swizzle_bit[2] << swizzle_shift[i];
|
|
|
|
break;
|
|
|
|
case UTIL_FORMAT_SWIZZLE_W:
|
|
|
|
result |= swizzle_bit[3] << swizzle_shift[i];
|
|
|
|
break;
|
|
|
|
case UTIL_FORMAT_SWIZZLE_0:
|
|
|
|
result |= V_038010_SQ_SEL_0 << swizzle_shift[i];
|
|
|
|
break;
|
|
|
|
case UTIL_FORMAT_SWIZZLE_1:
|
|
|
|
result |= V_038010_SQ_SEL_1 << swizzle_shift[i];
|
|
|
|
break;
|
|
|
|
default: /* UTIL_FORMAT_SWIZZLE_X */
|
|
|
|
result |= swizzle_bit[0] << swizzle_shift[i];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return result;
|
2010-08-12 07:06:40 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/* texture format translate */
|
|
|
|
uint32_t r600_translate_texformat(enum pipe_format format,
|
|
|
|
const unsigned char *swizzle_view,
|
|
|
|
uint32_t *word4_p, uint32_t *yuv_format_p)
|
|
|
|
{
|
|
|
|
uint32_t result = 0, word4 = 0, yuv_format = 0;
|
|
|
|
const struct util_format_description *desc;
|
|
|
|
boolean uniform = TRUE;
|
|
|
|
int i;
|
|
|
|
const uint32_t sign_bit[4] = {
|
|
|
|
S_038010_FORMAT_COMP_X(V_038010_SQ_FORMAT_COMP_SIGNED),
|
|
|
|
S_038010_FORMAT_COMP_Y(V_038010_SQ_FORMAT_COMP_SIGNED),
|
|
|
|
S_038010_FORMAT_COMP_Z(V_038010_SQ_FORMAT_COMP_SIGNED),
|
|
|
|
S_038010_FORMAT_COMP_W(V_038010_SQ_FORMAT_COMP_SIGNED)
|
|
|
|
};
|
|
|
|
desc = util_format_description(format);
|
|
|
|
|
2010-09-02 06:51:23 +01:00
|
|
|
word4 |= r600_get_swizzle_combined(desc->swizzle, swizzle_view);
|
|
|
|
|
2010-08-12 07:06:40 +01:00
|
|
|
/* Colorspace (return non-RGB formats directly). */
|
|
|
|
switch (desc->colorspace) {
|
|
|
|
/* Depth stencil formats */
|
|
|
|
case UTIL_FORMAT_COLORSPACE_ZS:
|
|
|
|
switch (format) {
|
|
|
|
case PIPE_FORMAT_Z16_UNORM:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_16;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
2010-10-07 04:01:37 +01:00
|
|
|
case PIPE_FORMAT_X24S8_USCALED:
|
|
|
|
word4 |= S_038010_NUM_FORMAT_ALL(V_038010_SQ_NUM_FORMAT_INT);
|
2010-08-12 07:06:40 +01:00
|
|
|
case PIPE_FORMAT_Z24X8_UNORM:
|
|
|
|
case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_8_24;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
2010-10-07 04:01:37 +01:00
|
|
|
case PIPE_FORMAT_S8X24_USCALED:
|
|
|
|
word4 |= S_038010_NUM_FORMAT_ALL(V_038010_SQ_NUM_FORMAT_INT);
|
2010-09-20 03:21:35 +01:00
|
|
|
case PIPE_FORMAT_X8Z24_UNORM:
|
|
|
|
case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_24_8;
|
2010-09-20 03:21:35 +01:00
|
|
|
goto out_word4;
|
2010-10-07 04:01:37 +01:00
|
|
|
case PIPE_FORMAT_S8_USCALED:
|
2010-11-03 14:23:45 +00:00
|
|
|
result = FMT_8;
|
2010-10-07 04:01:37 +01:00
|
|
|
word4 |= S_038010_NUM_FORMAT_ALL(V_038010_SQ_NUM_FORMAT_INT);
|
|
|
|
goto out_word4;
|
2010-08-12 07:06:40 +01:00
|
|
|
default:
|
|
|
|
goto out_unknown;
|
|
|
|
}
|
|
|
|
|
|
|
|
case UTIL_FORMAT_COLORSPACE_YUV:
|
|
|
|
yuv_format |= (1 << 30);
|
|
|
|
switch (format) {
|
|
|
|
case PIPE_FORMAT_UYVY:
|
|
|
|
case PIPE_FORMAT_YUYV:
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
goto out_unknown; /* TODO */
|
|
|
|
|
|
|
|
case UTIL_FORMAT_COLORSPACE_SRGB:
|
|
|
|
word4 |= S_038010_FORCE_DEGAMMA(1);
|
|
|
|
if (format == PIPE_FORMAT_L8A8_SRGB || format == PIPE_FORMAT_L8_SRGB)
|
|
|
|
goto out_unknown; /* fails for some reason - TODO */
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
2010-09-15 16:47:32 +01:00
|
|
|
|
2010-08-12 07:06:40 +01:00
|
|
|
/* S3TC formats. TODO */
|
|
|
|
if (desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
|
2010-11-11 14:26:52 +00:00
|
|
|
static int r600_enable_s3tc = -1;
|
|
|
|
|
|
|
|
if (r600_enable_s3tc == -1)
|
|
|
|
r600_enable_s3tc =
|
|
|
|
debug_get_bool_option("R600_ENABLE_S3TC", FALSE);
|
|
|
|
|
|
|
|
if (!r600_enable_s3tc)
|
|
|
|
goto out_unknown;
|
|
|
|
|
2010-11-03 14:23:45 +00:00
|
|
|
switch (format) {
|
|
|
|
case PIPE_FORMAT_DXT1_RGB:
|
|
|
|
case PIPE_FORMAT_DXT1_RGBA:
|
|
|
|
result = FMT_BC1;
|
|
|
|
goto out_word4;
|
|
|
|
case PIPE_FORMAT_DXT3_RGBA:
|
|
|
|
result = FMT_BC2;
|
|
|
|
goto out_word4;
|
|
|
|
case PIPE_FORMAT_DXT5_RGBA:
|
|
|
|
result = FMT_BC3;
|
|
|
|
goto out_word4;
|
|
|
|
default:
|
|
|
|
goto out_unknown;
|
|
|
|
}
|
2010-08-12 07:06:40 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < desc->nr_channels; i++) {
|
|
|
|
if (desc->channel[i].type == UTIL_FORMAT_TYPE_SIGNED) {
|
|
|
|
word4 |= sign_bit[i];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* R8G8Bx_SNORM - TODO CxV8U8 */
|
|
|
|
|
|
|
|
/* RGTC - TODO */
|
|
|
|
|
|
|
|
/* See whether the components are of the same size. */
|
|
|
|
for (i = 1; i < desc->nr_channels; i++) {
|
|
|
|
uniform = uniform && desc->channel[0].size == desc->channel[i].size;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Non-uniform formats. */
|
|
|
|
if (!uniform) {
|
|
|
|
switch(desc->nr_channels) {
|
|
|
|
case 3:
|
|
|
|
if (desc->channel[0].size == 5 &&
|
|
|
|
desc->channel[1].size == 6 &&
|
|
|
|
desc->channel[2].size == 5) {
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_5_6_5;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
}
|
|
|
|
goto out_unknown;
|
|
|
|
case 4:
|
|
|
|
if (desc->channel[0].size == 5 &&
|
|
|
|
desc->channel[1].size == 5 &&
|
|
|
|
desc->channel[2].size == 5 &&
|
|
|
|
desc->channel[3].size == 1) {
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_1_5_5_5;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
}
|
|
|
|
if (desc->channel[0].size == 10 &&
|
|
|
|
desc->channel[1].size == 10 &&
|
|
|
|
desc->channel[2].size == 10 &&
|
|
|
|
desc->channel[3].size == 2) {
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_10_10_10_2;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
}
|
|
|
|
goto out_unknown;
|
|
|
|
}
|
|
|
|
goto out_unknown;
|
|
|
|
}
|
|
|
|
|
2010-09-29 23:56:37 +01:00
|
|
|
/* Find the first non-VOID channel. */
|
|
|
|
for (i = 0; i < 4; i++) {
|
|
|
|
if (desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (i == 4)
|
|
|
|
goto out_unknown;
|
|
|
|
|
2010-08-12 07:06:40 +01:00
|
|
|
/* uniform formats */
|
2010-09-29 23:56:37 +01:00
|
|
|
switch (desc->channel[i].type) {
|
2010-08-12 07:06:40 +01:00
|
|
|
case UTIL_FORMAT_TYPE_UNSIGNED:
|
|
|
|
case UTIL_FORMAT_TYPE_SIGNED:
|
2010-09-29 23:56:37 +01:00
|
|
|
if (!desc->channel[i].normalized &&
|
2010-08-12 07:06:40 +01:00
|
|
|
desc->colorspace != UTIL_FORMAT_COLORSPACE_SRGB) {
|
|
|
|
goto out_unknown;
|
|
|
|
}
|
|
|
|
|
2010-09-29 23:56:37 +01:00
|
|
|
switch (desc->channel[i].size) {
|
2010-08-12 07:06:40 +01:00
|
|
|
case 4:
|
|
|
|
switch (desc->nr_channels) {
|
|
|
|
case 2:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_4_4;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
case 4:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_4_4_4_4;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
}
|
|
|
|
goto out_unknown;
|
|
|
|
case 8:
|
|
|
|
switch (desc->nr_channels) {
|
|
|
|
case 1:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_8;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
case 2:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_8_8;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
case 4:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_8_8_8_8;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
}
|
|
|
|
goto out_unknown;
|
|
|
|
case 16:
|
|
|
|
switch (desc->nr_channels) {
|
|
|
|
case 1:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_16;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
case 2:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_16_16;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
case 4:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_16_16_16_16;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
goto out_unknown;
|
|
|
|
|
|
|
|
case UTIL_FORMAT_TYPE_FLOAT:
|
2010-09-29 23:56:37 +01:00
|
|
|
switch (desc->channel[i].size) {
|
2010-08-12 07:06:40 +01:00
|
|
|
case 16:
|
|
|
|
switch (desc->nr_channels) {
|
|
|
|
case 1:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_16_FLOAT;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
case 2:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_16_16_FLOAT;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
case 4:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_16_16_16_16_FLOAT;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
}
|
|
|
|
goto out_unknown;
|
|
|
|
case 32:
|
|
|
|
switch (desc->nr_channels) {
|
|
|
|
case 1:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_32_FLOAT;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
case 2:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_32_32_FLOAT;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
case 4:
|
2010-10-06 03:49:26 +01:00
|
|
|
result = FMT_32_32_32_32_FLOAT;
|
2010-08-12 07:06:40 +01:00
|
|
|
goto out_word4;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
out_word4:
|
|
|
|
if (word4_p)
|
|
|
|
*word4_p = word4;
|
|
|
|
if (yuv_format_p)
|
|
|
|
*yuv_format_p = yuv_format;
|
|
|
|
return result;
|
|
|
|
out_unknown:
|
2010-09-01 23:04:38 +01:00
|
|
|
// R600_ERR("Unable to handle texformat %d %s\n", format, util_format_name(format));
|
2010-08-12 07:06:40 +01:00
|
|
|
return ~0;
|
|
|
|
}
|