mesa/src/intel/dev/intel_debug.c

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/*
* Copyright 2003 VMware, Inc.
* Copyright © 2006 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
/**
* \file intel_debug.c
*
* Support for the INTEL_DEBUG environment variable, along with other
* miscellaneous debugging code.
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "dev/intel_debug.h"
#include "git_sha1.h"
#include "util/macros.h"
#include "util/debug.h"
#include "c11/threads.h"
uint64_t intel_debug = 0;
static const struct debug_control debug_control[] = {
{ "tex", DEBUG_TEXTURE},
{ "blit", DEBUG_BLIT},
{ "fall", DEBUG_PERF},
{ "perf", DEBUG_PERF},
{ "perfmon", DEBUG_PERFMON},
{ "bat", DEBUG_BATCH},
{ "buf", DEBUG_BUFMGR},
{ "fs", DEBUG_WM },
{ "gs", DEBUG_GS},
{ "sync", DEBUG_SYNC},
{ "sf", DEBUG_SF },
{ "submit", DEBUG_SUBMIT },
{ "wm", DEBUG_WM },
{ "urb", DEBUG_URB },
{ "vs", DEBUG_VS },
{ "clip", DEBUG_CLIP },
{ "no16", DEBUG_NO16 },
{ "blorp", DEBUG_BLORP },
{ "nodualobj", DEBUG_NO_DUAL_OBJECT_GS },
{ "optimizer", DEBUG_OPTIMIZER },
{ "ann", DEBUG_ANNOTATION },
{ "no8", DEBUG_NO8 },
{ "no-oaconfig", DEBUG_NO_OACONFIG },
{ "spill_fs", DEBUG_SPILL_FS },
{ "spill_vec4", DEBUG_SPILL_VEC4 },
{ "cs", DEBUG_CS },
{ "hex", DEBUG_HEX },
{ "nocompact", DEBUG_NO_COMPACTION },
{ "hs", DEBUG_TCS },
{ "tcs", DEBUG_TCS },
{ "ds", DEBUG_TES },
{ "tes", DEBUG_TES },
{ "l3", DEBUG_L3 },
{ "do32", DEBUG_DO32 },
{ "norbc", DEBUG_NO_CCS },
{ "noccs", DEBUG_NO_CCS },
{ "nohiz", DEBUG_NO_HIZ },
{ "color", DEBUG_COLOR },
{ "reemit", DEBUG_REEMIT },
{ "soft64", DEBUG_SOFT64 },
intel/compiler: Implement TCS 8_PATCH mode and INTEL_DEBUG=tcs8 Our tessellation control shaders can be dispatched in several modes. - SINGLE_PATCH (Gen7+) processes a single patch per thread, with each channel corresponding to a different patch vertex. PATCHLIST_N will launch (N / 8) threads. If N is less than 8, some channels will be disabled, leaving some untapped hardware capabilities. Conditionals based on gl_InvocationID are non-uniform, which means that they'll often have to execute both paths. However, if there are fewer than 8 vertices, all invocations will happen within a single thread, so barriers can become no-ops, which is nice. We also burn a maximum of 4 registers for ICP handles, so we can compile without regard for the value of N. It also works in all cases. - DUAL_PATCH mode processes up to two patches at a time, where the first four channels come from patch 1, and the second group of four come from patch 2. This tries to provide better EU utilization for small patches (N <= 4). It cannot be used in all cases. - 8_PATCH mode processes 8 patches at a time, with a thread launched per vertex in the patch. Each channel corresponds to the same vertex, but in each of the 8 patches. This utilizes all channels even for small patches. It also makes conditions on gl_InvocationID uniform, leading to proper jumps. Barriers, unfortunately, become real. Worse, for PATCHLIST_N, the thread payload burns N registers for ICP handles. This can burn up to 32 registers, or 1/4 of our register file, for URB handles. For Vulkan (and DX), we know the number of vertices at compile time, so we can limit the amount of waste. In GL, the patch dimension is dynamic state, so we either would have to waste all 32 (not reasonable) or guess (badly) and recompile. This is unfortunate. Because we can only spawn 16 thread instances, we can only use this mode for PATCHLIST_16 and smaller. The rest must use SINGLE_PATCH. This patch implements the new 8_PATCH TCS mode, but leaves us using SINGLE_PATCH by default. A new INTEL_DEBUG=tcs8 flag will switch to using 8_PATCH mode for testing and benchmarking purposes. We may want to consider using 8_PATCH mode in Vulkan in some cases. The data I've seen shows that 8_PATCH mode can be more efficient in some cases, but SINGLE_PATCH mode (the one we use today) is faster in other cases. Ultimately, the TES matters much more than the TCS for performance, so the decision may not matter much. Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-05-03 22:57:54 +01:00
{ "tcs8", DEBUG_TCS_EIGHT_PATCH },
{ "bt", DEBUG_BT },
{ "pc", DEBUG_PIPE_CONTROL },
{ "nofc", DEBUG_NO_FAST_CLEAR },
{ "no32", DEBUG_NO32 },
{ "shaders", DEBUG_WM | DEBUG_VS | DEBUG_TCS |
DEBUG_TES | DEBUG_GS | DEBUG_CS |
DEBUG_RT | DEBUG_TASK | DEBUG_MESH },
{ "rt", DEBUG_RT },
{ "task", DEBUG_TASK },
{ "mesh", DEBUG_MESH },
{ "stall", DEBUG_STALL },
{ NULL, 0 }
};
uint64_t
intel_debug_flag_for_shader_stage(gl_shader_stage stage)
{
uint64_t flags[] = {
[MESA_SHADER_VERTEX] = DEBUG_VS,
[MESA_SHADER_TESS_CTRL] = DEBUG_TCS,
[MESA_SHADER_TESS_EVAL] = DEBUG_TES,
[MESA_SHADER_GEOMETRY] = DEBUG_GS,
[MESA_SHADER_FRAGMENT] = DEBUG_WM,
[MESA_SHADER_COMPUTE] = DEBUG_CS,
[MESA_SHADER_KERNEL] = DEBUG_CS,
[MESA_SHADER_TASK] = DEBUG_TASK,
[MESA_SHADER_MESH] = DEBUG_MESH,
[MESA_SHADER_RAYGEN] = DEBUG_RT,
[MESA_SHADER_ANY_HIT] = DEBUG_RT,
[MESA_SHADER_CLOSEST_HIT] = DEBUG_RT,
[MESA_SHADER_MISS] = DEBUG_RT,
[MESA_SHADER_INTERSECTION] = DEBUG_RT,
[MESA_SHADER_CALLABLE] = DEBUG_RT,
};
return flags[stage];
}
static void
brw_process_intel_debug_variable_once(void)
{
intel_debug = parse_debug_string(getenv("INTEL_DEBUG"), debug_control);
}
void
brw_process_intel_debug_variable(void)
{
static once_flag process_intel_debug_variable_flag = ONCE_FLAG_INIT;
call_once(&process_intel_debug_variable_flag,
brw_process_intel_debug_variable_once);
}
static uint64_t debug_identifier[4] = {
0xffeeddccbbaa9988,
0x7766554433221100,
0xffeeddccbbaa9988,
0x7766554433221100,
};
void *
intel_debug_identifier(void)
{
return debug_identifier;
}
uint32_t
intel_debug_identifier_size(void)
{
return sizeof(debug_identifier);
}
uint32_t
intel_debug_write_identifiers(void *_output,
uint32_t output_size,
const char *driver_name)
{
void *output = _output, *output_end = _output + output_size;
assert(output_size > intel_debug_identifier_size());
memcpy(output, intel_debug_identifier(), intel_debug_identifier_size());
output += intel_debug_identifier_size();
for (uint32_t id = INTEL_DEBUG_BLOCK_TYPE_DRIVER; id < INTEL_DEBUG_BLOCK_TYPE_MAX; id++) {
switch (id) {
case INTEL_DEBUG_BLOCK_TYPE_DRIVER: {
struct intel_debug_block_driver driver_desc = {
.base = {
.type = id,
},
};
int len = snprintf(output + sizeof(driver_desc),
output_end - (output + sizeof(driver_desc)),
"%s " PACKAGE_VERSION " build " MESA_GIT_SHA1,
driver_name);
driver_desc.base.length = sizeof(driver_desc) + len + 1;
memcpy(output, &driver_desc, sizeof(driver_desc));
output += driver_desc.base.length;
break;
}
case INTEL_DEBUG_BLOCK_TYPE_FRAME: {
struct intel_debug_block_frame frame_desc = {
.base = {
.type = INTEL_DEBUG_BLOCK_TYPE_FRAME,
.length = sizeof(frame_desc),
},
};
memcpy(output, &frame_desc, sizeof(frame_desc));
output += sizeof(frame_desc);
break;
}
default:
unreachable("Missing identifier write");
}
assert(output < output_end);
}
struct intel_debug_block_base end = {
.type = INTEL_DEBUG_BLOCK_TYPE_END,
.length = sizeof(end),
};
memcpy(output, &end, sizeof(end));
output += sizeof(end);
assert(output < output_end);
/* Return the how many bytes where written, so that the rest of the buffer
* can be used for other things.
*/
return output - _output;
}
void *
intel_debug_get_identifier_block(void *_buffer,
uint32_t buffer_size,
enum intel_debug_block_type type)
{
void *buffer = _buffer + intel_debug_identifier_size(),
*end_buffer = _buffer + buffer_size;
while (buffer < end_buffer) {
struct intel_debug_block_base *item = buffer;
if (item->type == type)
return item;
if (item->type == INTEL_DEBUG_BLOCK_TYPE_END)
return NULL;
buffer += item->length;
}
return NULL;
}