Marek Olšák debc543904 amd/registers: use gfx9 packet definitions for gfx940 ... Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>		2023-04-06 15:00:54 +00:00
..
canonicalize.py	…
gfx6.json	…
gfx7.json	…
gfx8.json	…
gfx9.json	amd: update SX_BLEND_OPT_EPSILON.MRT0_EPSILON enum definitions	2023-02-03 00:18:01 +00:00
gfx10-rsrc.json	amd/registers: remove confusing definitions from gfx10-rsrc.json	2023-02-03 00:18:02 +00:00
gfx10.json	amd: update SX_BLEND_OPT_EPSILON.MRT0_EPSILON enum definitions	2023-02-03 00:18:01 +00:00
gfx11-rsrc.json	…
gfx11.json	amd/registers: only define SPI and COMPUTE registers in the 0xB000 range	2023-02-24 21:27:24 +00:00
gfx81.json	amd: update SX_BLEND_OPT_EPSILON.MRT0_EPSILON enum definitions	2023-02-03 00:18:01 +00:00
gfx103.json	amd/registers: only define SPI and COMPUTE registers in the 0xB000 range	2023-02-24 21:27:24 +00:00
gfx940.json	amd/registers: update gfx940.json	2023-04-06 15:00:54 +00:00
makeregheader.py	amd: add initial code for gfx940	2023-04-06 15:00:53 +00:00
mergedbs.py	…
parse_kernel_headers.py	amd/registers: fix the parser to include CP_COHER registers for gfx940	2023-04-06 15:00:54 +00:00
parseheader.py	…
pkt3.json	amd/registers: use gfx9 packet definitions for gfx940	2023-04-06 15:00:54 +00:00
regdb.py	…
registers-manually-defined.json	…