mirror of https://gitlab.freedesktop.org/mesa/mesa
345 lines
12 KiB
C
345 lines
12 KiB
C
/*
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* Copyright © 2022 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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/* Implement query_size, query_levels, and query_samples by extracting the information from
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* descriptors. This is expected to be faster than image_resinfo.
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*/
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#include "ac_nir.h"
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#include "nir_builder.h"
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#include "amdgfxregs.h"
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static nir_ssa_def *get_field(nir_builder *b, nir_ssa_def *desc, unsigned index, unsigned mask)
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{
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return nir_ubfe_imm(b, nir_channel(b, desc, index), ffs(mask) - 1, util_bitcount(mask));
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}
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static nir_ssa_def *handle_null_desc(nir_builder *b, nir_ssa_def *desc, nir_ssa_def *value)
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{
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nir_ssa_def *is_null = nir_ieq_imm(b, nir_channel(b, desc, 1), 0);
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return nir_bcsel(b, is_null, nir_imm_int(b, 0), value);
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}
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static nir_ssa_def *query_samples(nir_builder *b, nir_ssa_def *desc, enum glsl_sampler_dim dim)
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{
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nir_ssa_def *samples;
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if (dim == GLSL_SAMPLER_DIM_MS) {
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/* LAST_LEVEL contains log2(num_samples). */
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samples = get_field(b, desc, 3, ~C_00A00C_LAST_LEVEL);
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samples = nir_ishl(b, nir_imm_int(b, 1), samples);
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} else {
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samples = nir_imm_int(b, 1);
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}
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return handle_null_desc(b, desc, samples);
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}
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static nir_ssa_def *query_levels(nir_builder *b, nir_ssa_def *desc)
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{
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nir_ssa_def *base_level = get_field(b, desc, 3, ~C_00A00C_BASE_LEVEL);
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nir_ssa_def *last_level = get_field(b, desc, 3, ~C_00A00C_LAST_LEVEL);
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nir_ssa_def *levels = nir_iadd_imm(b, nir_isub(b, last_level, base_level), 1);
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return handle_null_desc(b, desc, levels);
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}
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static nir_ssa_def *
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lower_query_size(nir_builder *b, nir_ssa_def *desc, nir_src *lod,
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enum glsl_sampler_dim dim, bool is_array, enum amd_gfx_level gfx_level)
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{
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if (dim == GLSL_SAMPLER_DIM_BUF) {
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nir_ssa_def *size = nir_channel(b, desc, 2);
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if (gfx_level == GFX8) {
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/* On GFX8, the descriptor contains the size in bytes,
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* but TXQ must return the size in elements.
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* The stride is always non-zero for resources using TXQ.
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* Divide the size by the stride.
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*/
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size = nir_udiv(b, size, get_field(b, desc, 1, ~C_008F04_STRIDE));
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}
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return size;
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}
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/* Cube textures return (height, height) instead of (width, height) because it's fewer
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* instructions.
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*/
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bool has_width = dim != GLSL_SAMPLER_DIM_CUBE;
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bool has_height = dim != GLSL_SAMPLER_DIM_1D;
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bool has_depth = dim == GLSL_SAMPLER_DIM_3D;
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nir_ssa_def *width = NULL, *height = NULL, *layers = NULL, *base_array = NULL;
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nir_ssa_def *last_array = NULL, *depth = NULL;
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/* Get the width, height, depth, layers. */
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if (gfx_level >= GFX10) {
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if (has_width) {
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nir_ssa_def *width_lo = get_field(b, desc, 1, ~C_00A004_WIDTH_LO);
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nir_ssa_def *width_hi = get_field(b, desc, 2, ~C_00A008_WIDTH_HI);
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/* Use iadd to get s_lshl2_add_u32 in the end. */
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width = nir_iadd(b, width_lo, nir_ishl_imm(b, width_hi, 2));
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}
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if (has_height)
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height = get_field(b, desc, 2, ~C_00A008_HEIGHT);
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if (has_depth)
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depth = get_field(b, desc, 4, ~C_00A010_DEPTH);
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if (is_array) {
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last_array = get_field(b, desc, 4, ~C_00A010_DEPTH);
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base_array = get_field(b, desc, 4, ~C_00A010_BASE_ARRAY);
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}
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} else {
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if (has_width)
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width = get_field(b, desc, 2, ~C_008F18_WIDTH);
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if (has_height)
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height = get_field(b, desc, 2, ~C_008F18_HEIGHT);
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if (has_depth)
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depth = get_field(b, desc, 4, ~C_008F20_DEPTH);
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if (is_array) {
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base_array = get_field(b, desc, 5, ~C_008F24_BASE_ARRAY);
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if (gfx_level == GFX9) {
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last_array = get_field(b, desc, 4, ~C_008F20_DEPTH);
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} else {
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last_array = get_field(b, desc, 5, ~C_008F24_LAST_ARRAY);
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}
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}
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}
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/* All values are off by 1. */
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if (has_width)
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width = nir_iadd_imm(b, width, 1);
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if (has_height)
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height = nir_iadd_imm(b, height, 1);
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if (has_depth)
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depth = nir_iadd_imm(b, depth, 1);
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if (is_array) {
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layers = nir_isub(b, last_array, base_array);
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layers = nir_iadd_imm(b, layers, 1);
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}
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/* Minify the dimensions according to base_level + lod. */
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if (dim != GLSL_SAMPLER_DIM_MS && dim != GLSL_SAMPLER_DIM_RECT) {
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nir_ssa_def *base_level = get_field(b, desc, 3, ~C_00A00C_BASE_LEVEL);
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nir_ssa_def *level = lod ? nir_iadd(b, base_level, lod->ssa) : base_level;
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if (has_width)
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width = nir_ushr(b, width, level);
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if (has_height)
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height = nir_ushr(b, height, level);
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if (has_depth)
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depth = nir_ushr(b, depth, level);
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/* 1D and square texture can't have 0 size unless the lod is out-of-bounds, which is
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* undefined. Only non-square targets can have one of the sizes 0 with an in-bounds lod
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* after minification.
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*/
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if (has_width && has_height) {
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if (has_width)
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width = nir_umax(b, width, nir_imm_int(b, 1));
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if (has_height)
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height = nir_umax(b, height, nir_imm_int(b, 1));
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if (has_depth)
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depth = nir_umax(b, depth, nir_imm_int(b, 1));
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}
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}
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/* Special case for sliced storage 3D views which shouldn't be minified. */
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if (gfx_level >= GFX10 && has_depth) {
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nir_ssa_def *uav3d =
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nir_ieq_imm(b, get_field(b, desc, 5, ~C_00A014_ARRAY_PITCH), 1);
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nir_ssa_def *layers_3d =
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nir_isub(b, get_field(b, desc, 4, ~C_00A010_DEPTH),
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get_field(b, desc, 4, ~C_00A010_BASE_ARRAY));
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layers_3d = nir_iadd_imm(b, layers_3d, 1);
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depth = nir_bcsel(b, uav3d, layers_3d, depth);
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}
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nir_ssa_def *result = NULL;
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/* Construct the result. */
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switch (dim) {
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case GLSL_SAMPLER_DIM_1D:
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result = is_array ? nir_vec2(b, width, layers) : width;
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break;
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case GLSL_SAMPLER_DIM_CUBE:
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result = is_array ? nir_vec3(b, height, height, layers) : nir_vec2(b, height, height);
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break;
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case GLSL_SAMPLER_DIM_2D:
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case GLSL_SAMPLER_DIM_MS:
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case GLSL_SAMPLER_DIM_RECT:
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case GLSL_SAMPLER_DIM_EXTERNAL:
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result = is_array ? nir_vec3(b, width, height, layers) : nir_vec2(b, width, height);
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break;
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case GLSL_SAMPLER_DIM_3D:
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result = nir_vec3(b, width, height, depth);
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break;
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default:
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unreachable("invalid sampler dim");
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}
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return handle_null_desc(b, desc, result);
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}
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static bool lower_resinfo(nir_builder *b, nir_instr *instr, void *data)
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{
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enum amd_gfx_level gfx_level = *(enum amd_gfx_level*)data;
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nir_ssa_def *result = NULL, *dst = NULL;
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if (instr->type == nir_instr_type_intrinsic) {
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
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const struct glsl_type *type;
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enum glsl_sampler_dim dim;
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bool is_array;
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nir_ssa_def *desc = NULL;
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dst = &intr->dest.ssa;
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b->cursor = nir_before_instr(instr);
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switch (intr->intrinsic) {
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case nir_intrinsic_image_size:
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case nir_intrinsic_image_samples:
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dim = nir_intrinsic_image_dim(intr);
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is_array = nir_intrinsic_image_array(intr);
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desc = nir_image_descriptor_amd(b, dim == GLSL_SAMPLER_DIM_BUF ? 4 : 8,
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32, intr->src[0].ssa);
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break;
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case nir_intrinsic_image_deref_size:
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case nir_intrinsic_image_deref_samples:
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type = nir_instr_as_deref(intr->src[0].ssa->parent_instr)->type;
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dim = glsl_get_sampler_dim(type);
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is_array = glsl_sampler_type_is_array(type);
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desc = nir_image_deref_descriptor_amd(b, dim == GLSL_SAMPLER_DIM_BUF ? 4 : 8,
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32, intr->src[0].ssa);
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break;
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case nir_intrinsic_bindless_image_size:
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case nir_intrinsic_bindless_image_samples:
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dim = nir_intrinsic_image_dim(intr);
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is_array = nir_intrinsic_image_array(intr);
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desc = nir_bindless_image_descriptor_amd(b, dim == GLSL_SAMPLER_DIM_BUF ? 4 : 8,
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32, intr->src[0].ssa);
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break;
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default:
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return false;
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}
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switch (intr->intrinsic) {
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case nir_intrinsic_image_size:
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case nir_intrinsic_image_deref_size:
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case nir_intrinsic_bindless_image_size:
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result = lower_query_size(b, desc, NULL, dim, is_array, gfx_level);
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break;
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case nir_intrinsic_image_samples:
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case nir_intrinsic_image_deref_samples:
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case nir_intrinsic_bindless_image_samples:
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result = query_samples(b, desc, dim);
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break;
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default:
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assert(!desc);
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return false;
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}
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} else if (instr->type == nir_instr_type_tex) {
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nir_tex_instr *tex = nir_instr_as_tex(instr);
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nir_tex_instr *new_tex;
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nir_ssa_def *desc = NULL;
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nir_src *lod = NULL;
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dst = &tex->dest.ssa;
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b->cursor = nir_before_instr(instr);
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switch (tex->op) {
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case nir_texop_txs:
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case nir_texop_query_levels:
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case nir_texop_texture_samples:
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for (unsigned i = 0; i < tex->num_srcs; i++) {
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switch (tex->src[i].src_type) {
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case nir_tex_src_texture_deref:
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case nir_tex_src_texture_handle:
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new_tex = nir_tex_instr_create(b->shader, 1);
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new_tex->op = nir_texop_descriptor_amd;
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new_tex->sampler_dim = tex->sampler_dim;
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new_tex->is_array = tex->is_array;
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new_tex->texture_index = tex->texture_index;
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new_tex->sampler_index = tex->sampler_index;
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new_tex->dest_type = nir_type_int32;
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nir_src_copy(&new_tex->src[0].src, &tex->src[i].src, &new_tex->instr);
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new_tex->src[0].src_type = tex->src[i].src_type;
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nir_ssa_dest_init(&new_tex->instr, &new_tex->dest,
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nir_tex_instr_dest_size(new_tex), 32, NULL);
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nir_builder_instr_insert(b, &new_tex->instr);
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desc = &new_tex->dest.ssa;
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break;
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case nir_tex_src_lod:
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lod = &tex->src[i].src;
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break;
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default:;
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}
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}
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switch (tex->op) {
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case nir_texop_txs:
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result = lower_query_size(b, desc, lod, tex->sampler_dim, tex->is_array,
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gfx_level);
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break;
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case nir_texop_query_levels:
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result = query_levels(b, desc);
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break;
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case nir_texop_texture_samples:
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result = query_samples(b, desc, tex->sampler_dim);
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break;
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default:
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unreachable("shouldn't get here");
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}
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break;
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default:
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return false;
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}
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}
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if (!result)
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return false;
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nir_ssa_def_rewrite_uses_after(dst, result, instr);
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nir_instr_remove(instr);
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return true;
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}
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bool ac_nir_lower_resinfo(nir_shader *nir, enum amd_gfx_level gfx_level)
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{
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return nir_shader_instructions_pass(nir, lower_resinfo,
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nir_metadata_dominance |
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nir_metadata_block_index,
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&gfx_level);
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}
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