Danylo Piliaiev 4218596671 ir3/freedreno: handle non-uniform a1en instructions ... Fixes vkd3d test "test_bindless_samplers_sm51" Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13311>		2021-10-12 17:43:52 +00:00
..
encode.c	ir3/freedreno: handle non-uniform a1en instructions	2021-10-12 17:43:52 +00:00
ir3-cat0.xml	…
ir3-cat1.xml	ir3: Make MOVMSK use repeat	2021-07-08 16:02:41 +00:00
ir3-cat2.xml	freedreno/isa: Convert to srcs/dsts	2021-06-23 17:20:29 +00:00
ir3-cat3.xml	ir3: add newly found shlg.b16 instruction	2021-07-09 13:00:29 +00:00
ir3-cat4.xml	freedreno/isa: Convert to srcs/dsts	2021-06-23 17:20:29 +00:00
ir3-cat5.xml	freedreno/isa: Convert to srcs/dsts	2021-06-23 17:20:29 +00:00
ir3-cat6.xml	ir3: Fix handling cat6 immediates	2021-10-12 11:30:52 +00:00
ir3-cat7.xml	…
ir3-common.xml	…
ir3-disasm.c	freedreno/isa: decode: switch bitmask_t to BITSET_WORD's	2021-09-21 20:25:31 +00:00
ir3.xml	freedreno/isa: Convert to srcs/dsts	2021-06-23 17:20:29 +00:00
isa.h	freedreno/isa: decode: switch bitmask_t to BITSET_WORD's	2021-09-21 20:25:31 +00:00
meson.build	freedreno/isa: move isaspec to a new home	2021-09-21 20:25:31 +00:00