mirror of https://gitlab.freedesktop.org/mesa/mesa
841 lines
28 KiB
C
841 lines
28 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <assert.h>
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#include <stdbool.h>
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#include "radv_meta.h"
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#include "radv_private.h"
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#include "sid.h"
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static nir_shader *
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build_dcc_decompress_compute_shader(struct radv_device *dev)
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{
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nir_builder b;
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const struct glsl_type *buf_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D,
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false,
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false,
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GLSL_TYPE_FLOAT);
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const struct glsl_type *img_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D,
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false,
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false,
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GLSL_TYPE_FLOAT);
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nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL);
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b.shader->info.name = ralloc_strdup(b.shader, "dcc_decompress_compute");
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/* We need at least 16/16/1 to cover an entire DCC block in a single workgroup. */
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b.shader->info.cs.local_size[0] = 16;
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b.shader->info.cs.local_size[1] = 16;
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b.shader->info.cs.local_size[2] = 1;
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nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform,
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buf_type, "s_tex");
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input_img->data.descriptor_set = 0;
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input_img->data.binding = 0;
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nir_variable *output_img = nir_variable_create(b.shader, nir_var_uniform,
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img_type, "out_img");
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output_img->data.descriptor_set = 0;
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output_img->data.binding = 1;
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nir_ssa_def *invoc_id = nir_load_local_invocation_id(&b);
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nir_ssa_def *wg_id = nir_load_work_group_id(&b);
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nir_ssa_def *block_size = nir_imm_ivec4(&b,
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b.shader->info.cs.local_size[0],
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b.shader->info.cs.local_size[1],
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b.shader->info.cs.local_size[2], 0);
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nir_ssa_def *global_id = nir_iadd(&b, nir_imul(&b, wg_id, block_size), invoc_id);
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nir_ssa_def *input_img_deref = &nir_build_deref_var(&b, input_img)->dest.ssa;
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nir_tex_instr *tex = nir_tex_instr_create(b.shader, 3);
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tex->sampler_dim = GLSL_SAMPLER_DIM_2D;
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tex->op = nir_texop_txf;
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tex->src[0].src_type = nir_tex_src_coord;
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tex->src[0].src = nir_src_for_ssa(nir_channels(&b, global_id, 3));
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tex->src[1].src_type = nir_tex_src_lod;
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tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0));
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tex->src[2].src_type = nir_tex_src_texture_deref;
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tex->src[2].src = nir_src_for_ssa(input_img_deref);
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tex->dest_type = nir_type_float;
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tex->is_array = false;
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tex->coord_components = 2;
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nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
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nir_builder_instr_insert(&b, &tex->instr);
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nir_intrinsic_instr *membar = nir_intrinsic_instr_create(b.shader, nir_intrinsic_memory_barrier);
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nir_builder_instr_insert(&b, &membar->instr);
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nir_intrinsic_instr *bar = nir_intrinsic_instr_create(b.shader, nir_intrinsic_barrier);
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nir_builder_instr_insert(&b, &bar->instr);
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nir_ssa_def *outval = &tex->dest.ssa;
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nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_deref_store);
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store->num_components = 4;
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store->src[0] = nir_src_for_ssa(&nir_build_deref_var(&b, output_img)->dest.ssa);
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store->src[1] = nir_src_for_ssa(global_id);
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store->src[2] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
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store->src[3] = nir_src_for_ssa(outval);
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nir_builder_instr_insert(&b, &store->instr);
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return b.shader;
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}
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static VkResult
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create_dcc_compress_compute(struct radv_device *device)
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{
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VkResult result = VK_SUCCESS;
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struct radv_shader_module cs = { .nir = NULL };
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cs.nir = build_dcc_decompress_compute_shader(device);
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VkDescriptorSetLayoutCreateInfo ds_create_info = {
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.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
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.flags = VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT_KHR,
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.bindingCount = 2,
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.pBindings = (VkDescriptorSetLayoutBinding[]) {
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{
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.binding = 0,
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.descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
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.descriptorCount = 1,
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.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
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.pImmutableSamplers = NULL
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},
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{
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.binding = 1,
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.descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
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.descriptorCount = 1,
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.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
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.pImmutableSamplers = NULL
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},
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}
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};
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result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device),
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&ds_create_info,
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&device->meta_state.alloc,
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&device->meta_state.fast_clear_flush.dcc_decompress_compute_ds_layout);
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if (result != VK_SUCCESS)
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goto cleanup;
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VkPipelineLayoutCreateInfo pl_create_info = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
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.setLayoutCount = 1,
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.pSetLayouts = &device->meta_state.fast_clear_flush.dcc_decompress_compute_ds_layout,
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.pushConstantRangeCount = 1,
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.pPushConstantRanges = &(VkPushConstantRange){VK_SHADER_STAGE_COMPUTE_BIT, 0, 8},
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};
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result = radv_CreatePipelineLayout(radv_device_to_handle(device),
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&pl_create_info,
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&device->meta_state.alloc,
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&device->meta_state.fast_clear_flush.dcc_decompress_compute_p_layout);
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if (result != VK_SUCCESS)
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goto cleanup;
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/* compute shader */
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VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
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.stage = VK_SHADER_STAGE_COMPUTE_BIT,
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.module = radv_shader_module_to_handle(&cs),
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.pName = "main",
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.pSpecializationInfo = NULL,
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};
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VkComputePipelineCreateInfo vk_pipeline_info = {
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.sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO,
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.stage = pipeline_shader_stage,
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.flags = 0,
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.layout = device->meta_state.fast_clear_flush.dcc_decompress_compute_p_layout,
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};
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result = radv_CreateComputePipelines(radv_device_to_handle(device),
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radv_pipeline_cache_to_handle(&device->meta_state.cache),
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1, &vk_pipeline_info, NULL,
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&device->meta_state.fast_clear_flush.dcc_decompress_compute_pipeline);
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if (result != VK_SUCCESS)
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goto cleanup;
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cleanup:
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ralloc_free(cs.nir);
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return result;
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}
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static VkResult
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create_pass(struct radv_device *device)
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{
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VkResult result;
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VkDevice device_h = radv_device_to_handle(device);
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const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
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VkAttachmentDescription attachment;
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attachment.format = VK_FORMAT_UNDEFINED;
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attachment.samples = 1;
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attachment.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD;
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attachment.storeOp = VK_ATTACHMENT_STORE_OP_STORE;
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attachment.initialLayout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL;
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attachment.finalLayout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL;
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result = radv_CreateRenderPass(device_h,
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&(VkRenderPassCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
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.attachmentCount = 1,
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.pAttachments = &attachment,
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.subpassCount = 1,
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.pSubpasses = &(VkSubpassDescription) {
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.pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
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.inputAttachmentCount = 0,
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.colorAttachmentCount = 1,
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.pColorAttachments = (VkAttachmentReference[]) {
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{
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.attachment = 0,
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.layout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL,
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},
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},
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.pResolveAttachments = NULL,
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.pDepthStencilAttachment = &(VkAttachmentReference) {
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.attachment = VK_ATTACHMENT_UNUSED,
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},
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.preserveAttachmentCount = 0,
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.pPreserveAttachments = NULL,
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},
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.dependencyCount = 0,
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},
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alloc,
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&device->meta_state.fast_clear_flush.pass);
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return result;
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}
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static VkResult
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create_pipeline_layout(struct radv_device *device, VkPipelineLayout *layout)
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{
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VkPipelineLayoutCreateInfo pl_create_info = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
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.setLayoutCount = 0,
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.pSetLayouts = NULL,
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.pushConstantRangeCount = 0,
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.pPushConstantRanges = NULL,
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};
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return radv_CreatePipelineLayout(radv_device_to_handle(device),
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&pl_create_info,
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&device->meta_state.alloc,
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layout);
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}
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static VkResult
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create_pipeline(struct radv_device *device,
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VkShaderModule vs_module_h,
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VkPipelineLayout layout)
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{
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VkResult result;
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VkDevice device_h = radv_device_to_handle(device);
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struct radv_shader_module fs_module = {
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.nir = radv_meta_build_nir_fs_noop(),
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};
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if (!fs_module.nir) {
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/* XXX: Need more accurate error */
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result = VK_ERROR_OUT_OF_HOST_MEMORY;
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goto cleanup;
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}
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const VkPipelineShaderStageCreateInfo stages[2] = {
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{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
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.stage = VK_SHADER_STAGE_VERTEX_BIT,
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.module = vs_module_h,
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.pName = "main",
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},
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{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
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.stage = VK_SHADER_STAGE_FRAGMENT_BIT,
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.module = radv_shader_module_to_handle(&fs_module),
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.pName = "main",
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},
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};
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const VkPipelineVertexInputStateCreateInfo vi_state = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
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.vertexBindingDescriptionCount = 0,
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.vertexAttributeDescriptionCount = 0,
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};
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const VkPipelineInputAssemblyStateCreateInfo ia_state = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
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.topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
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.primitiveRestartEnable = false,
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};
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const VkPipelineColorBlendStateCreateInfo blend_state = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
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.logicOpEnable = false,
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.attachmentCount = 1,
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.pAttachments = (VkPipelineColorBlendAttachmentState []) {
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{
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.colorWriteMask = VK_COLOR_COMPONENT_R_BIT |
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VK_COLOR_COMPONENT_G_BIT |
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VK_COLOR_COMPONENT_B_BIT |
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VK_COLOR_COMPONENT_A_BIT,
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},
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}
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};
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const VkPipelineRasterizationStateCreateInfo rs_state = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
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.depthClampEnable = false,
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.rasterizerDiscardEnable = false,
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.polygonMode = VK_POLYGON_MODE_FILL,
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.cullMode = VK_CULL_MODE_NONE,
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.frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
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};
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result = radv_graphics_pipeline_create(device_h,
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radv_pipeline_cache_to_handle(&device->meta_state.cache),
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&(VkGraphicsPipelineCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
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.stageCount = 2,
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.pStages = stages,
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.pVertexInputState = &vi_state,
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.pInputAssemblyState = &ia_state,
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.pViewportState = &(VkPipelineViewportStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
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.viewportCount = 1,
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.scissorCount = 1,
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},
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.pRasterizationState = &rs_state,
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.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
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.rasterizationSamples = 1,
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.sampleShadingEnable = false,
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.pSampleMask = NULL,
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.alphaToCoverageEnable = false,
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.alphaToOneEnable = false,
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},
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.pColorBlendState = &blend_state,
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.pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
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.dynamicStateCount = 2,
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.pDynamicStates = (VkDynamicState[]) {
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VK_DYNAMIC_STATE_VIEWPORT,
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VK_DYNAMIC_STATE_SCISSOR,
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},
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},
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.layout = layout,
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.renderPass = device->meta_state.fast_clear_flush.pass,
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.subpass = 0,
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},
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&(struct radv_graphics_pipeline_create_info) {
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.use_rectlist = true,
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.custom_blend_mode = V_028808_CB_ELIMINATE_FAST_CLEAR,
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},
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&device->meta_state.alloc,
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&device->meta_state.fast_clear_flush.cmask_eliminate_pipeline);
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if (result != VK_SUCCESS)
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goto cleanup;
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result = radv_graphics_pipeline_create(device_h,
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radv_pipeline_cache_to_handle(&device->meta_state.cache),
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&(VkGraphicsPipelineCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
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.stageCount = 2,
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.pStages = stages,
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.pVertexInputState = &vi_state,
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.pInputAssemblyState = &ia_state,
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.pViewportState = &(VkPipelineViewportStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
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.viewportCount = 1,
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.scissorCount = 1,
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},
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.pRasterizationState = &rs_state,
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.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
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.rasterizationSamples = 1,
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.sampleShadingEnable = false,
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.pSampleMask = NULL,
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.alphaToCoverageEnable = false,
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.alphaToOneEnable = false,
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},
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.pColorBlendState = &blend_state,
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.pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
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.dynamicStateCount = 2,
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.pDynamicStates = (VkDynamicState[]) {
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VK_DYNAMIC_STATE_VIEWPORT,
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VK_DYNAMIC_STATE_SCISSOR,
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},
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},
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.layout = layout,
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.renderPass = device->meta_state.fast_clear_flush.pass,
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.subpass = 0,
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},
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&(struct radv_graphics_pipeline_create_info) {
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.use_rectlist = true,
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.custom_blend_mode = V_028808_CB_FMASK_DECOMPRESS,
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},
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&device->meta_state.alloc,
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&device->meta_state.fast_clear_flush.fmask_decompress_pipeline);
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if (result != VK_SUCCESS)
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goto cleanup;
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result = radv_graphics_pipeline_create(device_h,
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radv_pipeline_cache_to_handle(&device->meta_state.cache),
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&(VkGraphicsPipelineCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
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.stageCount = 2,
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.pStages = stages,
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.pVertexInputState = &vi_state,
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.pInputAssemblyState = &ia_state,
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.pViewportState = &(VkPipelineViewportStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
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.viewportCount = 1,
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.scissorCount = 1,
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},
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.pRasterizationState = &rs_state,
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.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
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.rasterizationSamples = 1,
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.sampleShadingEnable = false,
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.pSampleMask = NULL,
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.alphaToCoverageEnable = false,
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.alphaToOneEnable = false,
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},
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.pColorBlendState = &blend_state,
|
|
.pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
|
|
.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
|
|
.dynamicStateCount = 2,
|
|
.pDynamicStates = (VkDynamicState[]) {
|
|
VK_DYNAMIC_STATE_VIEWPORT,
|
|
VK_DYNAMIC_STATE_SCISSOR,
|
|
},
|
|
},
|
|
.layout = layout,
|
|
.renderPass = device->meta_state.fast_clear_flush.pass,
|
|
.subpass = 0,
|
|
},
|
|
&(struct radv_graphics_pipeline_create_info) {
|
|
.use_rectlist = true,
|
|
.custom_blend_mode = V_028808_CB_DCC_DECOMPRESS,
|
|
},
|
|
&device->meta_state.alloc,
|
|
&device->meta_state.fast_clear_flush.dcc_decompress_pipeline);
|
|
if (result != VK_SUCCESS)
|
|
goto cleanup;
|
|
|
|
goto cleanup;
|
|
|
|
cleanup:
|
|
ralloc_free(fs_module.nir);
|
|
return result;
|
|
}
|
|
|
|
void
|
|
radv_device_finish_meta_fast_clear_flush_state(struct radv_device *device)
|
|
{
|
|
struct radv_meta_state *state = &device->meta_state;
|
|
|
|
radv_DestroyPipeline(radv_device_to_handle(device),
|
|
state->fast_clear_flush.dcc_decompress_pipeline,
|
|
&state->alloc);
|
|
radv_DestroyPipeline(radv_device_to_handle(device),
|
|
state->fast_clear_flush.fmask_decompress_pipeline,
|
|
&state->alloc);
|
|
radv_DestroyPipeline(radv_device_to_handle(device),
|
|
state->fast_clear_flush.cmask_eliminate_pipeline,
|
|
&state->alloc);
|
|
radv_DestroyRenderPass(radv_device_to_handle(device),
|
|
state->fast_clear_flush.pass, &state->alloc);
|
|
radv_DestroyPipelineLayout(radv_device_to_handle(device),
|
|
state->fast_clear_flush.p_layout,
|
|
&state->alloc);
|
|
|
|
radv_DestroyPipeline(radv_device_to_handle(device),
|
|
state->fast_clear_flush.dcc_decompress_compute_pipeline,
|
|
&state->alloc);
|
|
radv_DestroyPipelineLayout(radv_device_to_handle(device),
|
|
state->fast_clear_flush.dcc_decompress_compute_p_layout,
|
|
&state->alloc);
|
|
radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
|
|
state->fast_clear_flush.dcc_decompress_compute_ds_layout,
|
|
&state->alloc);
|
|
}
|
|
|
|
static VkResult
|
|
radv_device_init_meta_fast_clear_flush_state_internal(struct radv_device *device)
|
|
{
|
|
VkResult res = VK_SUCCESS;
|
|
|
|
mtx_lock(&device->meta_state.mtx);
|
|
if (device->meta_state.fast_clear_flush.cmask_eliminate_pipeline) {
|
|
mtx_unlock(&device->meta_state.mtx);
|
|
return VK_SUCCESS;
|
|
}
|
|
|
|
struct radv_shader_module vs_module = { .nir = radv_meta_build_nir_vs_generate_vertices() };
|
|
if (!vs_module.nir) {
|
|
/* XXX: Need more accurate error */
|
|
res = VK_ERROR_OUT_OF_HOST_MEMORY;
|
|
goto fail;
|
|
}
|
|
|
|
res = create_pass(device);
|
|
if (res != VK_SUCCESS)
|
|
goto fail;
|
|
|
|
res = create_pipeline_layout(device,
|
|
&device->meta_state.fast_clear_flush.p_layout);
|
|
if (res != VK_SUCCESS)
|
|
goto fail;
|
|
|
|
VkShaderModule vs_module_h = radv_shader_module_to_handle(&vs_module);
|
|
res = create_pipeline(device, vs_module_h,
|
|
device->meta_state.fast_clear_flush.p_layout);
|
|
if (res != VK_SUCCESS)
|
|
goto fail;
|
|
|
|
res = create_dcc_compress_compute(device);
|
|
if (res != VK_SUCCESS)
|
|
goto fail;
|
|
|
|
goto cleanup;
|
|
|
|
fail:
|
|
radv_device_finish_meta_fast_clear_flush_state(device);
|
|
|
|
cleanup:
|
|
ralloc_free(vs_module.nir);
|
|
mtx_unlock(&device->meta_state.mtx);
|
|
|
|
return res;
|
|
}
|
|
|
|
|
|
VkResult
|
|
radv_device_init_meta_fast_clear_flush_state(struct radv_device *device, bool on_demand)
|
|
{
|
|
if (on_demand)
|
|
return VK_SUCCESS;
|
|
|
|
return radv_device_init_meta_fast_clear_flush_state_internal(device);
|
|
}
|
|
|
|
static void
|
|
radv_emit_set_predication_state_from_image(struct radv_cmd_buffer *cmd_buffer,
|
|
struct radv_image *image,
|
|
uint64_t pred_offset, bool value)
|
|
{
|
|
uint64_t va = 0;
|
|
|
|
if (value) {
|
|
va = radv_buffer_get_va(image->bo) + image->offset;
|
|
va += pred_offset;
|
|
}
|
|
|
|
si_emit_set_predication_state(cmd_buffer, true, va);
|
|
}
|
|
|
|
/**
|
|
*/
|
|
static void
|
|
radv_emit_color_decompress(struct radv_cmd_buffer *cmd_buffer,
|
|
struct radv_image *image,
|
|
const VkImageSubresourceRange *subresourceRange,
|
|
bool decompress_dcc)
|
|
{
|
|
struct radv_meta_saved_state saved_state;
|
|
VkDevice device_h = radv_device_to_handle(cmd_buffer->device);
|
|
VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
|
|
uint32_t layer_count = radv_get_layerCount(image, subresourceRange);
|
|
bool old_predicating = false;
|
|
VkPipeline pipeline;
|
|
|
|
assert(cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL);
|
|
|
|
if (!cmd_buffer->device->meta_state.fast_clear_flush.cmask_eliminate_pipeline) {
|
|
VkResult ret = radv_device_init_meta_fast_clear_flush_state_internal(cmd_buffer->device);
|
|
if (ret != VK_SUCCESS) {
|
|
cmd_buffer->record_result = ret;
|
|
return;
|
|
}
|
|
}
|
|
|
|
radv_meta_save(&saved_state, cmd_buffer,
|
|
RADV_META_SAVE_GRAPHICS_PIPELINE |
|
|
RADV_META_SAVE_PASS);
|
|
|
|
if (decompress_dcc && radv_image_has_dcc(image)) {
|
|
pipeline = cmd_buffer->device->meta_state.fast_clear_flush.dcc_decompress_pipeline;
|
|
} else if (radv_image_has_fmask(image)) {
|
|
pipeline = cmd_buffer->device->meta_state.fast_clear_flush.fmask_decompress_pipeline;
|
|
} else {
|
|
pipeline = cmd_buffer->device->meta_state.fast_clear_flush.cmask_eliminate_pipeline;
|
|
}
|
|
|
|
if (radv_image_has_dcc(image)) {
|
|
uint64_t pred_offset = decompress_dcc ? image->dcc_pred_offset :
|
|
image->fce_pred_offset;
|
|
|
|
old_predicating = cmd_buffer->state.predicating;
|
|
|
|
radv_emit_set_predication_state_from_image(cmd_buffer, image, pred_offset, true);
|
|
cmd_buffer->state.predicating = true;
|
|
}
|
|
|
|
radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
|
|
pipeline);
|
|
|
|
radv_CmdSetViewport(cmd_buffer_h, 0, 1, &(VkViewport) {
|
|
.x = 0,
|
|
.y = 0,
|
|
.width = image->info.width,
|
|
.height = image->info.height,
|
|
.minDepth = 0.0f,
|
|
.maxDepth = 1.0f
|
|
});
|
|
|
|
radv_CmdSetScissor(cmd_buffer_h, 0, 1, &(VkRect2D) {
|
|
.offset = (VkOffset2D) { 0, 0 },
|
|
.extent = (VkExtent2D) { image->info.width, image->info.height },
|
|
});
|
|
|
|
for (uint32_t layer = 0; layer < layer_count; ++layer) {
|
|
struct radv_image_view iview;
|
|
|
|
radv_image_view_init(&iview, cmd_buffer->device,
|
|
&(VkImageViewCreateInfo) {
|
|
.sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
|
|
.image = radv_image_to_handle(image),
|
|
.viewType = radv_meta_get_view_type(image),
|
|
.format = image->vk_format,
|
|
.subresourceRange = {
|
|
.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
|
|
.baseMipLevel = 0,
|
|
.levelCount = 1,
|
|
.baseArrayLayer = subresourceRange->baseArrayLayer + layer,
|
|
.layerCount = 1,
|
|
},
|
|
});
|
|
|
|
VkFramebuffer fb_h;
|
|
radv_CreateFramebuffer(device_h,
|
|
&(VkFramebufferCreateInfo) {
|
|
.sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
|
|
.attachmentCount = 1,
|
|
.pAttachments = (VkImageView[]) {
|
|
radv_image_view_to_handle(&iview)
|
|
},
|
|
.width = image->info.width,
|
|
.height = image->info.height,
|
|
.layers = 1
|
|
},
|
|
&cmd_buffer->pool->alloc,
|
|
&fb_h);
|
|
|
|
radv_CmdBeginRenderPass(cmd_buffer_h,
|
|
&(VkRenderPassBeginInfo) {
|
|
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
|
|
.renderPass = cmd_buffer->device->meta_state.fast_clear_flush.pass,
|
|
.framebuffer = fb_h,
|
|
.renderArea = {
|
|
.offset = {
|
|
0,
|
|
0,
|
|
},
|
|
.extent = {
|
|
image->info.width,
|
|
image->info.height,
|
|
}
|
|
},
|
|
.clearValueCount = 0,
|
|
.pClearValues = NULL,
|
|
},
|
|
VK_SUBPASS_CONTENTS_INLINE);
|
|
|
|
radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0);
|
|
|
|
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB |
|
|
RADV_CMD_FLAG_FLUSH_AND_INV_CB_META;
|
|
|
|
radv_CmdEndRenderPass(cmd_buffer_h);
|
|
|
|
radv_DestroyFramebuffer(device_h, fb_h,
|
|
&cmd_buffer->pool->alloc);
|
|
|
|
}
|
|
if (radv_image_has_dcc(image)) {
|
|
uint64_t pred_offset = decompress_dcc ? image->dcc_pred_offset :
|
|
image->fce_pred_offset;
|
|
|
|
cmd_buffer->state.predicating = old_predicating;
|
|
|
|
radv_emit_set_predication_state_from_image(cmd_buffer, image, pred_offset, false);
|
|
|
|
if (cmd_buffer->state.predication_type != -1) {
|
|
/* Restore previous conditional rendering user state. */
|
|
si_emit_set_predication_state(cmd_buffer,
|
|
cmd_buffer->state.predication_type,
|
|
cmd_buffer->state.predication_va);
|
|
}
|
|
}
|
|
|
|
if (radv_image_has_dcc(image)) {
|
|
/* Clear the image's fast-clear eliminate predicate because
|
|
* FMASK and DCC also imply a fast-clear eliminate.
|
|
*/
|
|
radv_update_fce_metadata(cmd_buffer, image, false);
|
|
|
|
/* Mark the image as being decompressed. */
|
|
if (decompress_dcc)
|
|
radv_update_dcc_metadata(cmd_buffer, image, false);
|
|
}
|
|
|
|
radv_meta_restore(&saved_state, cmd_buffer);
|
|
}
|
|
|
|
void
|
|
radv_fast_clear_flush_image_inplace(struct radv_cmd_buffer *cmd_buffer,
|
|
struct radv_image *image,
|
|
const VkImageSubresourceRange *subresourceRange)
|
|
{
|
|
radv_emit_color_decompress(cmd_buffer, image, subresourceRange, false);
|
|
}
|
|
|
|
static void
|
|
radv_decompress_dcc_gfx(struct radv_cmd_buffer *cmd_buffer,
|
|
struct radv_image *image,
|
|
const VkImageSubresourceRange *subresourceRange)
|
|
{
|
|
radv_emit_color_decompress(cmd_buffer, image, subresourceRange, true);
|
|
}
|
|
|
|
static void
|
|
radv_decompress_dcc_compute(struct radv_cmd_buffer *cmd_buffer,
|
|
struct radv_image *image,
|
|
const VkImageSubresourceRange *subresourceRange)
|
|
{
|
|
struct radv_meta_saved_state saved_state;
|
|
struct radv_image_view iview = {0};
|
|
struct radv_device *device = cmd_buffer->device;
|
|
|
|
/* This assumes the image is 2d with 1 layer and 1 mipmap level */
|
|
struct radv_cmd_state *state = &cmd_buffer->state;
|
|
|
|
state->flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB |
|
|
RADV_CMD_FLAG_FLUSH_AND_INV_CB_META;
|
|
|
|
radv_meta_save(&saved_state, cmd_buffer, RADV_META_SAVE_DESCRIPTORS |
|
|
RADV_META_SAVE_COMPUTE_PIPELINE);
|
|
|
|
radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
|
|
VK_PIPELINE_BIND_POINT_COMPUTE,
|
|
device->meta_state.fast_clear_flush.dcc_decompress_compute_pipeline);
|
|
|
|
radv_image_view_init(&iview, cmd_buffer->device,
|
|
&(VkImageViewCreateInfo) {
|
|
.sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
|
|
.image = radv_image_to_handle(image),
|
|
.viewType = VK_IMAGE_VIEW_TYPE_2D,
|
|
.format = image->vk_format,
|
|
.subresourceRange = {
|
|
.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
|
|
.baseMipLevel = 0,
|
|
.levelCount = 1,
|
|
.baseArrayLayer = 0,
|
|
.layerCount = 1
|
|
},
|
|
});
|
|
|
|
radv_meta_push_descriptor_set(cmd_buffer,
|
|
VK_PIPELINE_BIND_POINT_COMPUTE,
|
|
device->meta_state.fast_clear_flush.dcc_decompress_compute_p_layout,
|
|
0, /* set */
|
|
2, /* descriptorWriteCount */
|
|
(VkWriteDescriptorSet[]) {
|
|
{
|
|
.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
|
|
.dstBinding = 0,
|
|
.dstArrayElement = 0,
|
|
.descriptorCount = 1,
|
|
.descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
|
|
.pImageInfo = (VkDescriptorImageInfo[]) {
|
|
{
|
|
.sampler = VK_NULL_HANDLE,
|
|
.imageView = radv_image_view_to_handle(&iview),
|
|
.imageLayout = VK_IMAGE_LAYOUT_GENERAL,
|
|
},
|
|
}
|
|
},
|
|
{
|
|
.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
|
|
.dstBinding = 1,
|
|
.dstArrayElement = 0,
|
|
.descriptorCount = 1,
|
|
.descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
|
|
.pImageInfo = (VkDescriptorImageInfo[]) {
|
|
{
|
|
.sampler = VK_NULL_HANDLE,
|
|
.imageView = radv_image_view_to_handle(&iview),
|
|
.imageLayout = VK_IMAGE_LAYOUT_GENERAL,
|
|
},
|
|
}
|
|
}
|
|
});
|
|
|
|
radv_unaligned_dispatch(cmd_buffer, image->info.width, image->info.height, 1);
|
|
|
|
/* Mark this image as actually being decompressed. */
|
|
radv_update_dcc_metadata(cmd_buffer, image, false);
|
|
|
|
/* The fill buffer below does its own saving */
|
|
radv_meta_restore(&saved_state, cmd_buffer);
|
|
|
|
state->flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH |
|
|
RADV_CMD_FLAG_INV_VMEM_L1;
|
|
|
|
state->flush_bits |= radv_clear_dcc(cmd_buffer, image, 0xffffffff);
|
|
|
|
state->flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB |
|
|
RADV_CMD_FLAG_FLUSH_AND_INV_CB_META;
|
|
}
|
|
|
|
void
|
|
radv_decompress_dcc(struct radv_cmd_buffer *cmd_buffer,
|
|
struct radv_image *image,
|
|
const VkImageSubresourceRange *subresourceRange)
|
|
{
|
|
if (cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL)
|
|
radv_decompress_dcc_gfx(cmd_buffer, image, subresourceRange);
|
|
else
|
|
radv_decompress_dcc_compute(cmd_buffer, image, subresourceRange);
|
|
}
|