Commit Graph

123835 Commits

Author SHA1 Message Date
Eric Anholt a65521145c ci: Autodetect whether we need cross setup in lava_arm builds.
The x86 baremetal build would have an armhf cross file, and need the
kernel env setup.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5033>
2020-05-18 19:39:46 +00:00
Eric Anholt 188916bd06 ci: Move cross file generation to a shared script.
We're going to do this in another container soon, and it would also be
nice to consolidate cmake cross setup.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5033>
2020-05-18 19:39:46 +00:00
Chris Wilson 34195d69dd iris: Initialise stub iris_seqno to 0
We create a stub never-signaled seqno to force the iris_fence to use the
fence fd, but we need to fully initialise the iris_seqno struct so that
the unset pointers are NULL and we do not try to destroy them later.

  ==38644== Conditional jump or move depends on uninitialised value(s)
  ==38644==    at 0xF7FBFAA: pipe_resource_reference (u_inlines.h:142)
  ==38644==    by 0xF7FC22F: iris_seqno_destroy (iris_seqno.c:38)
  ==38644==    by 0xF7E8930: iris_seqno_reference (iris_seqno.h:89)
  ==38644==    by 0xF7E8BC3: iris_fence_destroy (iris_fence.c:131)
  ==38644==    by 0xF7E8C41: iris_fence_reference (iris_fence.c:143)
  ==38644==    by 0xEF24525: dri2_destroy_fence (dri_helpers.c:176)
  ==38644==    by 0x4865DC2: dri2_egl_unref_sync (egl_dri2.c:3302)
  ==38644==    by 0x48661E8: dri2_destroy_sync (egl_dri2.c:3433)
  ==38644==    by 0x4855BA4: _eglDestroySync (eglapi.c:1952)
  ==38644==    by 0x4855CF5: eglDestroySyncKHR (eglapi.c:1972)
  ==38644==    by 0x402628: test_cleanup (egl_khr_fence_sync.c:232)
  ==38644==    by 0x40421E: test_eglCreateSyncKHR_native_from_fd (egl_khr_fence_sync.c:1521)

Closes: #2909
Fixes: fd1907efb3 ("iris: Convert fences to using lightweight seqno")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5004>
2020-05-18 19:22:12 +00:00
Rob Clark a6184eae31 freedreno/drm: handle ancient kernels
Older kernels did not support `MSM_INFO_GET_IOVA`.  But this is only
required for (a) clover (ie. `fd_set_global_binding()`) and drm paths
that are limited to newer kernels.  So move the location of the assert
to fix new userspace on old kernels.

Fixes: c9e8df61dc ("freedreno: Initialize the bo's iova at creation time.")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5081>
2020-05-18 19:00:47 +00:00
Rob Clark 106c2a65db freedreno/drm: don't pass thru 'DUMP' flag on older kernels
"softpin" mode was introduced in the same kernel as the 'DUMP' flag.  So
if we are using the legacy non-softpin path, clear the dump flag.  OTOH
the 'DUMP' flag isn't quite so needed on older kernels, since we would
get all cmdstream, even SDS stateobjs, dumped regardless, as they would
have cmd table entries.

Fixes: b2c23b1e48 ("freedreno: Mark all ringbuffer BOs as to be dumped on crash.")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5081>
2020-05-18 19:00:47 +00:00
Ilia Mirkin e422f61e6e freedreno/a3xx: fix rasterizer discard
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5080>
2020-05-18 18:34:04 +00:00
Rob Clark 5e10506834 freedreno/fdperf: add dependency on generated headers
To fix an issue reported here:
https://bugs.chromium.org/p/chromium/issues/detail?id=1083815

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5088>
2020-05-18 17:53:45 +00:00
Pablo Saavedra 4504d6374d ci: Fix TypoError error when traces in traces.yml is an empty list
v2: Python's nitpick (Andres)

In case of an empty list of traces, the results.yml will contain an empty
curly braces. In YAML, an associative array can also be specified by text
enclosed in curly braces ({}),

This commit also adds the corresponding test to check the behavior of
tracie when no traces are added in the traces.yml file.

Signed-off-by: Pablo Saavedra <psaavedra@igalia.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4916>
2020-05-18 17:27:42 +00:00
Pablo Saavedra e85dc9a240 ci: Split test_tracie_skips_traces_without_checksum in separate cases
test_tracie_skips_traces_without_checksum does the logic previous to
the commit 8546d1dd78. The traces.yml includes
several traces, only the one without checksum is ignored by tracie.

As a complementary action, this change adds an new test
(test_tracie_only_traces_without_checksum) to verify the behavior for
cases where the traces.yml only contains traces without checksum.

Finally, test_tracie_skips_traces_without_checksum is renamed as
test_tracie_traces_with_and_without_checksum

Signed-off-by: Pablo Saavedra <psaavedra@igalia.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4916>
2020-05-18 17:27:42 +00:00
Pablo Saavedra 550a4f7764 ci: Migrate tracie tests done in shell script to pytest
v2: Verbatim translation from the original shell script
    Make the corrections visible in explicit commits (Andres)
    Remove redundant code (Alexandros)
    Code style nitpick (Rohan)

Reimplementation of the tracie's self-tests using a pythonic test suit
(pytest).

The new tracie/test.py module is almost a direct translation of the
tests defined in the tracie/test.sh. This new implementation of the
test provides a more common framework where define the tests.
Also allows a better introspection for the tests results and/or
resulting errors.

This patch also adds python3-pytest as dependency for the built images
and adapts the tracie-runner scripts to run the self-test using pytest.

Signed-off-by: Pablo Saavedra <psaavedra@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com> [v1]
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4916>
2020-05-18 17:27:42 +00:00
Pablo Saavedra 37621da7b1 ci: ArgumentParser receives the args from the main parameters
Change the main function to receive the args parameter from
sys.argv[1:]. The args parameter will be passed to the
ArgumentParser.parse_args() function as argument.

This change provides an easier  main() function signature to use
with pythonic testsuites.

Signed-off-by: Pablo Saavedra <psaavedra@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4916>
2020-05-18 17:27:42 +00:00
Pablo Saavedra eb1f22fb01 ci: TRACES_DB_PATH and RESULTS_PATH defined as relative paths
RESULTS_PATH and RESULTS_PATH, as variables in the module context, are
resolved one single time, only during the first module loading. If the
the Python code in execution changes the current dir at some point,
those paths are not going to be updated anymore keeping the paths
wrongly pointing to the old working dir.

This change modify the definition of those variables to use simply
relative paths.

Signed-off-by: Pablo Saavedra <psaavedra@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4916>
2020-05-18 17:27:42 +00:00
Lucas Stach 78c46c2126 etnaviv: don't expose timer queries
We don't support any timer queries, so stop lying about our
ability to do so.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5086>
2020-05-18 17:03:05 +02:00
Ilia Mirkin b5accb3ff9 freedreno/a3xx: parameterize ubo optimization
A3xx apparently has higher alignment requirements than later gens for
indirect const uploads. It also has fewer of them. Add compiler
parameters for both settings, and set accordingly for a3xx and a4xx+.
This fixes all the ubo test failures caused by this optimization.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5077>
2020-05-17 19:51:40 -04:00
Ilia Mirkin 475fb28377 freedreno: fix off-by-one in assertions checking for const sizes
Caused assertions to trip even though everything was fine. The number of
constants can be equal to length, so we need less-than-or-equal.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5077>
2020-05-17 19:51:36 -04:00
Ilia Mirkin 1c05e16666 freedreno/a3xx: fix const footprint
In commit 5d8f40a53a, the change was done incorrectly, switching from
max_const to constlen + 1. Instead it should have been constlen - 1,
which is the analog to the former max_const.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5077>
2020-05-17 19:51:10 -04:00
Ilia Mirkin 9048adbd24 freedreno/ir3: avoid applying (sat) on bary.f
This causes failures on a3xx resulting in the non-sensical dEQP failures
on packUnorm2x16. The same test uses ldlv on a4xx+, so just disallow
(sat) on bary.f on all generations.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5074>
2020-05-17 21:17:57 +00:00
Ilia Mirkin 8d86892ea3 freedreno/a3xx: reinstate rgb10_a2ui texture format
Rendering doesn't work, but having the format in place avoids an assert
when selecting the texture format in st_format. I believe it's required
for GLES3, so more tracing is required to determine what bit we're
missing to make rendering work.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5073>
2020-05-17 14:39:42 -04:00
Ilia Mirkin ff4df32fae freedreno/a3xx: there's no r8i/ui rb format, only rg8i/rg8ui
This fixes a number of dEQP tests:

  dEQP-GLES3.functional.fbo.blit.conversion.r8*
  dEQP-GLES3.texture.specification.basic_teximage2d.r8*

and others. The reason why this enum showed up in traces for R8 is that
it was an "upgraded" texture to R8G8.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5073>
2020-05-17 14:39:42 -04:00
Christopher Egert 78615dcca1 radv: use util_float_to_half_rtz
Since commit 8b8af6d398 there is a
performance regression in dirt 4 on picasso APUs.

The game ends up feeding a large value into this which overflows on the
conversion to 16bit float. With the old implementation (which now lives
in util_float_to_half_rtz) it would be clamped to inf-1, while the new
one returns inf. This causes a performance hit somehow at some point
down the line.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: 8b8af6d398 "gallium/util: Switch util_float_to_half to _mesa_float_to_half()'s impl."
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5062>
2020-05-17 01:12:59 +02:00
Erico Nunes 632a921bd0 lima/ppir: optimize tex loads with single successor
These don't need a mov, and can be used directly with pipeline output.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4975>
2020-05-16 17:24:03 +02:00
Erico Nunes a4b7699d84 lima/ppir: rework tex lowering
Move steps from lowering to emit, since they can be done earlier in a
single place, rather than in two-steps.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4975>
2020-05-16 17:24:00 +02:00
Erico Nunes 92611e21c1 lima/ppir: improve handling for successors in other blocks
ppir doesn't register successors in other blocks, and causes
ppir_node_has_single_succ to be unreliable as it might return true for
nodes with successors in other blocks.
This is bad for optimization passes that try to pipeline registers or
avoid insertion of movs, as that can generally only be done for nodes
with a single user.
As of now, ppir can't just start adding successors in other blocks as
that breaks the scheduling code.
So this patch is a little hacky but enables pipelining optimizations
during lowering. It can hopefully be removed during future scheduler
rework.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4975>
2020-05-16 17:23:58 +02:00
Erico Nunes 96c1d5f629 lima/ppir: handle failures on all ppir_emit_cf_list paths
In some paths where ppir_emit_cf_list is called, compilation errors such
as in unsupported features were not being handled, allowing compilation
to continue and fail at some random point later.
Handle them properly so compilation aborts in the expected way rather
than what may look like a compiler crash/bug.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4975>
2020-05-16 17:23:48 +02:00
Eric Engestrom fa3549c92b util/rand_xor: extend the urandom path to all non-Windows platforms
Any system that provides `/dev/urandom` should be allowed to try to use it.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2316>
2020-05-16 12:05:37 +00:00
Eric Engestrom d76abe98cf util/rand_xor: fallback Linux to time-based instead of fixed seed
When the caller asked for a randomised_seed, we should fall back to the
time-based seed instead of the fixed seed.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2316>
2020-05-16 12:05:37 +00:00
Eric Engestrom e0ce684aae util/rand_xor: drop unused header
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2316>
2020-05-16 12:05:37 +00:00
Eric Engestrom f50f26325f util/rand_xor: make it clear that {,s_}rand_xorshift128plus take *exactly 2* uint64_t
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2316>
2020-05-16 12:05:37 +00:00
Eric Engestrom 576bff5c73 gitlab-ci: exclude scripts that don't affect the build
All the other files in bin/ are not used by any build system and as such
cannot affect the build.

I've been working on maintainer tools lately and it's frustrating to have
the CI wait for 45 minutes to rebuild everything and not even read/run
the files in the MR when it could've just been merged and moved on to
the next MR 45 minutes ago.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5046>
2020-05-16 11:40:14 +00:00
Thong Thai 494b7ef0c1 gallium/auxiliary/vl: Fix compute shader scaling for non-square pixels
Calculate the scale_y parameter instead of assuming square pixels.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5057>
2020-05-16 02:17:26 +00:00
Marek Olšák fd6a5e112a gallium/u_threaded: execute transfer_unmap with THREAD_SAFE directly
This was the original intention, but it wasn't fully implemented.

Fixes: 7f22e0fd29

Closes: #2953

Tested by: John Galt <johngalt@fake.mail>

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5030>
2020-05-15 22:26:52 +00:00
Marek Olšák c9ccceff10 radeonsi: test uncached clear/copy buffer performance with compute shaders
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák 5acf99e81f radeonsi: compute perf tests - don't test 1 wave/SA limit, test no limit first
1 wave/SA is always slow and thus not useful

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák c45a2145f5 radeonsi: disable the L2 cache for CPU read mappings of buffers
for faster copying over PCIe and no need to flush L2

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák 7356144fe4 radeonsi: disable the L2 cache for most CPU mappings of textures
for faster blits over PCIe and no need to flush L2

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák 36c0124804 winsys/amdgpu: add RADEON_FLAG_UNCACHED for faster blits over PCIe
Small blits benefit more. Good access pattern is required.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák cbbc18bc67 radeonsi: use display_dcc_offset for setting displayable_dcc_cb_mask
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák b5ac9d18d8 radeonsi: use vi_dcc_enabled instead of using tex->surface.dcc_offset directly
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák 2c4c1b0499 radeonsi: rename SI_RESOURCE_FLAG_TRANSFER to FORCE_LINEAR
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák 4907bb44c3 radeonsi: simplify setting resource usage for si_init_temp_resource_from_box
usage was set twice, once in the function, and then after the function

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák f57276309b radeonsi: tweak clear/copy_buffer limits when to use compute
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák b158b117e1 radeonsi: optimize access pattern for compute blits with linear textures
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák 9f8089139f radeonsi: use correct clear value size for EQAA in expand_fmask
based on the fmask_expand_values array.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák 2361e8e722 ac/nir: honor ACCESS_STREAM_CACHE_POLICY for L1 and L0 caches too
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Joshua Ashton d573d1d825 radeonsi: Use TRUNC_COORD on samplers
The default behaviour (0) is: "round-nearest-even to n.6 and drop fraction when point sampling" whereas the OpenGL spec simply wants us to floor it (1) "truncate when point sampling".
See 8.14.2 in the OpenGL spec:

https://www.khronos.org/registry/OpenGL/specs/gl/glspec46.core.pdf

The Direct3D spec also mandates this (https://microsoft.github.io/DirectX-Specs/d3d/archive/D3D11_3_FunctionalSpec.htm#7.18.7%20Point%20Sample%20Addressing)

On WineD3D:
This fixes some point-sampling texture precision issues in some Direct3D 9 titles such as Guild Wars 2 and htoL#NiQ: The Firefly Diary that are not present on other vendors.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3953>
2020-05-15 21:56:44 +00:00
Sagar Ghuge 65c2362e88 iris: Use modfiy disables for 3DSTATE_WM_DEPTH_STENCIL command
Add new IRIS_DIRTY_STENCIL_REF dirty flag which would help us to trigger
separate 3DSTATE_WM_DEPTH_STENCIL packet using modify disable fields.

Instead of merging two packets into one in order to build
3DSTATE_WM_DEPTH_STENCIL state, set_stencil_ref can use
IRIS_DIRTY_STENCIL_REF bit and bind_zsa_state can use
IRIS_DIRTY_WN_DEPTH_STENCIL, both could cause packet to happen with
available information using modify disable bits which allow us to
construct packet by ignoring set of fields.

v2: (Kenneth Graunke)
- Fix condition ordering.
- Club GEN cases.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3688>
2020-05-15 21:41:12 +00:00
Thong Thai 864d8acbfd radeon: Fix whitespaces
Minor adjustment to whitespace to align text since the indentation changed

Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3523>
2020-05-15 21:22:39 +00:00
Marek Olšák f80d653d70 radeonsi: don't expose 16xAA on chips with 1 RB due to an occlusion query issue
Only Stoney and Raven2 are affected.

Cc: 20.0 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5047>
2020-05-15 21:04:55 +00:00
Samuel Pitoiset 844d561c58 spirv: handle OpCopyObject correctly with any types
This implements OpCopyObject as a blind copy and propagates the
access mask properly even if the source object type isn't a SSA
value.

This fixes some recent dEQP-VK.descriptor_indexing.* failures
since CTS changed and now apply nonUniformEXT after constructing
a combined image/sampler.

Original patch is from Jason Ekstrand.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4909>
2020-05-15 19:18:53 +00:00
Lucas Stach 9d1821adf0 etnaviv: retarget transfer to render resource when necessary
If we have a separate render resource, it may contain more up-to-date
data than what is available in the base resource, so we need to retarget
the transfer to this resource. As the most likely reason for the
existence of the render resource is a multi-tiled render layout we need
to allow this transfer to go through the resolve/blit copy path, as we
can't de-/tile those layouts in software.

Fixes: b962776530 (etnaviv: rework compatible render base)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5051>
2020-05-15 20:29:10 +02:00