This commit replaces panfrost_get_default_swizzle with an inlined
implementation where the returned values can be determined at compile
time.
According to perf, this previously used about 2% CPU for Openarena.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3824>
"ringbuffer" is now called only "ring" in the error state.
v2: Keep compatible with old error state (Lionel).
v3: Also update "gtt_offset" -> "batch".
Closes: https://gitlab.freedesktop.org/drm/intel/issues/1206
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Re-allow INVALID modifier in import path. The legacy import path
(createImageFromFds()), which is used by android, uses the INVALID
modifier. Previously we would ignore this and just setup the imported
buffer as linear. Restore this behavior to unbreak the legacy import
path.
Fixes: 9891062642 freedreno/a6xx: Implement layout for DRM_FORMAT_MOD_QCOM_COMPRESSED
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3817>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3817>
Gen12 added CCS_E support for A8_UNORM. Intercept A8_UNORM format and
switch to R8_UNORM, as both share the same aux map format encoding so
they are compatible.
Fixes Piglit's ext_framebuffer_multisample-formats all_samples, which
was hitting an assert about A8_UNORM and R8_UINT not being CCS_E
compatible formats.
v2: Add gen check (Kenneth Graunke)
v3: Intercept A8_UNORM and set format to R8_UNORM (Jason Ekstrand)
v4:
- Remove gen check and move block little bit down (Jason Ekstrand)
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3719>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3719>
CI didn't run so missed this.
Note previously had :
texfmt = TFMT6_Z24_UNORM_S8_UINT
rbfmt = RB6_Z24_UNORM_S8_UINT_AS_R8G8B8A8
which are both now FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8
Fixes: 18786cc7d5 ("freedreno/a6xx: use single format enum")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3804>
Adding a new CSO proved to be fairly difficult especially because this
extension affect draw/dispatch/blit alike.
Instead this change passes the state of the noop into the entry points
emitting the operations affected.
v2: Fix assert in default pipe caps
v3: Drop whitespace changes (Ken)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
v2: condition the extension on context isolation support from the
kernel (Chris)
v3: (Lionel)
The initial version of this change used a feature of the Gen7+
command parser to turn the primitive instructions into no-ops.
Unfortunately this doesn't play well with how we're using the
hardware outside of the user submitted commands. For example
resolves are implicit operations which should not be turned into
no-ops as part of the previously submitted commands (before
blackhole_render is enabled) might not be disabled. For example
this sequence :
glClear();
glEnable(GL_BLACKHOLE_RENDER_INTEL);
glDrawArrays(...);
glReadPixels(...);
glDisable(GL_BLACKHOLE_RENDER_INTEL);
While clear has been emitted outside the blackhole render, it
should still be resolved properly in the read pixels. Hence we
need to be more selective and only disable user submitted
commands.
This v3 manually turns primitives into MI_NOOP if blackhole render
is enabled. This lets us enable this feature on any platform.
v4: Limit support to gen7.5+ (Lionel)
v5: Enable Gen7.5 support again, requires a kernel update of the
command parser (Lionel)
v6: Disable Gen7.5 again... Kernel devs want these patches landed
before they accept the kernel patches to whitelist INSTPM (Lionel)
v7: Simplify change by never holding noop (there was a shortcoming in the test not considering fast clears)
Only program register using MI_LRI (Lionel)
v8: Switch to software managed blackhole (BDW hangs on compute batches...)
v9: Simplify the noop state tracking (Lionel)
v10: Don't modify flush function (Ken)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v8)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
v2: Implement missing Enable/Disable (Emil)
v3: Drop unused NewIntelBlackholeRender (Ken)
v4: Bring back NewIntelBlackholeRender as i965 implementation uses it
again (Lionel)
v5: Drop atom (Ken)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
6790397346 added code which attempts to reject modifiers on
depth/stencil formats but it was placed after the early return for depth
and stencil aspects. This commit moves it up so it actually works.
Of course, this doesn't actually matter because the only user of any of
the modifiers stuff is the WSI code and it will never do anything with
depth/stencil.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3794>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3794>
sisched is completely unmaintained, it used to give few more FPS
in the past but with ACO, it's now obsolete. It seems even faster
without sisched now.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
==7265== 248 (120 direct, 128 indirect) bytes in 1 blocks are definitely lost in loss record 1,438 of 1,465
==7265== at 0x483980B: malloc (vg_replace_malloc.c:309)
==7265== by 0x598A2AB: ralloc_size (ralloc.c:119)
==7265== by 0x598F861: _mesa_set_create (set.c:127)
==7265== by 0x599079D: _mesa_pointer_set_create (set.c:570)
==7265== by 0x58BD7D1: build_program_resource_list(gl_context*, gl_shader_program*, bool) (linker.cpp:4026)
==7265== by 0x548231B: st_link_shader (st_glsl_to_ir.cpp:170)
==7265== by 0x54DA269: _mesa_glsl_link_shader (ir_to_mesa.cpp:3119)
Fixes: a6aedc66 ("st/glsl_to_nir: use nir based program resource list builder")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3574>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3574>
The hardware supports wide lines and the granularity is way larger.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2982>
Similar to vkCmdClearAttachments(), we use CP_COND_REG_EXEC to
conditionally execute both the gmem and sysmem paths, except for after
the last subpass where it's known whether we're using sysmem rendering
or not.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
This has only lightly been tested. It passes dEQP-VK.api.smoke.triangle,
so at least we're able to show a triangle. For now, it's just enabled
under a debug flag. In the future we'll probably want some heuristics
like what freedreno has and another debug flag to disable it except when
it's forced.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
We may need shader workarounds for some formats, but for now this seems
to work at least as well as the gmem path for clearing multisample
attachments. And soon we'll start calling this even on the gmem path,
since we leave the final decision of whether to use sysmem or not up
till the end, so we can't have it assert or otherwise working tests
would assert.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
I merely ported a freedreno patch to turnip which
updates some magic regsiter values.
commit ff6e148a3d
Author: Rob Clark <robdclark@chromium.org>
CommitDate: Tue Oct 29 09:19:34 2019 -0700
Subject: freedreno/a6xx: add a618 support
That's all that Rob did for gallium for a618, so I assume that's we need
for turnip also.
Tested manually with:
dEQP-VK.api.image_clearing.core.clear_color_image.2d.linear.single_layer.*
pass 300/555
fail 0/555
skip 255/555
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3743>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3743>
The value of some magic regsiters differ across chipsets. fd6_context
manages the differences by initializing them at runtime. Let's do the
same.
Add to tu_physical_device a subset of those found in fd6_context:
RB_UNKNOWN_8E04_blit
RB_CCU_CNTL_gmem
PC_UNKNOWN_9805
SP_UNKNOWN_A0F8
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3743>
Jonathan Marek
Alyssa Rosenzweig
Icecream95
Elie Tournier
Erik Faye-Lund
Vasily Khoruzhick
Michel Dänzer
Samuel Pitoiset
Timothy Arceri
Rafael Antognolli
Rob Clark
Sagar Ghuge
Fritz Koenig
Lionel Landwerlin
Thong Thai
Jason Ekstrand
Krzysztof Raszkowski
Rhys Perry
Tapani Pälli
Connor Abbott
Peng Huang
Chad Versace