Commit Graph

150256 Commits

Author SHA1 Message Date
Kenneth Graunke 4ed9fd62c9 anv: Lower bufferImageGranularity to 1 from 64
The Vulkan 1.3 spec says:

   "The implementation-dependent limit bufferImageGranularity specifies
    a page-like granularity at which linear and non-linear resources
    must be placed in adjacent memory locations to avoid aliasing.  Two
    resources which do not satisfy this granularity requirement are said
    to alias. bufferImageGranularity is specified in bytes, and must be
    a power of two.  Implementations which do not impose a granularity
    restriction may report a bufferImageGranularity value of one.

    Note: Despite its name, bufferImageGranularity is really a
    granularity between "linear" and "non-linear" resources."

We set this limit to 64 bytes (a cacheline) at the dawn of time, without
any real rationale attached.  There shouldn't be any restrictions here.
Our tile sizes are typically 4K, and tiled resource addresses are
aligned to the tile size, and the extent is also a multiple of the tile
sized.  So if a linear resource occurs before a tiled one, there will
naturally be some space due to the alignment of the tiled resource's
starting address.  If a linear resource occurs after a tiled one, the
tiled resource's ending address is already 4K aligned, which is already
guaranteeing that they won't share a cacheline.

So I think it should be fine to reduce this to 1.  The other Vulkan
driver for our hardware seems to advertise 1 here as well.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15066>
2022-02-18 09:52:00 +00:00
Juan A. Suarez Romero bfdb1064c5 vc4/ci: make piglit test mandatory
Make piglit test jobs to run always, as piglit testsuite offers more
coverage for the VC4 driver.

On the other hand, make the EGL testing manually, as we don't have
enough devices to execute all the tests fast enough.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15045>
2022-02-18 09:02:55 +00:00
Iago Toral Quiroga 750eeecf4e broadcom/compiler: document that spill_base is used for spills and scratch
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15041>
2022-02-18 08:38:19 +00:00
Iago Toral Quiroga 8883975209 broadcom/compiler: drop spill_count and add spilling boolean
We added spill_count to handle uniform batch spills, which we no longer do.
What we want now is a way to know if we are spilling registers.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15041>
2022-02-18 08:38:19 +00:00
Iago Toral Quiroga f3c3228522 broadcom/compiler: do not rebuild the interference graph after each spill
Instead, we only recompute liveness and we add new nodes and
interferences to the graph manually (we also need to patch
register classes in some cases).

To assist in this process, we also add an ip counter to our
instructions that we also recompute after each spill, which we use
to identify registers that cross thrsw boundries introduced with
TMU spills and fills and adjust their register classes accordingly
(removing their capacity to use accumulators).

This significantly reduces the CPU cost of spills. Using
shaders/closed/gputest/piano/7.shader_test as reference:

Compile time up to the first successful compile strategy in main is
~24s and with this change it is ~11s. With this speed up, we can now
try all 2-thread compile strategies (including the fallback scheduler)
in only ~15s.

A full shader-db run results in:
Total CPU time (seconds): 9904.67 -> 9087.98 (-8.25%)

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15041>
2022-02-18 08:38:19 +00:00
Iago Toral Quiroga 59caaa7fb3 broadcom/compiler: reset spill/fill counts after lowering thread count.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15041>
2022-02-18 08:38:19 +00:00
Iago Toral Quiroga 92d819aaa0 broadcom/compiler: fix end of TMU sequence check
We may be pipelining TMU writes and reads, in which case we can
see both TMUWT and LDTMU at the end of a TMU sequence, so we should
not assume that a TMUWT always terminates a sequence.

Also, we had a bug where we were using inst instead of scan_inst
to check if we find another TMUWT after the curent instruction.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15041>
2022-02-18 08:38:19 +00:00
Iago Toral Quiroga 40e091267d broadcom/compiler: define max number of tmu spills for compile strategies
Instead of whether they are allowed to spill or not. This is more flexible.
Also, while we are not currently enabling spilling on any 4-thread strategies,
should we do that in the future, always prefer a 4-thread compile.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15041>
2022-02-18 08:38:19 +00:00
Iago Toral Quiroga 919aedbfec broadcom/compiler: choose compile strategy with lowest spilling
Until now we would only allow spilling as a last resort in the
last 2 strategies, however, it is possible that in some cases
earlier strategies may produce less spills if we allowed spilling
on them.

Likewise, the fallback scheduler can sometimes produce less spills
than 2 threads with optimizations disabled.

With this change, we start allowing all our 2-thread strategies to
spill, and instead of choosing the first strategy that is successful,
we choose the one that doesn't spill or the one with the least amount
of spilling.

It should be noted that this may incur in a significant increase
of compile times. We will address this in a follow-up patch.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15041>
2022-02-18 08:38:19 +00:00
Alyssa Rosenzweig 294a357b33 panfrost,asahi,radv: Don't set internal=true manually
nir_builder_init_simple_shader does this automatically now.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14936>
2022-02-17 23:30:46 +00:00
Alyssa Rosenzweig 7ec1d96e5e nir: Set internal=true in nir_builder_init_simple_shader
Matches the expected use by callers. We do need to fix up a few callers which
use this call for external shaders.

v2: Fix up a radv call site (Rhys).

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net> [v1]
Acked-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14936>
2022-02-17 23:30:46 +00:00
Ian Romanick a01b262990 nir: Add missing dependency on nir_opcodes.py
Commit 38800b38 changed nir_opcodes.py, but that doesn't seem to have
triggered nir_opt_algebraic.py.  The change in 75ef5991 depends on
opt_algebraic lowering 16-bit versions of slt, but if opt_algebraic is
not rebuilt, this may not happen.  This resulted in some people seeing
assertion failures in, for example,
dEQP-VK.spirv_assembly.instruction.compute.float16.arithmetic_3.step,
due to the backend seeing nir_op_slt that it didn't know how to handle.

v2: Add nir_opcodes.py to nir_algebraic_py so that all the per-driver
algebraic passes pick up the dependency too.  Rename it to
nir_algebraic_depends.  Suggested by Emma.

Closes: #6047
Fixes: d1992255bb ("meson: Add build Intel "anv" vulkan driver")
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15050>
2022-02-17 22:57:33 +00:00
Lionel Landwerlin 7a52286215 anv: add a custom AcquireNextImage2KHR func
So that we can plug our intel_measure framework.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14998>
2022-02-17 22:15:23 +00:00
Felix DeGrood 6e939ca865 anv/measure: Fix INTEL_MEASURE for ANV
INTEL_MEASURE broke while implementing the common sync and submit
framework. Re-adding missing INTEL_MEASURE entry point for
command buffer submit.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14998>
2022-02-17 22:15:23 +00:00
Igor Torrente aa2652958a venus: add VK_EXT_custom_border_color extension
Implements all the necessary code in the device initialization
and feature/property query functions.

Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15026>
2022-02-17 21:02:37 +00:00
Igor Torrente 5252c6c009 venus: venus-protocol groundwork to VK_EXT_custom_border_color
These are the changes automatically generated from the venus-protocol
repository.

Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15026>
2022-02-17 21:02:37 +00:00
Lionel Landwerlin 768930a73a nir: fix lower_memcpy
memcpy is divided into chunks that are vec4 sized max. The problem
here happens with a structure of 24 bytes :

  struct {
    float3 a;
    float3 b;
  }

If you memcpy that struct, the lowering will emit 2 load/store, one of
sized 8, next one sized 16. But both end up located at offset 0, so we
effectively drop 2 floats.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a3177cca99 ("nir: Add a lowering pass to lower memcpy")
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15049>
2022-02-17 15:12:45 +00:00
Mike Blumenkrantz bc63802596 zink: radv ci updates
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15060>
2022-02-17 14:56:51 +00:00
Lionel Landwerlin d4b1d8bfc4 intel/dev: provide some default values for no_hw
v2: Move into return (Tapani)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15027>
2022-02-17 07:49:08 +00:00
Cristian Ciocaltea 9ef8af357d virgl/ci: Setup virtio-vsock based IPC
The mechanism currently used to pass data from the dEQP child process
executed in a crosvm guest environment towards the deqp-runner wrapper
script that starts the crosvm instance is based on creating, writing
and reading regular files.

In addition to the main drawback of using the storage, this approach
is potentially unreliable because the data cannot be transferred in
real-time and there is no control on ending the transmission. It also
requires a forced sleep for syncing the content, while the minimum
amount of time necessary to wait cannot be easily and safely
determined.

Replace this with an IPC based on the virtio transport for virtual
sockets (virtio-vsock).

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14995>
2022-02-17 06:32:30 +00:00
Cristian Ciocaltea fcce90a095 ci: Enable kernel virtio transport for Virtual Sockets
Enable support for Virtual Sockets over virtio in kernel configuration
to optimize the data transfer between crosvm and host system.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14995>
2022-02-17 06:32:30 +00:00
Cristian Ciocaltea 5b9788c3c9 ci: Add socat utility
Provide the 'socat' utility in 'debian/x86_test-gl' container to be used
later for improving the inter-process communication with crosvm guest
tasks based on the virtio transport for Virtual Sockets (virtio-vsock).

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14995>
2022-02-17 06:32:30 +00:00
Cristian Ciocaltea 4745638f18 ci: Ensure Mesa Shader Cache resides on tmpfs
Having the Mesa Shader Cache stored on a tmpfs mount point reduces the
tests execution duration by 2-3 %, while preventing several hundreds of
megabytes to be written on the storage media.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14995>
2022-02-17 06:32:30 +00:00
Yiwei Zhang 8e138b8bd1 venus: add necessary format list for ahb image creation
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15017>
2022-02-17 01:45:45 +00:00
Yiwei Zhang 7c9f6c9964 venus: pass necessary format list at ahb image format query
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15017>
2022-02-17 01:45:45 +00:00
Yiwei Zhang c144df0fa8 venus: clean up android wsi and ahb image builder
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15017>
2022-02-17 01:45:45 +00:00
Yiwei Zhang 31904d082d venus: deep copy format list info for deferred image creation
The img->deferred_info will out-live vn_CreateImage, so we need a deep
copy of the VkImageFormatListCreateInfo struct.

This change also avoids tracking VkImageFormatListCreateInfo struct with
a zero viewFormatCount.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15017>
2022-02-17 01:45:44 +00:00
Dave Airlie b805d3e6ab lavapipe: reference gallium fences correctly.
Make sure to take references in all the correct places to get
right lifetimes for these objects and avoid leaks.

Fixes: 94a4982805 ("lavapipe: implement timeline semaphores")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15046>
2022-02-17 00:01:39 +00:00
Guilherme Gallo 794009c9ee ci: Add unit tests for lava_job_submitter
These tests will explore some scenarios involving LAVA delays to submit
the job to the device, some device delays outputting data to LAVA
logs, and sensitive data protection.

For example, the subtests from test_retriable_follow_job, "timed out
more times than retry attempts" and "very long silence" caught a bug
where a job retried until the limited attempts and the CI job still
succeeded. https://gitlab.freedesktop.org/mesa/mesa/-/jobs/18325174

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14876>
2022-02-16 23:32:39 +00:00
Guilherme Gallo 694005343b ci: Install pytest and freezegun plugin
lava_job_submitter.py unit tests are written in pytest and uses
freezegun in order to simulate timeouts in some tests scenarios. So,
this commit adds the packages `python3-pytest` and `python3-freezegun`
to fulfill this dependencies.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14876>
2022-02-16 23:32:39 +00:00
Guilherme Gallo addac10443 ci: Make LAVA jobs fail CI job when retry is exhausted
When the lava_job_submitter.py retry loop finishes normally (without
falling through break-loop) it means that the submitter has exceeded the
retry count limit. However, when it happens the script
finishes normally. This patch adds a treatment to this case, warning the
user what happened and forcing the job to fail.

Moreover, this commit will make retry configurations configurable by
CI job, as it can take the default value from the following variables:

- LAVA_DEVICE_HANGING_TIMEOUT_SEC
- LAVA_WAIT_FOR_DEVICE_POLLING_TIME_SEC
- LAVA_LOG_POLLING_TIME_SEC
- LAVA_NUMBER_OF_RETRIES_TIMEOUT_DETECTION

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14876>
2022-02-16 23:32:39 +00:00
Jason Ekstrand df0e2a1565 anv: Don't assume depth/stencil attachments have depth
If a secondary command buffer is used and the client provides a
framebuffer and that framebuffer has a stencil-only attchment, we would
try to get the aux usage for the depth component of that attachment and
crash.  Check the aspects of the image before looking at aux usage.
This fixes at least the following SkQP tests on my Tigerlake:

 - vk_circular-clips
 - vk_filterfastbounds
 - vk_innershapes_bw
 - vk_lineclosepath
 - vk_multipicturedraw_rrectclip_simple
 - vk_pathinvfill
 - vk_quadclosepath
 - vk_rrect_clip_bw
 - vk_windowrectangles

Fixes: 0d8b9c529c ("anv: Allow PMA optimization to be enabled in secondary command buffers")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15048>
2022-02-16 23:02:09 +00:00
Alyssa Rosenzweig 3697907231 panfrost: Fix Malloc Vertex definition
A few missing things and a few wrong things, nothing major.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15047>
2022-02-16 22:05:55 +00:00
Alyssa Rosenzweig 1ca2358d6b panfrost: Flesh out compute jobs
Valhall has a new twist on Mali's task splitting voodoo, plus compute offset
support.

On Bifrost + Vulkan, compute offsets needed lowering on Bifrost (gl_GlobalID).
Valhall saves a few instructions here.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15047>
2022-02-16 22:05:55 +00:00
Alyssa Rosenzweig 6d5ddf69e2 panfrost: Update Shader Environment descriptor
Disambiguate the name, add a missing field, shorten a field, remove a dated
comment.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15047>
2022-02-16 22:05:55 +00:00
Alyssa Rosenzweig cf95a1c308 panfrost: Add Valhall fields to tiler descriptor
Mostly to support layered rendering.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15047>
2022-02-16 22:05:55 +00:00
Alyssa Rosenzweig c011ea6c26 panfrost: Shuffle render target AFBC for Valhall
I'm not sure why this is different, although it adds support for new AFBC
modifiers.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15047>
2022-02-16 22:05:55 +00:00
Alyssa Rosenzweig 1ee09eaca8 panfrost: Add Valhall additions to the framebuffer
There are a few minor changes. Nothing fundamanetal.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15047>
2022-02-16 22:05:55 +00:00
Iván Briano 81f97905c3 intel/compiler: make CLUSTER_BROADCAST always deal with integers
This way we don't run afoul of regioning restrictions around floating
point types.

Cc: 22.0 <mesa-stable>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15039>
2022-02-16 21:36:42 +00:00
Iván Briano 11544435ad anv: only advertise 64b atomic floats if 64b floats are supported
Cc: 22.0 <mesa-stable>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15039>
2022-02-16 21:36:42 +00:00
Samuel Pitoiset 377884c9c8 radv: do not enable per-vertex VRS if the FS uses gl_FragCoord
It breaks postprocessing in some games like Ghostrunner, Deathloop,
Street Fighter V.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15042>
2022-02-16 21:09:12 +00:00
Samuel Pitoiset 3cc53c047a radv: allow to force per-vertex VRS in the tessellation stage
It's more useful than I thought.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15042>
2022-02-16 21:09:12 +00:00
Dave Airlie eebe298a87 llvmpipe: fix linear rast samples check.
The checks didn't work for the samples == 0 case, just fix it
to use the helper.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15040>
2022-02-16 20:48:52 +00:00
Emma Anholt 3f4bfecee6 nir: Add some notes about const/uniform array access rules in GL.
I was doing some RE on freedreno and we had some questions about when the
hardware might need non-uniform or non-constant array access for various
descriptor types, so let's leave some notes for the next person.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13621>
2022-02-16 20:06:21 +00:00
Emma Anholt ca1ec72726 nv30/40: Switch to using NIR-to-TGSI by default.
shader-db results (note that we expect many more loops unrolled, so instr
count is probably understating the win):

nv30:
total instructions in shared programs: 16535069 -> 14299105 (-13.52%)
instructions in affected programs: 16377286 -> 14141322 (-13.65%)
total gpr in shared programs: 81255 -> 67268 (-17.21%)
gpr in affected programs: 56714 -> 42727 (-24.66%)
LOST:   0
GAINED: 824

nv40:
total instructions in shared programs: 20907673 -> 18428749 (-11.86%)
instructions in affected programs: 20755510 -> 18276586 (-11.94%)
total gpr in shared programs: 104200 -> 82831 (-20.51%)
gpr in affected programs: 80278 -> 58909 (-26.62%)

14130

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14130>
2022-02-16 17:22:40 +00:00
Samuel Pitoiset 80716b6f7e radv: enable radv_disable_aniso_single_level for The Evil Within 1&2
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6033
Fixes: 5ce4017a2b ("radv,aco: do not disable anisotropy filtering for non-mipmap images")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15011>
2022-02-16 17:28:46 +01:00
Thierry Reding 108e6eaa83 tegra: Use private reference count for resources
With the recent addition of the shortcuts aiming to avoid atomic
operations, the reference count on resources can become unbalanced
in the Tegra driver since they are wrapped and then proxied to the
Nouveau driver.

Fix this by keeping a private reference count.

Fixes: 7688b8ae98 ("st/mesa: eliminate all atomic ops when setting vertex buffers")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Karol Herbst <kherbst@redhat.com>
2022-02-16 16:20:48 +01:00
Thierry Reding e8ce0a3357 tegra: Use private reference count for sampler views
With the recent addition of the shortcuts aiming to avoid atomic
operations, the reference count on sampler views can become unbalanced
in the Tegra driver since they are wrapped and then proxied to the
Nouveau driver.

Fix this by keeping a private reference count.

Fixes: ef5d427413 ("st/mesa: add a mechanism to bypass atomics when binding sampler views")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Karol Herbst <kherbst@redhat.com>
2022-02-16 16:20:40 +01:00
Matti Hamalainen 4e252cbc7d aux/trace: fix dumping of pipe_texture_target
I had missed a int -> enum conversion in one recently added function and
it's probably nice to also dump the target value also in
trace_dump_resource_template() so let's do just that.

Signed-off-by: Matti Hamalainen <ccr@tnsp.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14980>
2022-02-16 14:06:16 +00:00
Timur Kristóf 1912503224 radv: Don't disturb dynamic primitive topology with mesh shading.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14653>
2022-02-16 13:42:39 +00:00