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186972 Commits

Author SHA1 Message Date
Eric Engestrom 48566d00b1 ci: don't run rustfmt on every core change 
Only keep the two parts we want: disabling the job in the nightly
pipeline, and running the job if the CI itself is modified.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28468>
 2024-03-29 18:43:38 +00:00
Jesse Natalie 4f310b04f0 wgl: The default swap interval is supposed to be 1 
Per WGL_EXT_swap_control:
> The default swap interval is 1.

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28471>
 2024-03-29 17:29:18 +00:00
Eric Engestrom cc5e9def56 radv/ci: dEQP-VK.spirv_assembly.type.vec4.i8.mod_geom Fail -> Crash on tahiti 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28472>
 2024-03-29 16:36:10 +00:00
Eric Engestrom 64293c5aa3 radv/ci: another batch of flakes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28472>
 2024-03-29 16:36:10 +00:00
Mike Blumenkrantz edeb3fec4d zink: only check that CUBE_COMPATIBLE for images doesn't subtract flags 
the flags may change if e.g., HOST_TRANSFER is enabled by adding CUBE

fixes #10924

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28460>
 2024-03-29 13:09:40 +00:00
Rhys Perry 03938804f1 aco: avoid breaking clauses with waitcnt 
fossil-db (navi31):
Totals from 3573 (4.50% of 79395) affected shaders:
Instrs: 6172096 -> 6170009 (-0.03%); split: -0.04%, +0.01%
CodeSize: 31448052 -> 31439660 (-0.03%); split: -0.03%, +0.01%
Latency: 37317302 -> 37307935 (-0.03%); split: -0.03%, +0.00%
InvThroughput: 6820967 -> 6819930 (-0.02%); split: -0.02%, +0.00%
VClause: 163424 -> 157705 (-3.50%)
SClause: 135441 -> 135295 (-0.11%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28433>
 2024-03-29 12:04:13 +00:00
Karol Herbst 88a9576a3e meson: fix link failure with llvm-18 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10739
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10775
cc: mesa-stable

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28267>
 2024-03-29 07:31:02 +00:00
Timur Kristóf 3fd002f6d5 radv, aco: Remove the code that jumped to RADV's TCS epilogs. 
The actual TCS epilog selection code is kept unchanged for now,
we'll delete it when RadeonSI also gets rid of TCS epilogs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28408>
 2024-03-28 23:44:03 +00:00
Timur Kristóf e421923692 radv: Completely delete TCS epilogs. 
TCS epilogs are not needed anymore because the TCS can implement
dynamic states by itself now.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28408>
 2024-03-28 23:44:03 +00:00
Timur Kristóf 508f293b14 ac/nir/tess: Emit tess factor stores based on new intrinsics. 
This allows the TCS to read the primitive mode and whether
TES reads the tess factors, from an SGPR arg, which lets it
decide how to store them at runtime.

For linked shaders, the conditions will be constant and
NIR optimizations can delete the dead CF.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28408>
 2024-03-28 23:44:03 +00:00
Timur Kristóf 476a42c02c radv: Call nir_opt_dead_cf in radv_optimize_nir_algebraic. 
In case lowering passes added dead CF.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28408>
 2024-03-28 23:44:03 +00:00
Timur Kristóf 315cacddbd radv: Implement new tess intrinsics. 
For linked shaders, the information is available as constant,
while for unlinked shaders, the info is in a SGPR arg.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28408>
 2024-03-28 23:44:03 +00:00
Timur Kristóf 5a43f33426 radv: Copy TES primitive mode to TCS info. 
Will be needed by the ABI lowering of the new intrinsic that
tells the TCS the primitive type, if it's known.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28408>
 2024-03-28 23:44:03 +00:00
Timur Kristóf f646b05737 radeonsi: Implement new intrinsics for monolithic shaders. 
For now, only monolithic shaders will hit the code path that will
generate these intrinsics.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28408>
 2024-03-28 23:44:03 +00:00
Timur Kristóf 411de8488c nir: Add two new AMD specific tess intrinsics. 
These will be needed to implement some tessellation dynamic
states within the TCS as opposed to using an epilog.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28408>
 2024-03-28 23:44:03 +00:00
Sil Vilerino 8a8fae2520 d3d12: Support HEVC slice L0/L1 active number override 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28424>
 2024-03-28 21:31:25 +00:00
Sil Vilerino 33336a2766 d3d12: Support H264 slice L0/L1 active number override 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28424>
 2024-03-28 21:31:25 +00:00
Sil Vilerino cc04a04f13 d3d12: Bump directx-headers dependency to v613 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28424>
 2024-03-28 21:31:25 +00:00
Rhys Perry 66153f7bfe aco: always emit float mode for merged shaders compiled separately 
We don't know what the float mode was by the end of the previous shader,
so we should always set it.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28392>
 2024-03-28 21:02:29 +00:00
Rohan Garg df3a1348d1 intel/brw: minor rework to de duplicate variable assignment 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27235>
 2024-03-28 19:53:40 +00:00
Rohan Garg a715512177 intel/brw: adjust the copy propgation pass to account for wider GRF's on Xe2+ 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27235>
 2024-03-28 19:53:40 +00:00
Rohan Garg 7d425913f7 intel/brw: update disassembly for MATH pipe 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27235>
 2024-03-28 19:53:40 +00:00
Rohan Garg 467ee9d27a intel/brw: Xe2+ can do SIMD16 for extended math on HF types 
BSpec 56797:
Math operation rules when half-floats are used on both source and
destination operands and both source and destinations are packed.

The execution size must be 16.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27235>
 2024-03-28 19:53:40 +00:00
Rohan Garg c4b38c717d intel/brw: account for sources when determining if a operation uses half floats 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27235>
 2024-03-28 19:53:40 +00:00
Eric Engestrom 07f0825c03 radv/ci: another batch of flakes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28450>
 2024-03-28 18:59:10 +00:00
Eric Engestrom d92db5e14a v3dv/ci: another batch of flakes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28449>
 2024-03-28 18:37:22 +00:00
Juston Li d6978b1af2 Revert "zink: store last pipeline directly for zink_gfx_program::last_pipeline" 
This reverts commit be8b7980e6.

Store the cache entry so that the fast path picks up the optimized
pipeline when its available from a background optimized_compile_job().

Observed traces where it would take the fast path back and forth using
an unoptimized pipeline and never pick up the optimized pipeline leading
to >50% fps drop.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28440>
 2024-03-28 17:06:39 +00:00
Hans-Kristian Arntzen 5eb0dec525 wsi/x11: Return OUT_OF_DATE on sw resize. 
This is more in line with DRI3 path, and fixes a regression
since SUBOPTIMAL was not considered correctly.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Fixes: 19dba854be ("wsi/x11: Rewrite implementation to always use threads.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10878
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28413>
 2024-03-28 14:22:19 +00:00
Daniel Schürmann a4231d4f56 aco/spill: use average use distances to spill loop variables 
Totals from 83 (0.10% of 79395) affected shaders: (GFX11)

Instrs: 3429510 -> 3427917 (-0.05%); split: -0.05%, +0.01%
CodeSize: 17587884 -> 17570224 (-0.10%); split: -0.11%, +0.01%
SpillSGPRs: 4660 -> 4630 (-0.64%); split: -1.07%, +0.43%
Latency: 20054145 -> 20054454 (+0.00%); split: -0.00%, +0.01%
InvThroughput: 4989606 -> 4989740 (+0.00%); split: -0.00%, +0.01%
VClause: 90844 -> 90843 (-0.00%)
SClause: 69534 -> 69535 (+0.00%); split: -0.04%, +0.04%
Copies: 283288 -> 283415 (+0.04%); split: -0.11%, +0.15%
Branches: 113543 -> 113409 (-0.12%); split: -0.12%, +0.01%
VALU: 1888933 -> 1887489 (-0.08%); split: -0.08%, +0.00%
SALU: 423548 -> 423609 (+0.01%); split: -0.07%, +0.09%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27799>
 2024-03-28 13:57:36 +00:00
Daniel Schürmann c371882060 aco/spill: use average use distances in init_live_in_vars() for merge blocks 
Totals from 18 (0.02% of 79395) affected shaders: (GFX11)

Instrs: 726400 -> 726409 (+0.00%); split: -0.00%, +0.00%
CodeSize: 3750396 -> 3750420 (+0.00%); split: -0.00%, +0.00%
Latency: 4363014 -> 4363039 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 1483486 -> 1483485 (-0.00%)
SClause: 13393 -> 13392 (-0.01%); split: -0.01%, +0.01%
Copies: 70236 -> 70254 (+0.03%); split: -0.01%, +0.03%
Branches: 23811 -> 23810 (-0.00%)
VALU: 404250 -> 404247 (-0.00%); split: -0.00%, +0.00%
SALU: 92208 -> 92226 (+0.02%); split: -0.01%, +0.02%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27799>
 2024-03-28 13:57:36 +00:00
Daniel Schürmann c2ac4f1917 aco/spill: use average use distances in process_block() 
Totals from 128 (0.16% of 79395) affected shaders: (GFX11)

Instrs: 672936 -> 672086 (-0.13%); split: -0.40%, +0.28%
CodeSize: 3574396 -> 3565540 (-0.25%); split: -0.55%, +0.30%
SpillSGPRs: 6254 -> 6636 (+6.11%); split: -0.32%, +6.43%
SpillVGPRs: 967 -> 839 (-13.24%)
Latency: 6489362 -> 6469427 (-0.31%); split: -0.36%, +0.05%
InvThroughput: 2216723 -> 2212417 (-0.19%); split: -0.24%, +0.05%
VClause: 11670 -> 11517 (-1.31%); split: -1.50%, +0.19%
SClause: 15711 -> 15754 (+0.27%); split: -0.29%, +0.57%
Copies: 85185 -> 84155 (-1.21%); split: -2.14%, +0.93%
Branches: 18706 -> 18708 (+0.01%); split: -0.05%, +0.06%
VALU: 386892 -> 386204 (-0.18%); split: -0.40%, +0.23%
SALU: 85754 -> 86211 (+0.53%); split: -0.46%, +1.00%
VMEM: 18777 -> 18524 (-1.35%); split: -1.37%, +0.02%
VOPD: 670 -> 628 (-6.27%); split: +0.75%, -7.01%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27799>
 2024-03-28 13:57:36 +00:00
Daniel Schürmann 9833120e91 aco/spill: gather information about average use distances 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27799>
 2024-03-28 13:57:36 +00:00
Daniel Schürmann b6e56ab356 aco/spill: use live variables instead of next_use_distances in add_coupling_code() 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27799>
 2024-03-28 13:57:36 +00:00
Daniel Schürmann 7b96482ec9 aco/spill: maintain valid live vars at any point 
In order to do so, we need to process blocks unconditionally.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27799>
 2024-03-28 13:57:36 +00:00
Daniel Schürmann fab8757831 aco/spill: compute live-in variables from live-out 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27799>
 2024-03-28 13:57:36 +00:00
Daniel Schürmann bfb62fa70d aco/spill: pass live_vars to spill_ctx 
We will use them in future commits.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27799>
 2024-03-28 13:57:36 +00:00
Daniel Schürmann 66616f0862 aco/spill: Fix assertion for nested loops 
Fixes: 898fd9227a ('aco/spill: keep loop variables spilled during nested loops')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27799>
 2024-03-28 13:57:36 +00:00
Boyuan Zhang c38a2ab993 radeonsi/vcn: mark rc_per_pic as obsoleted 
Rename parameters in rc_per_pic to emphasize that the method is obsoleted
Add warning to recommend users to update VCN FW for the correct rate control

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28234>
 2024-03-28 13:09:18 +00:00
Boyuan Zhang b61ffe2151 radeonsi/vcn: choose rc_per_pic by encode verison 
Using VCN FW encode version to check if the current FW support the new
rate control per picture method (ex). If not, roll back to use the previous
rate control per picture method.

Fixes: 5ecf83e9ad ("radeonsi/vcn: Implement separate QP for I/P/B frames")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10793

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28234>
 2024-03-28 13:09:18 +00:00
Boyuan Zhang 76425cdf23 ac/gpu_info: Add vcn dec and enc version query 
So that driver can query the current VCN FW decode version and encode
major and minor version.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28234>
 2024-03-28 13:09:18 +00:00
Georg Lehmann 51a5ebbd01 aco: don't combine mul+add_clamp to mad_clamp 
The result is not the same if the multiplication overflows, mad_clamp
does not truncate between the mul and the add.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28421>
 2024-03-28 12:41:49 +00:00
Daniel Schürmann db29984c25 aco: move create_instruction() to aco_ir.cpp 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28370>
 2024-03-28 11:25:43 +00:00
Daniel Schürmann a863c7951e aco: remove create_instruction() template parameter 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28370>
 2024-03-28 11:25:43 +00:00
Daniel Schürmann 4cb73cb5f3 aco: defer instruction size from aco::Format in create_instruction() 
rather than using the template argument.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28370>
 2024-03-28 11:25:43 +00:00
Daniel Schürmann 9b0ebcc39b aco: change return type of create_instruction() to Instruction* 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28370>
 2024-03-28 11:25:43 +00:00
Daniel Schürmann cd62f97719 aco/builder: use accessor functions instead of casting to subtypes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28370>
 2024-03-28 11:25:43 +00:00
Daniel Schürmann 1187189235 aco: unify different SALU types into single struct SALU_instruction 
This removes
- SOP1_instruction
- SOP2_instruction
- SOPC_instruction
- SOPK_instruction
- SOPP_instruction

and their corresponding methods.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28370>
 2024-03-28 11:25:43 +00:00
Daniel Schürmann 5d265257a0 aco: remove SOPP_instruction::block member 
Re-use SOPP_instruction::imm instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28370>
 2024-03-28 11:25:43 +00:00
Daniel Schürmann cef01e817d aco: use instr_class::branch to identify SOPP branches 
Also changes the instr_class of s_trap to instr_class::other.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28370>
 2024-03-28 11:25:43 +00:00
Samuel Pitoiset c2d189380c radv: remove useless RADV_DEBUG=nomemorycache 
This is a leftover from the cache changes few months ago.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28441>
 2024-03-28 10:36:58 +00:00