Commit Graph

162151 Commits

Author SHA1 Message Date
Samuel Pitoiset 4621c4936b radv: enable all possible features with NGG streamout
Tested by forcing NGG streamout on GFX10.3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19435>
2022-11-01 11:28:41 +01:00
Samuel Pitoiset d467ff7b0e radv: set the correct buffer size for NGG streamout
If the size is passed through CmdBindTransformFeedback() uses that.

This partially fixes dEQP-VK.transform_feedback.simple.multiquery_1
by reporting the correct number of primitives written (the computation
is based on the buffer size). There is still a bug around GDS offsets
that will be fixed later.

Tested on GFX10.3 by forcing NGG streamout.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19433>
2022-11-01 10:41:36 +01:00
Gert Wollny 3b9f36db47 r600/sfn: Handle load_workgroup_size
Fixes: 79ca456b48
   r600/sfn: rewrite NIR backend

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19417>
2022-11-01 08:04:48 +00:00
Samuel Pitoiset 76555a4777 radv: fix primitives generated query with NGG only
According to the AMD registers database, SAMPLE_STREAMOUTSTATS no
longer exists on GFX11. This fixes primitives generated query if only
the NGG path is used. Tested on GFX10.3 by forcing NGG everywhere.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19410>
2022-11-01 07:26:31 +00:00
Samuel Pitoiset 8dafda4a07 radv: suspend/resume primitives generated query separately for legacy/NGG
With NGG only, only the GDS query counter will be incremented.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19410>
2022-11-01 07:26:31 +00:00
Samuel Pitoiset e83ec595df radv: use 32-bit GDS counters for primitives generated query with NGG
Do not need to use 64-bit operations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19410>
2022-11-01 07:26:31 +00:00
Samuel Pitoiset 1e925ce565 radv: reword an incorrect comment about primitives generated query
This is not the XFB counter.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19410>
2022-11-01 07:26:31 +00:00
Luis Felipe Strano Moraes 2842c04bf5 meson: simplified meson for enabling ray-tracing on Intel
Removed warning about deprecated usage that was not necessary.
Also added information on whether support is enabled or not to the
summary so it is easier to check when building.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19332>
2022-11-01 06:30:47 +00:00
Alyssa Rosenzweig fda7d17e81 gallium: Default to PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT
Supported in all hardware and software drivers. Only that don't support
are virgl and svga, depending on host capabilities. I don't think
there's anything to be done there. This does give fewer places to screw
up the CAPs, though, because everyone wants ARB_buffer_storage.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Ol<C5><A1><C3><A1>k <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19392>
2022-10-31 23:35:33 -04:00
Alyssa Rosenzweig 614a8502a8 etnaviv: Advertise PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT
This CAP only concerns mapping of buffers, not textures. For buffers,
etnaviv does not seem to use any staging resources. In neither case does
etnaviv use explicit syncs or flushes, so persistent/coherent mapping
should come as the implicit default and the cap should be almost free.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19392>
2022-10-31 23:35:30 -04:00
Alyssa Rosenzweig 8a09eee858 i915g: Advertise PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT
Currently buffer_map returns the raw pointer, there is no syncing or
flushing or staging buffers or resource shadowing anywhere. That means
if the driver is currently correct, it is implementing persistent and
coherent behaviour already, so the CAP is trivial.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19392>
2022-10-31 23:34:39 -04:00
Alyssa Rosenzweig 1ad51f05c2 softpipe: Advertise PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT
It's a software rasterizer, all buffers are necessarily persistent and
coherent. There are no staging buffers in transfer_map and no sync/flush
operations, so this is trivial.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19392>
2022-10-31 23:34:36 -04:00
Frank Binns d3d68394ce CODEOWNERS: remove rajnesh-kanwal as an Imagination maintainer
Rajnesh has moved onto other non-graphics things.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19135>
2022-10-31 23:59:41 +00:00
Nanley Chery 0fa540ef61 iris: Reduce use of RHWO optimization (Wa_1508744258)
Implement Wa_1508744258:

   Disable RHWO by setting 0x7010[14] by default except during resolve
   pass.

Disable the RCC RHWO optimization at all times except when resolving
single sampled color surfaces. MCS partial resolves are done via
software (i.e., not via a HW bit) and so are not expected to need this
workaround.

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19360>
2022-10-31 23:26:06 +00:00
António Monteiro 3e56968984 gallium/util: remove network class
Signed-off-by: António Monteiro <antonio.fmr.monteiro@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19403>
2022-10-31 19:30:09 +00:00
jenneron d9f0fef91d docs/panfrost: Document Mali-T620 support
This one is already supported

Signed-off-by: Anton Bambura <jenneron@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19415>
2022-10-31 18:53:24 +00:00
Emma Anholt 4e14da056d zink: Enable mesa/st frontend shader caching.
This required fixing up the disk cache to hash in stuff that was missing
(like the proper pipeline cache uuid rather than just PCI IDs, and also
zink's build ID).  Once we do that, we can just hand the frontend our disk
cache and avoid GLSL->NIR recompiles.

tu asphalt_9 trace perf +3.14859% +/- 1.36891% (n=4)

Fixes: #7513
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19124>
2022-10-31 18:32:44 +00:00
Jesse Natalie b4f2b244fa d3d12: Advertise PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19396>
2022-10-31 18:17:41 +00:00
Jesse Natalie 61afaa0c68 dzn: Set factory flags before creating device
I got this in d3d12 but missed it in dzn

Fixes: 74d1c72b ("dzn: Support device factories in addition to global device creation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19420>
2022-10-31 18:03:02 +00:00
Konstantin Seurer 1c7d208302 radv/rt: Set vars.arg in the traversal shader
Fixes: f4270b7 ("radv/rt: create traversal shader independent from main shader")
Closes: #7591
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19402>
2022-10-31 17:25:55 +00:00
Michel Dänzer 6fd1414016 radeonsi/ci: Test piglit quick_shader profile as well
It's useful for catching regressions, e.g. it would have caught
https://gitlab.freedesktop.org/mesa/mesa/-/issues/7567 .

For the radeonsi-stoney-gl:amd64 job, we can use the "gpu" profile,
which contains quick_gl and quick_shader.

For the radeonsi-raven-piglit-gl:amd64 job, that would almost double
the runtime, and bring it dangerously close to the 30 minutes timeout.
Instead, split it up into radeonsi-raven-piglit-quick_gl:amd64 and
radeonsi-raven-piglit-quick_shader:amd64 jobs.

v2:
* Rebase, drop spec@arb_tessellation_shader@execution flakes and add
  one crash instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19378>
2022-10-31 16:58:26 +00:00
Rhys Perry b7ea47ede6 radv,aco: don't use lower_to_fragment_fetch_amd on GFX11+
FMask doesn't exist on GFX11. Have txf_ms take the fragment_fetch_amd
path.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19375>
2022-10-31 16:26:30 +00:00
Rhys Perry b9a3d8b0ab radv/gfx11: don't create texop_samples_identical
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19375>
2022-10-31 16:26:30 +00:00
Rhys Perry d31e5c8efc radv/gfx11: don't create fmask copy/expand pipelines
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19375>
2022-10-31 16:26:30 +00:00
Rhys Perry 140cefe95a ac/nir: lower gfx11 vertex parameter exports
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19228>
2022-10-31 14:33:43 +00:00
Rhys Perry 14a1925727 aco: don't split swizzled store_buffer_amd on GFX9+
This isn't necessary.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19228>
2022-10-31 14:33:43 +00:00
Rhys Perry e6d26cb288 nir,ac/nir,aco,radv: replace has_input_*_amd with more general intrinsics
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19228>
2022-10-31 14:33:43 +00:00
Samuel Pitoiset 9f692f5aa6 radv: do not unconditionally disable NGG streamout lowering in NIR
This is still always disabled because use_ngg_streamout is FALSE
but it will be turned on at some point.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19317>
2022-10-31 13:48:39 +00:00
Samuel Pitoiset d653ca4c52 radv: lower NIR intrinsics for NGG streamout
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19317>
2022-10-31 13:48:39 +00:00
Samuel Pitoiset 3bafe6e0bc radv: call nir_io_add_intrinsic_xfb_info() after IO lowering
This is needed for NGG streamout which gets the XFB info directly
from intrinsics.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19317>
2022-10-31 13:48:39 +00:00
Samuel Pitoiset ed865440db radv/llvm: prevent emitting streamout outputs for NGG
They are directly emitted from NIR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19317>
2022-10-31 13:48:39 +00:00
Samuel Pitoiset fa287c99ed aco: remove invalid assertions for NGG streamout
Streamout outputs are directly emitted from NIR now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19317>
2022-10-31 13:48:39 +00:00
Samuel Pitoiset db7ffa4006 aco: implement NIR intrinsics for NGG streamout
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19317>
2022-10-31 13:48:39 +00:00
Samuel Pitoiset fdc212bd7b aco: create a new builder variant for ds_add_rtn
This instruction can use 1 definition and 3 operands.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19317>
2022-10-31 13:48:39 +00:00
Bas Nieuwenhuizen 5d04064642 radv: Handle attribute ring intrinsic correctly with LLVM.
Again, if we don't set progress to false we get fun stuff.

Fixes: 8bf1aa1b76 ("radv: add lowering for nir_intrinsic_load_ring_attr_{offset}_amd")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19404>
2022-10-31 13:17:04 +00:00
Bas Nieuwenhuizen 45ff58cfd1 radv: Handle GSVS ring intrinsic correctly with LLVM.
If we don't set progress to false we get a mess as a replacement is
still attempted.

Fixes: 382831c986 ("radv,nir: add intrinsics for streamout and GS copy shaders")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19404>
2022-10-31 13:17:04 +00:00
Bas Nieuwenhuizen ec9d71498e radv: Use correct types for loading the rings with LLVM.
Ring descriptors are v4i32, not i8.

Fixes: cb117cdc96 ("radv/llvm: use ac_build_gep0_type to get args types")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19404>
2022-10-31 13:17:04 +00:00
Anton Bambura 18e7f5c428 panfrost: Enable Mali-T620
Support of this GPU is now good enough to enable it

Signed-off-by: Anton Bambura <jenneron@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19408>
2022-10-31 13:02:06 +00:00
Gert Wollny 333aa0a6e8 r600: Print MOVA_INT dest on Cayman
On Cayman the index registers can be written too, so print it.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19397>
2022-10-31 12:52:49 +00:00
Gert Wollny dfeb96e277 r600: Only count ALU registers that are not clause local
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19397>
2022-10-31 12:52:49 +00:00
Gert Wollny 04465c10bd r600: declare for counter locally and fix signed/unsigned warning
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19397>
2022-10-31 12:52:49 +00:00
Samuel Pitoiset d4ec3f21cf Revert "radv: add a pointer to radv_shader_binary in radv_shader"
This is actually not necessary because we compile and upload binaries
directly from libraries with GPL. This introduced random double free
crashes because binaries were potentially freed by concurrent threads.

Root cause found by Ishi.

This reverts commit f8d887527a.

Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19383>
2022-10-31 12:16:38 +00:00
Sunil Khatri 4f57dfc115 winsys/amdgpu: clamp up the alignment if zero
Zero alignment buffers is a valid alignment and is
used for the cases when there is no special alignment
enforced due to hardware requirement.

Clamp up the buffer alignment of such buffers to
gart_page_size. Screenshot app uses such buffers
with zero alignment which is returned NULL by winsys
and failed and hence failed to capture.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19314>
2022-10-31 11:48:14 +00:00
Danylo Piliaiev 5eaca461a7 freedreno/fdl: Increase alignment for UBWC images
From empirical tests (on a660) R8G8 with UBWC enabled requires 256b
alignment, otherwise there would be a GPU fault during blits.

Set alignment to 4096 for all UBWC images since that's what blob does
and this area is heavily undertested.

Fixes GPU fault in Borderlands 3 running through DXVK.

cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19298>
2022-10-31 11:17:31 +00:00
Frank Binns d4b43d1bcf pvr: setup buffer and image format feature bits
Note, this also fixes a case where image usage and format feature flags were
being mixed. This was noticed as part of the conversion to format feature 2
flags.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19372>
2022-10-31 11:07:30 +00:00
Georg Lehmann 2eac571d61 aco: Use opsel for the third operand.
Foz-DB Navi21:
Totals from 2 (0.00% of 134913) affected shaders:
CodeSize: 7788 -> 7772 (-0.21%)
Instrs: 1305 -> 1303 (-0.15%)
Latency: 7175 -> 7163 (-0.17%)
InvThroughput: 2082 -> 2078 (-0.19%)
Copies: 57 -> 55 (-3.51%)

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19380>
2022-10-31 09:54:01 +00:00
Samuel Pitoiset 25e311e9d3 radv: implement transform feedback queries with NGG streamout
The control bit is written to the upper bits because GDS counters
are 32-bits only, this allows to re-use the existing query shader.

Tested on GFX10.3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19325>
2022-10-31 08:22:29 +00:00
Tapani Pälli 7cfd0e8d31 hasvk: remove some unused functions
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19368>
2022-10-31 06:59:36 +00:00
Tapani Pälli f9176d9b2c anv: remove some unused functions
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19368>
2022-10-31 06:59:36 +00:00
Bas Nieuwenhuizen 78519987b9 radv: Speculatively tune RT pipelines for GFX11.
With ACO not supporting VOPD and the high number of SALU instructions,
we're likely better off using wave64 until we can actually benchmark
this and fix these issues.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19288>
2022-10-31 02:39:34 +00:00