Commit Graph

137877 Commits

Author SHA1 Message Date
Leo Liu 2c1e4c4baa meson: bump drm amdgpu version to 2.4.105
To include the INFO ioctl query for video caps

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10095>
2021-04-12 17:33:32 +00:00
Ilia Mirkin 1b06189f4a nv50: enable ARB_framebuffer_no_attachments
This is a required part of ES3.1 and fairly trivial to enable. In
practice it's almost entirely useless since the only information one
would be able to obtain are queries.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10162>
2021-04-12 16:45:40 +00:00
Ilia Mirkin 97d61ae771 nv50/ir: fake SV_THREAD_KILL support
If we say that there are no helper invocations, it's suboptimal but
allows ES 3.1 to chug along.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10162>
2021-04-12 16:45:40 +00:00
Ilia Mirkin ea49c9dabc nv50: emulate indirect draws
This is helpful for allowing ES 3.1 to work, as this is required.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10162>
2021-04-12 16:45:40 +00:00
Ilia Mirkin 1baefe4119 nv50/ir: fix texture size for msaa textures
These are scaled up in the descriptor, which doesn't really know about
their MSAA-ness. So we have to shift them back down.

Cc: mesa-stable
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10162>
2021-04-12 16:45:40 +00:00
Rhys Perry 723b000d27 radv: don't use fp16 for 8-bit division lowering before GFX9
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10081>
2021-04-12 16:19:46 +00:00
Rhys Perry d8f12fd421 aco: fix 16-bit f2{u8,i8} on GFX6/7
Not really tested.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10081>
2021-04-12 16:19:46 +00:00
Rhys Perry d0e15b8c22 aco: fix 16-bit u2f32
This shouldn't sign-extend.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10081>
2021-04-12 16:19:46 +00:00
Rhys Perry 254360d96c nir/lower_idiv: make lowered divisions exact
I can't imagine any reasonable optimization which could break this, but
since it's lowered from an integer instructions, we shouldn't do anything
which could change the result.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10081>
2021-04-12 16:19:46 +00:00
Rhys Perry a2619b97f5 nir/lower_idiv: add options to use fp32 for 8-bit division lowering
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10081>
2021-04-12 16:19:46 +00:00
Rhys Perry 7db8d307bc radv: remove second nir_lower_idiv
nir_lower_idiv now lowers 8/16-bit divisions.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10081>
2021-04-12 16:19:45 +00:00
Alyssa Rosenzweig e00d94f14f panfrost: Enable AFBC buffer sharing
This was hidden originally to workaround a bug in the RK3399 display
driver. The patch resolving this issue has been merged in the upstream
kernel, and in fact...

1. The issue was visible on 21.0 even with this workaround under certain
   configurations (sway with an external monitor).
2. Even on buggy kernels, due to other platform details this is an
   obscure bug to hit (not aware of any ways to trigger it OOTB with
   current userspaces other than sway with an external monitor)

So why bother? Let's just delete the hack and let AFBC be used freely.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10148>
2021-04-12 15:55:55 +00:00
Alyssa Rosenzweig 23b060bba7 panfrost: Fix AFBC body_size for shared resources
Accidental read-before-write due to incorrect statement ordering. I love
SSA as much as anyone, but not everything is a parallel copy.

Fixes faults in glamor in 21.0 when using GIMP on v5.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Fixes: e8b997e175 ("panfrost: Add AFBC slice.body_size and slice.{row,surface}_stride fields")
Closes: #4389
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10148>
2021-04-12 15:55:55 +00:00
Mike Blumenkrantz e52712a653 zink: disable mutable formats for zs formats and scanout images
swapchain images are never going to be used as texture views, and zs formats
aren't compatible with any other formats

this enables implicit modifiers in some cases, and more work can be done in the future
to eliminate mutable format usage to further improve performance

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10180>
2021-04-12 15:37:46 +00:00
Mike Blumenkrantz 3622df7ab2 zink: flag anv for mesa image create wsi
the image creation wsi is used, but the memory creation wsi isn't

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10180>
2021-04-12 15:37:46 +00:00
Mike Blumenkrantz 104603fa76 zink: create separate linear tiling image for scanout
rendering onto a linear-tiled image is unbelievably slow if any sort of
blending is enabled, so instead always render to optimal tiling and then
copy to linear for scanout

this doubles performance for now and can be deleted in its entirety along
with the rest of the related hacks once real wsi support is implemented

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10180>
2021-04-12 15:37:46 +00:00
Juan A. Suarez Romero e7f4f1b582 broadcom/compiler: use signed pointers for packed condition
`qpu.raddr_b` is an unsigned int, so it is always positive, even after
casting to signed int.

Fixes CID#1438117 "Operands don't affect result
(CONSTANT_EXPRESSION_RESULT)":

   "result_independent_of_operands: (int)inst->qpu.raddr_b >= -16 is
    always true regardless of the values of its operands. This occurs as
    the logical first operand of "&&".

v2:
 - Use signed pointers (Iago)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10131>
2021-04-12 15:22:05 +00:00
Danylo Piliaiev 16fd5bd996 turnip: support copying both aspects of D32_SFLOAT_S8_UINT
We cannot copy both aspects at the same time, so copy them one by one.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10140>
2021-04-12 14:36:30 +00:00
Jesse Natalie c04b36de39 vtn: Add a cap for CL drivers to support read-write images
This is a required CL2.0, optional CL3.0 feature

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10181>
2021-04-12 13:41:39 +00:00
Jesse Natalie 9f82399bf9 vtn: Don't warn about linkage capability if we're creating a NIR library
We've supported this for a while now for libclc

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10181>
2021-04-12 13:41:39 +00:00
Mike Blumenkrantz 6a545e69d9 zink: make a bunch of descriptor functions static
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10177>
2021-04-12 12:51:27 +00:00
Mike Blumenkrantz 344c4ab580 zink: move descriptor state management to descriptors.c
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10177>
2021-04-12 12:51:27 +00:00
Pierre-Eric Pelloux-Prayer 8c6a64c9b0 radeonsi/rgp: export compute shader programs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10105>
2021-04-12 14:27:29 +02:00
Pierre-Eric Pelloux-Prayer aa077ba3a2 radeonsi/rgp: export barriers
Wrap the si_cp_wait_mem call to emit RGP_SQTT_MARKER_IDENTIFIER_BARRIER_START and
RGP_SQTT_MARKER_IDENTIFIER_BARRIER_END events.

Only for gfx9+ for now.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10105>
2021-04-12 14:27:26 +02:00
Tomeu Vizoso 0e0dc669bd Revert "ci: Disable panfrost t760"
The devices have been running KernelCI jobs for a good while without
glitches, let's reenable Mesa jobs on them now.

This reverts commit c6fbbbbf70.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10173>
2021-04-12 13:19:23 +02:00
Tomeu Vizoso 44f0dbb724 Revert "ci: Disable panfrost g52"
The devices have been running KernelCI jobs for a good while without
glitches, let's reenable Mesa jobs on them now.

This reverts commit 40647fcc3d.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10173>
2021-04-12 13:19:19 +02:00
Tomeu Vizoso 113cb036c7 Revert "ci: Disable t720 LAVA jobs"
The maintenance window is closed.

This reverts commit 4fa9c35942.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10173>
2021-04-12 13:19:05 +02:00
Tomeu Vizoso 10f05c9030 ci: Disable t720 LAVA jobs
As the devices providing the testing are going down due to a planned
maintenance window of 4 hours.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10167>
2021-04-12 09:09:04 +02:00
Pierre-Eric Pelloux-Prayer fd0480957b vbo: inline vbo_primitive_restart in brw_primitive_restart
This is the only user of this code.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10066>
2021-04-12 07:36:36 +02:00
Pierre-Eric Pelloux-Prayer 2f1014e41d st/draw: remove st_draw_vbo
Driver.Draw is now unused for Gallium drivers - except for st_cb_feedback which
sets its own Draw function.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10066>
2021-04-12 07:36:28 +02:00
James Park d32512effc vulkan/util: Use util_bitcount
__builtin_popcount is not available on all compilers.

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10159>
2021-04-12 03:25:59 +00:00
Ilia Mirkin 80b96a2158 st/mesa: adapt for the case where buffers are not supported in frag
Some logic was tuned to buffers / atomics / images being supported in
frag stages in order to expose any support at all. Fix some of these
assumptions.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10161>
2021-04-11 22:30:18 -04:00
Ilia Mirkin 0dfc5b5196 nv50/ir: fix emission of ld/st lock/unlock
This is necessary to implement shared atomics.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin d0fa6e066b nv50/ir: avoid inlining results of a locked load
These are a bit special. Among other things, removing them will cause us
to potentially remove the load itself, defeating the purpose of the
locking. Also it's unclear whether it's legal to access the shared
memory directly when it's locked like this.

This only comes up on nv50, since on nvc0+, shared memory can't be
loaded from random ops.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin 7052927ee4 nv50: fix expression for ucp offset
It doesn't matter since it's 0, but all the offsets are in bytes whereas
the method expects words. So adjust by 2.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin 52172fded5 nv50/ir: fix emission of cas without a destination
We were previously dumping $r127 in there. This has a bad effect on
nv50, so make sure we allocate an actual register for it, even if
there's nothing using the result.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin a3b02fea7e nv50/ir: fix emission of 16-bit add
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin fe93723aaa nv50/ir: add support for 16-bit immediates
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin 8a69efa171 nv50/ir: logic ops on half-regs can't take an immediate
There does not appear to be an instruction form for this. Prevent an
immediate from being loaded into place.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin afcd296b1b nv50/ir: fix emission of shifts on half-regs
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin af8665c3a5 nv50/ir: fix emission of logic ops on half-regs
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin 96e8e74813 nv50/ir: fix emission of cvt with half-reg destinations
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin c6b02c097f nv50/ir: fix emitting movs from imm to short registers
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin 2ff2d65799 nv50/ir: lower buffer to global
The idea is that buffers will be bound to the appropriate indices. That
means that we can just rename them to global.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin ee28cae1ef nv50/ir: fix emission of RED
When the atomic result is unused, the opcode form needs to be a bit
different.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin 1fad964553 nv50/ir: do not use inline offsets for global, ensure indirect access
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin 3e99271163 nv50/ir: force shared memory indirect to be an address
The upstream logic will not end up using an address, so we have to force
it here. The other backends don't care either.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin d2a0aa5efe nv50/ir: retrieve (n)ctaid.z from first user param
The driver is responsible for feeding this in.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin de71feccbf nv50: pass in third axis via user param
This is probably not the most efficient way to go for all geometries,
but the assumption is that kernels tend to be x/y-heavy rather than
z-heavy. Iterates over each z slice and passes in the current value via
user param. (And bump all user params by a dword.)

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin c3e9be9b5a nv50: add texture, constbuf, image, buffer validation
This makes compute mostly work. For now we're laying out images/buffers
in a fixed offset from each other in the globals "array", but this
should be done dynamically. We're also missing passing image info to
shaders, as well as adding image formats to a shader key.

Heavily inspired by nvc0 variants of these.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:14 -04:00