29fb5451a9
pan/bit: Add fp16 min/max tests
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:36 -04:00
532dfebc71
pan/bit: Add constants test
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:36 -04:00
15fe8d5d7b
pan/bit: Add fexp2_fast test
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:36 -04:00
20f255b18e
pan/bit: Add fexp2_fast interp
...
Kind of a hack and not at all how the h/w does it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:36 -04:00
8890fa4050
pan/bit: Add FMA_MSCALE test
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:36 -04:00
b7dd5b579d
pan/bit: _MSCALE interp
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:36 -04:00
1e3960a725
pan/bit: Add BI_TABLE test
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:36 -04:00
93fffd8a11
pan/bit: Add log2 helper interp
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:36 -04:00
1c45b58ceb
pan/bit: Add FMA_REDUCE test
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:36 -04:00
5546d1958b
pan/bit: Add BI_REDUCE_FMA interp
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:36 -04:00
68b4e708f1
pan/bit: Add frexp_log test
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:36 -04:00
36cfe722e5
pan/bit: Add FREXP interp support
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:36 -04:00
c05860789a
pan/bi: Lower special ops to 32-bit
...
We don't have 16-bit tables. We could probably do a bit better to avoid
so many conversions but hey.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:36 -04:00
4d0f941036
pan/bi: Round constants to 32-bit
...
We can only access lo/hi at 32-bit intervals.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:36 -04:00
d30df466b5
pan/bi: Dump extra bits for disasm
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
590d66fa0c
pan/bi: Pack MAX.v2f16
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
f87403c4c1
pan/bi: Pack ADD.v2f16
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
7e76c2b806
pan/bi: Structify add and min/max fp16 ADD
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
1647884cec
pan/bi: Workaround constant packing errata
...
Incomplete fix.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
d772bf0101
pan/bi: Try to reuse constants in ALU
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
aba7f09902
pan/bi: Handle st_vary with <4 components
...
Still no writemasks.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
438e445e17
pan/bi: Fix vec2/3 handling
...
Otherwise we get moves from null.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
031ad0ecc2
pan/bi: Implement flog2
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
8e52206dbe
pan/bi: Add fexp2 implementation
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
b1d4d8f743
pan/bi: Fix lower_combine swizzle rewrite
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Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
60f252708f
pan/bi: Fix packing with low-nibble-set on hi constant
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
10fb5fb460
pan/bi: Fix packing with multiple constants
...
Need to use bottom nibble of the 64, not the half.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
86c2a6b9fe
pan/bi: Fix bi_get_immediate with multiple imms
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
df69304ac8
pan/bi: Ensure CONSTANT srcs have types
...
So the next commit is valid.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
8f70f4432c
pan/bi: Split src/dest index printing
...
So we can handle constant printing correctly.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
db5c1ae8fd
pan/bi: Add fexp2_fast packing
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
c3eebfeb11
pan/bi: Pack FMA_MSCALE
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
0cb703984e
pan/bi: Structify FMA_MSCALE
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
4570c34fc7
pan/bi: Add _MSCALE flag for FMA/ADD
...
So we can bias by exponents.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
d3643cdd81
pan/bi: Add log2_help packing
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
6039d51e32
pan/bi: Pack ADD_FREXPM
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
ffa9f6a789
pan/bi: Add bi_pack_fma_2src helper
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
9904ed170a
pan/bi: Add frexp_log packing
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:35 -04:00
e067fd7b00
pan/bi: Add log_frexpe op to IR
...
As part of BI_FREXP
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:34 -04:00
40befaa965
pan/bi: Add FLOG2_U op to disassembler
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:34 -04:00
62c8c3445e
pan/bi: Add op for ADD_FREXPM
...
Used in log2. Needs a new class as well due to scheduling silliness.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:34 -04:00
cc61156626
pan/bi: Add special op for exp2
...
Needs some extra help but basically exp2_fast
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:34 -04:00
af01378dce
pan/bi: Add BI_TABLE for fast table accesses
...
Used to implement SPECIAL ops. Separate class since they are faster
which means you can pair them with actual work on FMA.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:34 -04:00
83d961b0c2
pan/bi: Disable FMA scheduling for CONVERT
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:34 -04:00
86c0ea383d
pan/bi: Add disasm for ADD.i8
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615 >
2020-04-17 16:25:34 -04:00
f5deed138a
spirv,nir: Move the SPIR-V vector insert code to NIR
...
This also makes spirv_to_nir a bit simpler because the new
nir_vector_insert helper automatically handles a constant component
selector like nir_vector_extract does.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495 >
2020-04-17 19:21:44 +00:00
feca439697
spirv: Call nir_builder directly for vector_extract
...
The nir_builder helper already handles checking if the component
selector is an immediate and returns an undef in the OOB case.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495 >
2020-04-17 19:21:44 +00:00
acaccff4d3
nir/builder: Handle any bit-size selector in nir_extract
...
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495 >
2020-04-17 19:21:44 +00:00
4b160c6776
spirv: Error if OpCompositeInsert/Extract has OOB indices
...
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495 >
2020-04-17 19:21:44 +00:00
c478f8ad6c
spirv,nir: Add a better vector_insert
...
The old one in spirv_to_nir was besel'ing the whole vector for every
component. If we think about this as a vector operation, we can do it
way more efficiently.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495 >
2020-04-17 19:21:44 +00:00
Alyssa Rosenzweig
Jason Ekstrand