Emma Anholt 4e3c51cbd8 freedreno/a5xx: Set the buffer bit appropriately in XS_CTRL_REG0. ... This seems to be how the bit gets used, from grepping my blob traces. Hopefully this helps stabilize some stuff. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17004>		2022-06-22 20:07:36 +00:00
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adreno	freedreno/a5xx: Set the buffer bit appropriately in XS_CTRL_REG0.	2022-06-22 20:07:36 +00:00
dsi	freedreno/registers: update dsi registers to support dsc	2022-04-01 21:56:40 +00:00
edp	…
hdmi	…
mdp	…
.gitignore	…
adreno.xml	…
freedreno_copyright.xml	…
gen_header.py	freedreno/registers: Handle typed registers with fields	2021-03-11 20:58:39 +00:00
meson.build	…
msm.xml	freedreno/regs: remove 5nm DSI PHY regs	2022-02-23 21:25:22 +00:00
rules-ng-ng.txt	…
rules-ng.xsd	freedreno/rnn: normalize line endings in rules-ng.xsd	2022-01-19 15:17:17 +00:00
text-format.txt	…