Rob Clark f7bd3456d7 freedreno: deduplicate a3xx+ disasm ... Merge the extra tracking that is useful for generating stats from asm (as opposed to ir), and for guestimating things like inputs and outputs (mostly useful for r/e) into ir3's version and drop cffdec's version. There is a small change in disasm output for the decode tools, in that it no longer prints the used consts, but rather just the max accessed const. This is the more useful piece of information, and avoids making the shared regmask type big enough to deal with the const reg file. Additional error checking for invalid regids causes crashdec to bail out sooner when decoding memory that *might* hold valid instructions. Also, crashdec no longer prints stats, because stats aren't very useful when trying to decode random instruction memory (which might or might not be valid instructions). Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>		2020-07-28 09:45:08 +00:00
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tests	freedreno: deduplicate a3xx+ disasm	2020-07-28 09:45:08 +00:00
disasm-a3xx.c	freedreno: deduplicate a3xx+ disasm	2020-07-28 09:45:08 +00:00
instr-a3xx.h	freedreno: deduplicate a3xx+ disasm	2020-07-28 09:45:08 +00:00
ir3.c	ir3: Remove redundant samp_tex validation	2020-07-27 16:38:17 +00:00
ir3.h	freedreno: deduplicate a3xx+ disasm	2020-07-28 09:45:08 +00:00
ir3_a4xx.c	freedreno/ir3: add accessor for const_state	2020-06-19 13:16:57 +00:00
ir3_a6xx.c	freedreno/ir3: fix resinfo wrmask	2020-06-28 16:32:08 +00:00
ir3_assembler.c	ir3: Include ir3_compiler from ir3_shader	2020-06-26 09:34:33 +00:00
ir3_assembler.h	freedreno/ir3: refactor out helper to compile shader from asm	2020-06-19 13:16:57 +00:00
ir3_cf.c	freedreno/ir3: add helpers to deal with src/dst types	2020-05-19 16:06:17 +00:00
ir3_compiler.c	freedreno/ir3: add support for a650 tess shared storage	2020-07-08 02:30:23 +00:00
ir3_compiler.h	freedreno/ir3: add support for a650 tess shared storage	2020-07-08 02:30:23 +00:00
ir3_compiler_nir.c	freedreno/ir3: Fix SSBO size for bindless SSBO's	2020-07-21 19:53:32 +00:00
ir3_context.c	freedreno/ir3: fix half-reg array stores	2020-07-18 09:14:13 -07:00
ir3_context.h	freedreno/ir3: set array precision on creation	2020-07-18 09:14:13 -07:00
ir3_cp.c	ir3: Support variants with different constlen's	2020-06-26 09:34:33 +00:00
ir3_cp_postsched.c	freedreno/ir3: add post-scheduler cp pass	2020-06-16 20:56:15 +00:00
ir3_dce.c	freedreno/ir3: DCE unused arrays	2020-07-14 23:26:15 +00:00
ir3_delay.c	freedreno/ir3/delay: calculate delay properly for (rptN)'d instructions	2020-06-16 20:56:15 +00:00
ir3_disk_cache.c	freedreno/ir3: disk-cache support	2020-06-26 08:55:19 -07:00
ir3_group.c	freedreno/ir3: add helpers to move instructions	2020-06-16 20:56:15 +00:00
ir3_image.c	freedreno/ir3: Refactor out IBO source references.	2020-05-26 18:17:46 +00:00
ir3_image.h	freedreno/ir3: Refactor out IBO source references.	2020-05-26 18:17:46 +00:00
ir3_legalize.c	freedreno/ir3: Fix duplicated fine derivatives instructions.	2020-07-18 00:43:44 +00:00
ir3_lexer.l	freedreno/ir3/parser: half-precision relative regs	2020-07-18 09:14:13 -07:00
ir3_nir.c	freedreno/ir3: Fix SSBO size for bindless SSBO's	2020-07-21 19:53:32 +00:00
ir3_nir.h	freedreno/ir3: add support for a650 tess shared storage	2020-07-08 02:30:23 +00:00
ir3_nir_analyze_ubo_ranges.c	ir3: Support variants with different constlen's	2020-06-26 09:34:33 +00:00
ir3_nir_imul.py	freedreno/ir3: add rule to generate imad24	2019-10-18 15:08:54 -07:00
ir3_nir_lower_io_offsets.c	nir: add helper to copy const_index[]	2020-05-13 20:24:45 -07:00
ir3_nir_lower_load_barycentric_at_offset.c	freedreno/ir3: don't rely on intr->num_components	2020-06-16 02:48:18 +00:00
ir3_nir_lower_load_barycentric_at_sample.c	freedreno/ir3: don't rely on intr->num_components	2020-06-16 02:48:18 +00:00
ir3_nir_lower_tess.c	freedreno/ir3: fix wrong local_primitive_id_start type	2020-07-27 12:17:38 +00:00
ir3_nir_lower_tex_prefetch.c	freedreno/ir3: respect tex prefetch limits	2020-06-11 21:59:54 +00:00
ir3_nir_lower_tg4_to_tex.c	freedreno: Convert nir_lower_tg4_to_tex to the NIR lowering helper.	2019-07-18 11:28:56 -07:00
ir3_nir_move_varying_inputs.c	freedreno/ir3: fix ir3_nir_move_varying_inputs	2020-06-14 17:53:47 +00:00
ir3_nir_trig.py	freedreno/ir3: Disable sin/cos range reduction for mediump.	2020-05-05 17:23:34 +00:00
ir3_parser.y	freedreno/ir3/parser: half-precision relative regs	2020-07-18 09:14:13 -07:00
ir3_postsched.c	freedreno/ir3: make mergedregs a property of the variant	2020-06-18 02:46:28 +00:00
ir3_print.c	freedreno: deduplicate a3xx+ disasm	2020-07-28 09:45:08 +00:00
ir3_ra.c	freedreno/ir3/ra: fix array conflicts for split/merged	2020-07-18 09:21:09 -07:00
ir3_ra.h	freedreno/ir3/ra: be better at failing	2020-07-14 23:26:15 +00:00
ir3_ra_regset.c	freedreno/ir3: decouple regset from gpu gen	2020-06-18 02:46:28 +00:00
ir3_sched.c	freedreno/sched: reset delay counters at start of block	2020-06-16 20:56:15 +00:00
ir3_shader.c	freedreno: deduplicate a3xx+ disasm	2020-07-28 09:45:08 +00:00
ir3_shader.h	ir3: Handle gl_FragStencilRefARB	2020-07-16 20:49:20 +00:00
ir3_validate.c	ir3: Validate bindless samp_tex correctly	2020-07-27 16:38:17 +00:00
meson.build	freedreno/ir3: split out regmask	2020-07-28 09:45:08 +00:00
regmask.h	freedreno: deduplicate a3xx+ disasm	2020-07-28 09:45:08 +00:00