238 lines
9.6 KiB
C
238 lines
9.6 KiB
C
/*
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* Copyright © Microsoft Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "nir_builder.h"
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/* The following float-to-half conversion routines are based on the "half" library:
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* https://sourceforge.net/projects/half/
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*
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* half - IEEE 754-based half-precision floating-point library.
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*
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* Copyright (c) 2012-2019 Christian Rau <rauy@users.sourceforge.net>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
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* WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* Version 2.1.0
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*/
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static bool
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lower_fp16_casts_filter(const nir_instr *instr, const void *data)
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{
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if (instr->type == nir_instr_type_alu) {
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nir_alu_instr *alu = nir_instr_as_alu(instr);
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switch (alu->op) {
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case nir_op_f2f16:
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case nir_op_f2f16_rtne:
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case nir_op_f2f16_rtz:
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return true;
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default:
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return false;
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}
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} else if (instr->type == nir_instr_type_intrinsic) {
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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return intrin->intrinsic == nir_intrinsic_convert_alu_types &&
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nir_intrinsic_dest_type(intrin) == nir_type_float16;
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}
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return false;
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}
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static nir_ssa_def *
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half_rounded(nir_builder *b, nir_ssa_def *value, nir_ssa_def *guard, nir_ssa_def *sticky,
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nir_ssa_def *sign, nir_rounding_mode mode)
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{
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switch (mode) {
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case nir_rounding_mode_rtne:
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return nir_iadd(b, value, nir_iand(b, guard, nir_ior(b, sticky, value)));
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case nir_rounding_mode_ru:
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sign = nir_ushr(b, sign, nir_imm_int(b, 31));
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return nir_iadd(b, value, nir_iand(b, nir_inot(b, sign),
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nir_ior(b, guard, sticky)));
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case nir_rounding_mode_rd:
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sign = nir_ushr(b, sign, nir_imm_int(b, 31));
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return nir_iadd(b, value, nir_iand(b, sign,
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nir_ior(b, guard, sticky)));
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default:
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return value;
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}
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}
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static nir_ssa_def *
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float_to_half_impl(nir_builder *b, nir_ssa_def *src, nir_rounding_mode mode)
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{
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nir_ssa_def *f32infinity = nir_imm_int(b, 255 << 23);
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nir_ssa_def *f16max = nir_imm_int(b, (127 + 16) << 23);
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if (src->bit_size == 64)
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src = nir_f2f32(b, src);
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nir_ssa_def *sign = nir_iand(b, src, nir_imm_int(b, 0x80000000));
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nir_ssa_def *one = nir_imm_int(b, 1);
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nir_ssa_def *abs = nir_iand(b, src, nir_imm_int(b, 0x7FFFFFFF));
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/* NaN or INF. For rtne, overflow also becomes INF, so combine the comparisons */
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nir_push_if(b, nir_ige(b, abs, mode == nir_rounding_mode_rtne ? f16max : f32infinity));
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nir_ssa_def *inf_nanfp16 = nir_bcsel(b,
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nir_ilt(b, f32infinity, abs),
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nir_imm_int(b, 0x7E00),
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nir_imm_int(b, 0x7C00));
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nir_push_else(b, NULL);
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nir_ssa_def *overflowed_fp16 = NULL;
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if (mode != nir_rounding_mode_rtne) {
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/* Handle overflow */
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nir_push_if(b, nir_ige(b, abs, f16max));
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switch (mode) {
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case nir_rounding_mode_rtz:
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overflowed_fp16 = nir_imm_int(b, 0x7BFF);
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break;
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case nir_rounding_mode_ru:
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/* Negative becomes max float, positive becomes inf */
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overflowed_fp16 = nir_bcsel(b, nir_i2b1(b, sign), nir_imm_int(b, 0x7BFF), nir_imm_int(b, 0x7C00));
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break;
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case nir_rounding_mode_rd:
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/* Negative becomes inf, positive becomes max float */
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overflowed_fp16 = nir_bcsel(b, nir_i2b1(b, sign), nir_imm_int(b, 0x7C00), nir_imm_int(b, 0x7BFF));
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break;
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default: unreachable("Should've been handled already");
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}
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nir_push_else(b, NULL);
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}
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nir_push_if(b, nir_ige(b, abs, nir_imm_int(b, 113 << 23)));
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/* FP16 will be normal */
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nir_ssa_def *zero = nir_imm_int(b, 0);
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nir_ssa_def *value = nir_ior(b,
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nir_ishl(b,
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nir_isub(b,
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nir_ushr(b, abs, nir_imm_int(b, 23)),
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nir_imm_int(b, 112)),
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nir_imm_int(b, 10)),
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nir_iand(b, nir_ushr(b, abs, nir_imm_int(b, 13)), nir_imm_int(b, 0x3FFF)));
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nir_ssa_def *guard = nir_iand(b, nir_ushr(b, abs, nir_imm_int(b, 12)), one);
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nir_ssa_def *sticky = nir_bcsel(b, nir_ine(b, nir_iand(b, abs, nir_imm_int(b, 0xFFF)), zero), one, zero);
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nir_ssa_def *normal_fp16 = half_rounded(b, value, guard, sticky, sign, mode);
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nir_push_else(b, NULL);
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nir_push_if(b, nir_ige(b, abs, nir_imm_int(b, 102 << 23)));
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/* FP16 will be denormal */
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nir_ssa_def *i = nir_isub(b, nir_imm_int(b, 125), nir_ushr(b, abs, nir_imm_int(b, 23)));
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nir_ssa_def *masked = nir_ior(b, nir_iand(b, abs, nir_imm_int(b, 0x7FFFFF)), nir_imm_int(b, 0x800000));
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value = nir_ushr(b, masked, nir_iadd(b, i, one));
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guard = nir_iand(b, nir_ushr(b, masked, i), one);
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sticky = nir_bcsel(b, nir_ine(b, nir_iand(b, masked, nir_isub(b, nir_ishl(b, one, i), one)), zero), one, zero);
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nir_ssa_def *denormal_fp16 = half_rounded(b, value, guard, sticky, sign, mode);
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nir_push_else(b, NULL);
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/* Handle underflow. Nonzero values need to shift up or down for round-up or round-down */
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nir_ssa_def *underflowed_fp16 = zero;
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if (mode == nir_rounding_mode_ru ||
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mode == nir_rounding_mode_rd) {
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nir_push_if(b, nir_i2b1(b, abs));
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if (mode == nir_rounding_mode_ru)
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underflowed_fp16 = nir_bcsel(b, nir_i2b1(b, sign), zero, one);
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else
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underflowed_fp16 = nir_bcsel(b, nir_i2b1(b, sign), one, zero);
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nir_push_else(b, NULL);
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nir_pop_if(b, NULL);
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underflowed_fp16 = nir_if_phi(b, underflowed_fp16, zero);
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}
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nir_pop_if(b, NULL);
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nir_ssa_def *underflowed_or_denorm_fp16 = nir_if_phi(b, denormal_fp16, underflowed_fp16);
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nir_pop_if(b, NULL);
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nir_ssa_def *finite_fp16 = nir_if_phi(b, normal_fp16, underflowed_or_denorm_fp16);
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nir_ssa_def *finite_or_overflowed_fp16 = finite_fp16;
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if (mode != nir_rounding_mode_rtne) {
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nir_pop_if(b, NULL);
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finite_or_overflowed_fp16 = nir_if_phi(b, overflowed_fp16, finite_fp16);
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}
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nir_pop_if(b, NULL);
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nir_ssa_def *fp16 = nir_if_phi(b, inf_nanfp16, finite_or_overflowed_fp16);
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return nir_u2u16(b, nir_ior(b, fp16, nir_ushr(b, sign, nir_imm_int(b, 16))));
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}
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static nir_ssa_def *
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lower_fp16_cast_impl(nir_builder *b, nir_instr *instr, void *data)
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{
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nir_ssa_def *src, *dst;
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uint8_t *swizzle = NULL;
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nir_rounding_mode mode = nir_rounding_mode_rtne;
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if (instr->type == nir_instr_type_alu) {
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nir_alu_instr *alu = nir_instr_as_alu(instr);
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src = alu->src[0].src.ssa;
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swizzle = alu->src[0].swizzle;
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dst = &alu->dest.dest.ssa;
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switch (alu->op) {
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case nir_op_f2f16:
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case nir_op_f2f16_rtne:
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break;
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case nir_op_f2f16_rtz:
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mode = nir_rounding_mode_rtz;
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break;
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default: unreachable("Should've been filtered");
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}
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} else {
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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assert(nir_intrinsic_src_type(intrin) == nir_type_float32);
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src = intrin->src[0].ssa;
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dst = &intrin->dest.ssa;
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mode = nir_intrinsic_rounding_mode(intrin);
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}
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nir_ssa_def *rets[NIR_MAX_VEC_COMPONENTS] = { NULL };
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for (unsigned i = 0; i < dst->num_components; i++) {
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nir_ssa_def *comp = nir_channel(b, src, swizzle ? swizzle[i] : i);
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rets[i] = float_to_half_impl(b, comp, mode);
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}
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return nir_vec(b, rets, dst->num_components);
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}
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bool
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nir_lower_fp16_casts(nir_shader *shader)
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{
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return nir_shader_lower_instructions(shader,
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lower_fp16_casts_filter,
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lower_fp16_cast_impl,
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NULL);
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}
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