376 lines
13 KiB
C
376 lines
13 KiB
C
/*
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* Copyright © 2018 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "nir_builder.h"
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/**
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* Some ALU operations may not be supported in hardware in specific bit-sizes.
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* This pass allows implementations to selectively lower such operations to
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* a bit-size that is supported natively and then converts the result back to
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* the original bit-size.
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*/
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static nir_ssa_def *convert_to_bit_size(nir_builder *bld, nir_ssa_def *src,
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nir_alu_type type, unsigned bit_size)
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{
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/* create b2i32(a) instead of i2i32(b2i8(a))/i2i32(b2i16(a)) */
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nir_alu_instr *alu = nir_src_as_alu_instr(nir_src_for_ssa(src));
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if ((type & (nir_type_uint | nir_type_int)) && bit_size == 32 &&
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alu && (alu->op == nir_op_b2i8 || alu->op == nir_op_b2i16)) {
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nir_alu_instr *instr = nir_alu_instr_create(bld->shader, nir_op_b2i32);
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nir_alu_src_copy(&instr->src[0], &alu->src[0]);
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return nir_builder_alu_instr_finish_and_insert(bld, instr);
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}
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return nir_convert_to_bit_size(bld, src, type, bit_size);
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}
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static void
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lower_alu_instr(nir_builder *bld, nir_alu_instr *alu, unsigned bit_size)
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{
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const nir_op op = alu->op;
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unsigned dst_bit_size = alu->dest.dest.ssa.bit_size;
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bld->cursor = nir_before_instr(&alu->instr);
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/* Convert each source to the requested bit-size */
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nir_ssa_def *srcs[NIR_MAX_VEC_COMPONENTS] = { NULL };
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for (unsigned i = 0; i < nir_op_infos[op].num_inputs; i++) {
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nir_ssa_def *src = nir_ssa_for_alu_src(bld, alu, i);
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nir_alu_type type = nir_op_infos[op].input_types[i];
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if (nir_alu_type_get_type_size(type) == 0)
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src = convert_to_bit_size(bld, src, type, bit_size);
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if (i == 1 && (op == nir_op_ishl || op == nir_op_ishr || op == nir_op_ushr)) {
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assert(util_is_power_of_two_nonzero(dst_bit_size));
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src = nir_iand(bld, src, nir_imm_int(bld, dst_bit_size - 1));
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}
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srcs[i] = src;
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}
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/* Emit the lowered ALU instruction */
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nir_ssa_def *lowered_dst = NULL;
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if (op == nir_op_imul_high || op == nir_op_umul_high) {
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assert(dst_bit_size * 2 <= bit_size);
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lowered_dst = nir_imul(bld, srcs[0], srcs[1]);
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if (nir_op_infos[op].output_type & nir_type_uint)
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lowered_dst = nir_ushr_imm(bld, lowered_dst, dst_bit_size);
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else
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lowered_dst = nir_ishr_imm(bld, lowered_dst, dst_bit_size);
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} else {
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lowered_dst = nir_build_alu_src_arr(bld, op, srcs);
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/* The add_sat and sub_sat instructions need to clamp the result to the
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* range of the original type.
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*/
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if (op == nir_op_iadd_sat || op == nir_op_isub_sat) {
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const int64_t int_max = u_intN_max(dst_bit_size);
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const int64_t int_min = u_intN_min(dst_bit_size);
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lowered_dst = nir_iclamp(bld, lowered_dst,
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nir_imm_intN_t(bld, int_min, bit_size),
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nir_imm_intN_t(bld, int_max, bit_size));
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} else if (op == nir_op_uadd_sat || op == nir_op_usub_sat) {
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const uint64_t uint_max = u_uintN_max(dst_bit_size);
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lowered_dst = nir_umin(bld, lowered_dst,
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nir_imm_intN_t(bld, uint_max, bit_size));
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}
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}
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/* Convert result back to the original bit-size */
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if (nir_alu_type_get_type_size(nir_op_infos[op].output_type) == 0 &&
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dst_bit_size != bit_size) {
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nir_alu_type type = nir_op_infos[op].output_type;
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nir_ssa_def *dst = nir_convert_to_bit_size(bld, lowered_dst, type, dst_bit_size);
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nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa, dst);
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} else {
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nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa, lowered_dst);
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}
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}
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static void
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lower_intrinsic_instr(nir_builder *b, nir_intrinsic_instr *intrin,
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unsigned bit_size)
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{
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switch (intrin->intrinsic) {
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case nir_intrinsic_read_invocation:
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case nir_intrinsic_read_first_invocation:
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case nir_intrinsic_vote_feq:
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case nir_intrinsic_vote_ieq:
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case nir_intrinsic_shuffle:
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case nir_intrinsic_shuffle_xor:
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case nir_intrinsic_shuffle_up:
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case nir_intrinsic_shuffle_down:
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case nir_intrinsic_quad_broadcast:
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case nir_intrinsic_quad_swap_horizontal:
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case nir_intrinsic_quad_swap_vertical:
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case nir_intrinsic_quad_swap_diagonal:
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case nir_intrinsic_reduce:
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case nir_intrinsic_inclusive_scan:
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case nir_intrinsic_exclusive_scan: {
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assert(intrin->src[0].is_ssa && intrin->dest.is_ssa);
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const unsigned old_bit_size = intrin->dest.ssa.bit_size;
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assert(old_bit_size < bit_size);
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nir_alu_type type = nir_type_uint;
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if (nir_intrinsic_has_reduction_op(intrin))
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type = nir_op_infos[nir_intrinsic_reduction_op(intrin)].input_types[0];
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else if (intrin->intrinsic == nir_intrinsic_vote_feq)
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type = nir_type_float;
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b->cursor = nir_before_instr(&intrin->instr);
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nir_intrinsic_instr *new_intrin =
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nir_instr_as_intrinsic(nir_instr_clone(b->shader, &intrin->instr));
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nir_ssa_def *new_src = nir_convert_to_bit_size(b, intrin->src[0].ssa,
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type, bit_size);
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new_intrin->src[0] = nir_src_for_ssa(new_src);
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if (intrin->intrinsic == nir_intrinsic_vote_feq ||
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intrin->intrinsic == nir_intrinsic_vote_ieq) {
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/* These return a Boolean; it's always 1-bit */
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assert(new_intrin->dest.ssa.bit_size == 1);
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} else {
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/* These return the same bit size as the source; we need to adjust
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* the size and then we'll have to emit a down-cast.
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*/
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assert(intrin->src[0].ssa->bit_size == intrin->dest.ssa.bit_size);
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new_intrin->dest.ssa.bit_size = bit_size;
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}
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nir_builder_instr_insert(b, &new_intrin->instr);
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nir_ssa_def *res = &new_intrin->dest.ssa;
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if (intrin->intrinsic == nir_intrinsic_exclusive_scan) {
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/* For exclusive scan, we have to be careful because the identity
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* value for the higher bit size may get added into the mix by
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* disabled channels. For some cases (imin/imax in particular),
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* this value won't convert to the right identity value when we
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* down-cast so we have to clamp it.
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*/
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switch (nir_intrinsic_reduction_op(intrin)) {
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case nir_op_imin: {
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int64_t int_max = (1ull << (old_bit_size - 1)) - 1;
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res = nir_imin(b, res, nir_imm_intN_t(b, int_max, bit_size));
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break;
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}
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case nir_op_imax: {
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int64_t int_min = -(int64_t)(1ull << (old_bit_size - 1));
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res = nir_imax(b, res, nir_imm_intN_t(b, int_min, bit_size));
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break;
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}
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default:
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break;
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}
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}
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if (intrin->intrinsic != nir_intrinsic_vote_feq &&
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intrin->intrinsic != nir_intrinsic_vote_ieq)
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res = nir_u2u(b, res, old_bit_size);
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nir_ssa_def_rewrite_uses(&intrin->dest.ssa, res);
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break;
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}
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default:
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unreachable("Unsupported instruction");
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}
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}
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static void
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lower_phi_instr(nir_builder *b, nir_phi_instr *phi, unsigned bit_size,
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nir_phi_instr *last_phi)
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{
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assert(phi->dest.is_ssa);
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unsigned old_bit_size = phi->dest.ssa.bit_size;
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assert(old_bit_size < bit_size);
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nir_foreach_phi_src(src, phi) {
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b->cursor = nir_after_block_before_jump(src->pred);
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assert(src->src.is_ssa);
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nir_ssa_def *new_src = nir_u2u(b, src->src.ssa, bit_size);
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nir_instr_rewrite_src(&phi->instr, &src->src, nir_src_for_ssa(new_src));
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}
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phi->dest.ssa.bit_size = bit_size;
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b->cursor = nir_after_instr(&last_phi->instr);
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nir_ssa_def *new_dest = nir_u2u(b, &phi->dest.ssa, old_bit_size);
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nir_ssa_def_rewrite_uses_after(&phi->dest.ssa, new_dest,
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new_dest->parent_instr);
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}
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static bool
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lower_impl(nir_function_impl *impl,
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nir_lower_bit_size_callback callback,
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void *callback_data)
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{
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nir_builder b;
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nir_builder_init(&b, impl);
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bool progress = false;
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nir_foreach_block(block, impl) {
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/* Stash this so we can rewrite phi destinations quickly. */
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nir_phi_instr *last_phi = nir_block_last_phi_instr(block);
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nir_foreach_instr_safe(instr, block) {
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unsigned lower_bit_size = callback(instr, callback_data);
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if (lower_bit_size == 0)
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continue;
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switch (instr->type) {
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case nir_instr_type_alu:
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lower_alu_instr(&b, nir_instr_as_alu(instr), lower_bit_size);
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break;
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case nir_instr_type_intrinsic:
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lower_intrinsic_instr(&b, nir_instr_as_intrinsic(instr),
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lower_bit_size);
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break;
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case nir_instr_type_phi:
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lower_phi_instr(&b, nir_instr_as_phi(instr),
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lower_bit_size, last_phi);
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break;
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default:
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unreachable("Unsupported instruction type");
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}
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progress = true;
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}
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}
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if (progress) {
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nir_metadata_preserve(impl, nir_metadata_block_index |
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nir_metadata_dominance);
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} else {
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nir_metadata_preserve(impl, nir_metadata_all);
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}
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return progress;
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}
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bool
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nir_lower_bit_size(nir_shader *shader,
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nir_lower_bit_size_callback callback,
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void *callback_data)
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{
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bool progress = false;
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nir_foreach_function(function, shader) {
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if (function->impl)
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progress |= lower_impl(function->impl, callback, callback_data);
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}
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return progress;
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}
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static void
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split_phi(nir_builder *b, nir_phi_instr *phi)
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{
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nir_phi_instr *lowered[2] = {
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nir_phi_instr_create(b->shader),
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nir_phi_instr_create(b->shader)
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};
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int num_components = phi->dest.ssa.num_components;
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assert(phi->dest.ssa.bit_size == 64);
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nir_foreach_phi_src(src, phi) {
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assert(num_components == src->src.ssa->num_components);
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b->cursor = nir_before_src(&src->src, false);
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nir_ssa_def *x = nir_unpack_64_2x32_split_x(b, src->src.ssa);
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nir_ssa_def *y = nir_unpack_64_2x32_split_y(b, src->src.ssa);
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nir_phi_instr_add_src(lowered[0], src->pred, nir_src_for_ssa(x));
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nir_phi_instr_add_src(lowered[1], src->pred, nir_src_for_ssa(y));
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}
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nir_ssa_dest_init(&lowered[0]->instr, &lowered[0]->dest,
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num_components, 32, NULL);
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nir_ssa_dest_init(&lowered[1]->instr, &lowered[1]->dest,
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num_components, 32, NULL);
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b->cursor = nir_before_instr(&phi->instr);
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nir_builder_instr_insert(b, &lowered[0]->instr);
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nir_builder_instr_insert(b, &lowered[1]->instr);
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b->cursor = nir_after_phis(nir_cursor_current_block(b->cursor));
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nir_ssa_def *merged = nir_pack_64_2x32_split(b, &lowered[0]->dest.ssa, &lowered[1]->dest.ssa);
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nir_ssa_def_rewrite_uses(&phi->dest.ssa, merged);
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nir_instr_remove(&phi->instr);
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}
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static bool
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lower_64bit_phi_impl(nir_function_impl *impl)
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{
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nir_builder b;
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nir_builder_init(&b, impl);
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bool progress = false;
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nir_foreach_block(block, impl) {
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nir_foreach_instr_safe(instr, block) {
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if (instr->type != nir_instr_type_phi)
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break;
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nir_phi_instr *phi = nir_instr_as_phi(instr);
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assert(phi->dest.is_ssa);
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if (phi->dest.ssa.bit_size <= 32)
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continue;
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split_phi(&b, phi);
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progress = true;
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}
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}
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if (progress) {
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nir_metadata_preserve(impl, nir_metadata_block_index |
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nir_metadata_dominance);
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} else {
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nir_metadata_preserve(impl, nir_metadata_all);
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}
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return progress;
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}
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bool
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nir_lower_64bit_phis(nir_shader *shader)
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{
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bool progress = false;
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nir_foreach_function(function, shader) {
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if (function->impl)
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progress |= lower_64bit_phi_impl(function->impl);
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}
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return progress;
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}
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