Commit Graph

87951 Commits

Author SHA1 Message Date
Timothy Arceri 2a4d169735 i965: stop passing gl_shader_program to brw_nir_setup_glsl_uniforms()
We can now just get the data needed from the gl_shader_program_data
pointer in gl_program.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-01-06 11:21:41 +11:00
Timothy Arceri d3b2ee6b49 i965: pass gl_program to brw_upload_ubo_surfaces()
There is no need to pass gl_linked_shader anymore.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-01-06 11:21:41 +11:00
Timothy Arceri 9ca14f583c i965: stop passing gl_shader_program to brw_assign_common_binding_table_offsets()
We now get everything we need directly from gl_program so there is
no need for this.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-01-06 11:21:41 +11:00
Timothy Arceri f5bc127b2f st/mesa/glsl/i965: move ShaderStorageBlocks to gl_program
Having it here rather than in gl_linked_shader allows us to simplify
the code.

Also it is error prone to depend on the gl_linked_shader for programs
in current use because a failed linking attempt will free infomation
about the current program. In i965 we could be trying to recompile
a shader variant but may have lost some required fields.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-01-06 11:21:41 +11:00
Timothy Arceri f62eb6c7eb st/mesa/glsl/i965: set num_ssbos directly in shader_info
Here we also remove the duplicate field in gl_linked_shader and always
get the value from shader_info instead.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-01-06 11:21:41 +11:00
Timothy Arceri 0e7eec1ab5 st/mesa/glsl/i965: move per stage UniformBlocks to gl_program
This will help allow us to store pointers to gl_program structs in the
CurrentProgram array resulting in a bunch of code simplifications.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-01-06 11:21:41 +11:00
Timothy Arceri b792c38979 st/mesa/glsl/i965: set num_ubos directly in shader_info
This also removes the duplicate field in gl_linked_shader, and
gets num_ubos from shader_info instead.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-01-06 11:21:41 +11:00
Timothy Arceri a1da57c19c st/mesa/glsl/i965: move ImageUnits and ImageAccess fields to gl_program
Having it here rather than in gl_linked_shader allows us to simplify
the code.

Also it is error prone to depend on the gl_linked_shader for programs
in current use because a failed linking attempt will free infomation
about the current program. In i965 we could be trying to recompile
a shader variant but may have lost some required fields.

We drop the memset on ImageUnits because gl_program is already
created using rzalloc().

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-01-06 11:21:40 +11:00
Timothy Arceri 3d2485f011 i965: get InfoLog and LinkStatus via the pointer in gl_program
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-01-06 11:21:40 +11:00
Timothy Arceri be9a6a7eb7 i965: get shared_size from shader_info rather than gl_shader_program
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-01-06 11:21:40 +11:00
Timothy Arceri 234211ec8d i965: stop depending on gl_shader_program for brw_compute_vue_map() params
This removes another dependency on gl_shader_program from the codegen functions,
this will help allow us to use gl_program for the CurrentProgram array rather
than gl_shader_program.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-01-06 11:21:40 +11:00
Timothy Arceri 6f76ca300b i965: pass gl_program to the brw_*_debug_recompile() functions
Rather then passing gl_shader_program.

The only field use was Name which is the same as the Id field in
gl_program.

For wm and vs we also make the functions static and move them before
the codegen functions.

This change reduces the codegen functions dependency on gl_shader_program.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-01-06 11:21:40 +11:00
Roland Scheidegger caf18a8434 gallivm: (trivial) fix typo bug with small AoS format unpacking
Fix typo using wrong (uninitialized) build context introduced by
4634cb5921. (This only affects very rare
small packed formats which have a PIPE_SWIZZLE_0 channel, such as
r4a4, which is never used by mesa/st. Nevertheless it broke lp_test_format.)
2017-01-06 00:46:15 +01:00
Roland Scheidegger 4634cb5921 gallivm: implement aos unpack (to unorm8) for small unorm formats
Using bit replication. This path now resembles something which might make
sense. (The logic was mostly copied from llvmpipe fs backend.)
I am not convinced though it is actually faster than SoA sampling (actually
I'm quite certain it's always a loss with AVX).
With SoA it's just shift/mask/cvt/mul for getting the colors, whereas
there's still roughly 3 shifts, 3 or/and per channel for AoS
(i.e. for SoA it's exactly the same as it would be for a rgba8 format,
whereas the extra effort for AoS is significant). The filtering
might still be faster (albeit with FMA the instruction count gets down
quite a bit there on the SoA float filtering path on new cpus). And those
small unorm formats often don't have an alpha channel (which makes things
worse relatively for AoS path).
(This also fixes a trivial bug in the llvmpipe fs code this was derived
from, albeit it was only relevant for 4-bit channels.)

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-01-05 23:59:38 +01:00
Roland Scheidegger bc86e829a5 gallivm: optimize lp_build_unpack_arith_rgba_aos slightly
This code uses a vector shift which has to be emulated on x86 unless
there's AVX2. Luckily in some cases we can actually avoid the shift
altogether, so do that.
Also make sure we hit the fast lp_build_conv() path when applicable,
albeit that's quite the hack...
That said, this path is taken for AoS sampling for small unorm (smaller
than rgba8) formats, and it is completely hopeless even with those
changes, with or without AVX.
(Probably should have some code similar to the one in the llvmpipe fs
backend code, using bit replication to extend to rgba8888 - rounding
is not quite 100% accurate but if it's good enough there it should be
here as well.)

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-01-05 23:59:38 +01:00
Roland Scheidegger a03a2ac6fd gallivm: use 2 srcs for 32->16bit conversions in lp_bld_conv_auto
If we only feed one source vector at a time, we cannot use pack intrinsics
(as we only have a 64bit destination dst vector). lp_bld_conv_auto is
specifically designed to alter the length and number of destination vectors,
so this works just fine (if we use single source vectors at a time, afterwards
we immediately reassemble the vectors).
For AVX though this isn't really possible, since we expect 128bit output
already for a single 256bit input. (One day we should handle AVX2 which again
would need multiple inputs, however there's the problem that we get different
ordered output there and we don't want to reorder, so would need to be able
to tell build_conv to handle upper and lower halfs independently.)
A similar strategy would probably work for 32->8bit too (if it doesn't hit
the special case) but I'm going to try something different for that...

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-01-05 23:59:38 +01:00
Roland Scheidegger db7e786a25 llvmpipe: (trivial) minimally simplify mask construction
simd instruction sets usually have comparisons for equal, not unequal.
So use a different comparison against the mask itself - which also means
we don't need a all-zero as well as a all-one (for the pxor) reg.

Also add code to avoid scalar expansion of i1 values which we definitely
shouldn't do. There's problems with this though with llvm select
interaction, so it's disabled (basically using llvm select instead of
intrinsics may still produce atrocious code, even in cases where we
figured it should not, albeit I think this could probably be fixed
with some better selection of optimization passes, but I have zero
idea there really).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-01-05 23:59:38 +01:00
Lionel Landwerlin a8eeb089c0 anv: fix multiple creation with internal failure
The specification section 9.4 says :

   When an application attempts to create many pipelines in a single
   command, it is possible that some subset may fail creation. In that
   case, the corresponding entries in the pPipelines output array will
   be filled with VK_NULL_HANDLE values. If any pipeline fails
   creation (for example, due to out of memory errors), the
   vkCreate*Pipelines commands will return an error code. The
   implementation will attempt to create all pipelines, and only
   return VK_NULL_HANDLE values for those that actually failed.

Fixes :

   dEQP-VK.api.object_management.alloc_callback_fail_multiple.graphics_pipeline
   dEQP-VK.api.object_management.alloc_callback_fail_multiple.compute_pipeline

v2: C is hard let's go shopping (Lionel)

v3: Remove unnecessary condition in for loops (Lionel)

v4: Document why we return on first failure (Eduardo)
    Move i declaration inside for() (Eduardo)

v5: Move array cleanup out of loop (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-01-05 21:09:09 +00:00
Tim Rowley 33fa4c99f7 swr: [rasterizer core/common/jitter] gl_double support
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99214
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-01-05 14:10:36 -06:00
Fredrik Höglund b6670157d7 dri3: Fix MakeCurrent without a default framebuffer
In OpenGL 3.0 and later it is legal to make a context current without
a default framebuffer.

This has been broken since DRI3 support was introduced.

Cc: "13.0 12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-01-05 20:52:01 +01:00
Marek Olšák e16245b339 radeonsi: turn SDMA IBs into de-facto preambles of GFX IBs
Draw calls no longer flush SDMA IBs. r600_need_dma_space is
responsible for synchronizing execution between both IBs.

Initial buffer clears and fast clears will stay unflushed in the SDMA IB
(up to 64 MB) as long as the GFX IB isn't flushed either.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:43:24 +01:00
Marek Olšák cba9d59362 radeonsi: implement SDMA-based buffer clearing for SI
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:43:24 +01:00
Marek Olšák 29d6a367a6 radeonsi: do all math in bytes in SI DMA code
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:43:24 +01:00
Marek Olšák 9e1aa81dfe gallium/radeon: prevent SDMA stalls by detecting RAW hazards in need_dma_space
Call r600_dma_emit_wait_idle only when there is a possibility of
a read-after-write hazard. Buffers not yet used by the SDMA IB don't
have to wait.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:43:24 +01:00
Marek Olšák 3be8336440 gallium/radeon: move unrelated code from dma_emit_wait_idle to need_dma_space
r600_dma_emit_wait_idle is going away in its current form.
The only difference is that the moved code is executed before DMA calls
instead of after them.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:43:24 +01:00
Marek Olšák 973d7cd90a radeonsi: inline cik_sdma_do_copy_buffer
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:43:23 +01:00
Marek Olšák 067a3237b9 radeonsi: also wait for SDMA in the clear_buffer CPU fallback
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:43:23 +01:00
Marek Olšák f6a1c2d883 radeonsi: simplify r600_resource typecasts in si_clear_buffer
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:43:23 +01:00
Marek Olšák a31a92e7ef radeonsi: always use SDMA for big buffer clears and first buffer uses
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:43:23 +01:00
Marek Olšák 69f489dfa1 radeonsi: use SDMA in rvid_buffer_clear on CIK-VI
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:43:23 +01:00
Marek Olšák 9a3296bf1c radeonsi: use SDMA for initial clearing of DCC/CMASK/HTILE on CIK-VI
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:43:23 +01:00
Marek Olšák d4c0ad4de8 radeonsi: implement SDMA-based buffer clearing for CIK-VI
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:43:23 +01:00
Marek Olšák 431742dbba gallium/hud: increase the vertex buffer size for text
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:30:00 +01:00
Marek Olšák 6d54cd75a8 gallium/hud: add an option to sort items below graphs
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:30:00 +01:00
Marek Olšák 80b8b9c8a4 gallium/hud: add an option to reset the color counter
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:30:00 +01:00
Marek Olšák a57e071e9e gallium/hud: allow more data sources per pane
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:30:00 +01:00
Marek Olšák e8bb97ce30 gallium/hud: add an option to rename each data source
useful for radeonsi performance counters

v2: allow specifying both : and =

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:30:00 +01:00
Marek Olšák d995115b17 gallium: remove TGSI_OPCODE_SUB
It's redundant with the source modifier.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:30:00 +01:00
Marek Olšák a4ace98a97 gallium: remove TGSI_OPCODE_ABS
It's redundant with the source modifier.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:30:00 +01:00
Axel Davy 09d09b219e st/nine: Remove all usage of ureg_SUB in nine_shader
This is required to drop gallium SUB.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2017-01-05 18:30:00 +01:00
Axel Davy 67cda68bba st/nine: Remove all usage of ureg_SUB in nine_ff
This is required to remove gallium SUB.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2017-01-05 18:30:00 +01:00
Axel Davy caf93f5311 st/nine: Do not map SUB and ABS to their gallium equivalent.
This is required for gallium SUB and ABS to be removed.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2017-01-05 18:30:00 +01:00
Eric Anholt dbe0dd11b9 configure: Fix another bashism.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2017-01-05 09:24:28 -08:00
Marek Olšák 3477f67057 st/mesa: fix a segfault when prog->sh.data is NULL
Broken by:
   st/mesa: get Version from gl_program rather than gl_shader_program

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-01-05 17:11:03 +01:00
Emil Velikov 37f9262064 docs: add news item and link release notes for 13.0.3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-01-05 16:07:53 +00:00
Emil Velikov 934792b846 docs: add sha256 checksums for 13.0.3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit c8ece92ded9337b9ed60aa9568b41313025a1406)
2017-01-05 16:07:53 +00:00
Emil Velikov 5cd9660302 docs: add release notes for 13.0.3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit bec04114d2612042bdf61183cfa3416b3a643b68)
2017-01-05 16:07:53 +00:00
Nayan Deshmukh ee4b4791ab st/va: fix incorrect argument in vl_compositor_cleanup
This fixes the mistake introduced in commit
b6737a8bcd

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-01-05 16:40:06 +01:00
Tim Rowley 68ddcc6c28 swr: remove unneeded llvm version check
Old test caused breakage with llvm-svn (4.0.0svn), and not needed as
the minimum required llvm version for swr is 3.6.

Reviewed-by: George Kyriazis <george.kyriazis@intel.com>
2017-01-05 07:31:19 -06:00
George Kyriazis 36ad826548 swr: fix windows build break
wrap lp_bld_type.h around extern "C".
Windows decorates global variables, so when used from .cpp files, need
to use an undecorated version.

Also, removed related and unneeded code from swr_screen.cpp

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-01-05 07:30:18 -06:00