Commit Graph

3143 Commits

Author SHA1 Message Date
Danylo Piliaiev 10734fb748 turnip: enable has_ccu_flush_bug workaround for a660
It seems that a660 has the same bug. Without the workaround there
are a lot of flakes with depth-stencil tests, e.g. in:
 dEQP-VK.pipeline.extended_dynamic_state.*
 dEQP-VK.renderpass.depth_stencil_write_conditions.*
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.*

Or guaranteed failures like of:
 dEQP-VK.pipeline.render_to_image.core.2d.huge.width.r8g8b8a8_unorm_d32_sfloat_s8_uint

Enabling the workaround fixes all of them.

cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15548>
2022-03-29 08:34:18 +00:00
Connor Abbott 0b0b9274b6 freedreno/ci: Fix skip comment
This test was never supposed to be skipped, and the referenced commit
just exposed a bug in turnip fixed by the previous commit. It was
hanging due to a CTS bug making the submit take way too long, which will
be fixed once the CTS change lands.

Also, add it to the a630 skips.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15563>
2022-03-28 17:16:54 +00:00
Connor Abbott 9d081d7561 tu: Correctly handle VK_IMAGE_CREATE_EXTENDED_USAGE_BIT
In this case we should relax checks based on the format, since the user
will be responsible for them when creating an image view.

This gets dEQP-VK.image.sample_texture.*_bit_compressed_format_* not
skipping again after VK-GL-CTS 736eec57dc0c ("Fix checkSupport in
compressed texture sampling tests").

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15563>
2022-03-28 17:16:54 +00:00
Danylo Piliaiev 37939e9c54 turnip: Fix the lack of WFM before indirect draws
We have to add WFM to pending bits when we are flushing into CP
for indirect draw to know when they should apply WFM workaround.

Fixes CTS tests:
dEQP-VK.draw.renderpass.indirect_draw.*_data_from_compute.indirect_draw_count*

Fixes: abf0ae014a
("tu: Properly handle waiting on an earlier pipeline stage")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15577>
2022-03-28 16:09:07 +00:00
Boris Brezillon 799a9db24c turnip: Stop using VK_OUTARRAY_MAKE()
We're trying to replace VK_OUTARRAY_MAKE() by VK_OUTARRAY_MAKE_TYPED()
so people don't get tempted to use it and make things incompatible with
MSVC (which doesn't support typeof()).

Suggested-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15522>
2022-03-25 11:00:02 +00:00
Rob Clark c0f52f08a1 freedreno/ci: Update a306 expectations
These have started to flakey UnexpectedPass somewhere along the way.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
2022-03-25 02:03:30 +00:00
Rob Clark 802f4da5ee freedreno/drm: Add virtio backend
Add a new backend to enable using native driver in a VM guest, via a new
virtgpu context type which (indirectly) makes host kernel interface
available in guest and handles the details of mapping buffers to guest,
etc.

Note that fence-fd's are currently a bit awkward, in that they get
signaled by the guest kernel driver (drm/virtio) once virglrenderer in
the host has processed the execbuf, not when host kernel has signaled
the submit fence.  For passing buffers to the host (virtio-wl) the egl
context in virglrenderer is used to create a fence on the host side.
But use of out-fence-fd's in guest could have slightly unexpected
results.  For this reason we limit all submitqueues to default priority
(so they cannot be preepmted by host egl context).  AFAICT virgl and
venus have a similar problem, which will eventually be solveable once we
have RESOURCE_CREATE_SYNC.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
2022-03-25 02:03:30 +00:00
Rob Clark 2200d674e4 freedreno/drm: Reorder device destroy
Call backend specific cleanup fxn earlier.  This is needed if the
backend has things like bo's to delete, otherwise the handle_table
will already be destroyed causing problems in bo_del()

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
2022-03-25 02:03:30 +00:00
Rob Clark ea339137b0 freedreno/drm: Extract out "softpin" submit/ringbuffer base class
We are going to want basically the identical thing, other than
flush_submit_list, for virtio backend.  Now that we've moved various
other dependencies into the base classes, extract out an abstract base
class for submit/ringbuffer.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
2022-03-25 02:03:30 +00:00
Rob Clark 72a427244f freedreno/drm: Move ring_pool slab parent to base
Prep to move most of sp submit/ringbuffer to something that can be
re-used by virtio backend.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
2022-03-25 02:03:30 +00:00
Rob Clark 877f9049c3 freedreno/drm: Move bo idx to base
The virtio backend will want this too, and it will make it easier to
share most of the submit/ringbuffer implementation with the virtio
backend.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
2022-03-25 02:03:30 +00:00
Rob Clark 2ac9b23f78 freedreno/drm: Move submit_queue to base
The virtio backend will want this too.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
2022-03-25 02:03:30 +00:00
Rob Clark 88a10c6216 freedreno/drm: Avoid CPU_PREP ioctl if bo is idle
With userspace fences, if we know definitely that the buffer is idle
(which implies that it is not shared with other processes, etc), then
skip the ioctl.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
2022-03-25 02:03:30 +00:00
Rob Clark 9bcc983256 freedreno/drm: Add fd_bo_upload()
There are some buffers that we mmap just to write to them a single time.
Add the possibility of the drm backend to provide an alternate upload
path to avoid these mmap's.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
2022-03-25 02:03:30 +00:00
Rob Clark 115518ec35 freedreno/drm: Add FD_BO_SHARED hint
With the virtio backend we will need to pass an extra flag when
allocating buffers that will be shared cross-device (such as with
virtio-wl for passing between host and guest)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
2022-03-25 02:03:30 +00:00
Rob Clark f846181fe5 freedreno/drm: Add FD_BO_NOMAP hint
Add a hint for buffers that we won't need to mmap.  With the virtio
backend, virglrenderer needs to create a dmabuf fd for mapping into
the host, which we want to avoid when possible.

Low hanging fruit is to use this hint for anything tiled/ubwc.  There
are probably more bo's that can be flagged as such.

TODO add fd_bo_upload() for memcpy to bo.. this would be useful for
uploads, for example, shaders which we just write once and never touch
again.. for virtio this could be implemented with a TRANSFER_TO_HOST
ioctl.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
2022-03-25 02:03:30 +00:00
Rob Clark 598405c91f freedreno/drm: Rework bo creation path
Decoupling handle and fd_bo creation simplifies things for "normal" drm
drivers, avoiding duplication for the create vs import paths.  But this
is awkward for the virtio backend when wants to do multiple things in
the same guest<->host round trip.

So instead, split the paths in the interface backend and move the code
sharing for the two different paths into the msm backend itself.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
2022-03-25 02:03:30 +00:00
Rob Clark 9ea36968d3 freedreno/drm: Add fd_device_open() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
2022-03-25 02:03:30 +00:00
Rob Clark 2bc815878c freedreno/drm: Split msm backend into subdir
Let's keep things a bit better organized when we add a new backend.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
2022-03-25 02:03:30 +00:00
Tomeu Vizoso 9f43dac0ca ci/freedreno: Increase console timeout for perf jobs
Piglit is very sparse in its status output and downloads of big traces
can take a while.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15527>
2022-03-24 05:33:54 +00:00
Tomeu Vizoso d0e99e566f ci/freedreno: Update checksum for GolfWithYourFriends trace
The MR below changed the rendering slightly and the checksum isn't valid
any more:

"ir3, turnip, freedreno: Shader preambles"

https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15526>
2022-03-24 00:04:20 +00:00
Danylo Piliaiev 5d151ddfba turnip: Disallow non-linear tiling when casting R8G8 to other fmts
R8G8 have a different block width/height and height alignment from other
formats that would normally be compatible (like R16), and so if we are
trying to, for example, sample R16 as R8G8 we need to demote to linear.

Follows the fix in Freedreno: b97e3bb2e1

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15465>
2022-03-22 13:47:21 +00:00
Danylo Piliaiev a70b197741 turnip: Force linear mode for non-ubwc R8G8 formats
Non-UBWC tiled R8G8 is probably buggy since media formats are always
either linear or UBWC. There is no simple test to reproduce the bug.
However it was observed in the wild leading to an unrecoverable hang
on a650/a660.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5926

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15465>
2022-03-22 13:47:21 +00:00
Andrey Konovalov ed2f496ce4 ir3: set local_size for shaders of MESA_SHADER_KERNEL type
ir3_compile_shader_nir() should set local_size[] and local_size_variable
fields not only for compute shaders, but for the OpenCL kernels too.

v2: use gl_shader_stage_is_compute() instead of explicit comparison with
    MESA_SHADER_[COMPUTE,KERNEL].

Signed-off-by: Andrey Konovalov <andrey.konovalov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14863>
2022-03-18 23:20:25 +00:00
Emma Anholt f831ba238f ci/turnip: Increase the hangcheck timer to 2 seconds.
We get a lot of useful coverage from running graphicsfuzz with spilling
enabled, but it's also pretty slow and can cause intermittent hangcheck
failures.  I thought I'd categorized them when merging !14839 (device loss
on reset), but it looks like not all of them and we're now more likely to
have flakes take out the whole test run when a single flake makes the rest
of the caselist a flake.

This is a little unfortunate in that it means our test environment is not
the same as a stock system you would want to run deqp on to submit
conformance, but I think it's an improvement in the test maintenance work
vs needing to fix things up later.

We have some other tests besides turnip that can trigger hangchecks which
we might also like this increase for (some disabled traces, for example).
However, freedreno GL has a 5-second timeout waiting for idle when
mapping, and a couple of 2-second timeouts in a row can result in spurious
failures in other tests!

Fixes: #6163
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15435>
2022-03-18 19:07:24 +00:00
Connor Abbott fc381fa1e3 tu: Actually expose VK_EXT_texel_buffer_alignment
Oops...

Fixes: 3d04c435 ("tu: Trivially implement VK_EXT_texel_buffer_alignment")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15451>
2022-03-18 18:30:20 +00:00
Jason Ekstrand 2a779f98dc turnip: Drop tu_legacy.c
The remaining three helpers all have helpers in the common code.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15459>
2022-03-18 11:19:08 -05:00
Connor Abbott 3d04c43576 tu: Trivially implement VK_EXT_texel_buffer_alignment
The previous alignment of 64 bytes, which we got from the blob,
indicates that single-texel alignment isn't supported. So just do a
trivial no-op implementation that returns the same alignment as before.
This matches what newer blobs that expose this extension do.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15427>
2022-03-17 20:45:19 +00:00
Tomeu Vizoso 96e17287b4 ci/freedreno: Disable a618 jobs
Some of these machines are experiencing networking problems currently.
Disable for now so people aren't blocked.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15430>
2022-03-17 17:43:06 +00:00
Connor Abbott 072fdcabcd tu: Enable UniformBufferUpdateAfterBind
UBOs are now read at run-time via the preamble so this can be enabled.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148>
2022-03-17 12:15:45 +00:00
Connor Abbott 9932ca8a3f ir3, turnip: Use ldc.k to push UBOs
This reuses the same UBO analysis to do the pushing in the shader
preamble via the ldc.k instruction instead of in the driver via
CP_LOAD_STATE6. The const_data UBO is exempted as it uses a different
codepath that isn't as critical.

Don't do this on gallium because there are some regressions. Aztec Ruins
in particular regresses a bit, and nothing I've benchmarked benefits.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148>
2022-03-17 12:15:45 +00:00
Connor Abbott 221a912b8c ir3: Refactor ir3_compiler_create() to take an options struct
This will let us add more options without creating too much churn.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148>
2022-03-17 12:15:45 +00:00
Connor Abbott acba08b58f ir3: Implement and document ldc.k
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148>
2022-03-17 12:15:45 +00:00
Connor Abbott fccc35c2de ir3: Add preamble optimization pass
Now that everything is plumbed through, we can tie it together.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148>
2022-03-17 12:15:45 +00:00
Connor Abbott 986f7adfee ir3: Don't include preamble instructions in stats
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148>
2022-03-17 12:15:45 +00:00
Connor Abbott 42e21c751b ir3: Insert frag coord code after preamble
To match the pre-preamble behavior, and so that we can better schedule
it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148>
2022-03-17 12:15:45 +00:00
Connor Abbott b6fe69d855 ir3: Support prefetching with preambles
Since the NIR pass runs very late, it needs to be aware of preambles,
and when creating the instruction we need to move it to the start block
so that RA doesn't overwrite it in the preamble.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148>
2022-03-17 12:15:45 +00:00
Connor Abbott 00d7ad334a ir3/legalize: Handle inserting (ei) with preamble
Make sure that shaders with a preamble are still considered
early-release so that we don't regress them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148>
2022-03-17 12:15:45 +00:00
Connor Abbott ccc64b7e00 ir3: Plumb through store_uniform_ir3 intrinsic
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148>
2022-03-17 12:15:45 +00:00
Connor Abbott 944f4e6f8a ir3: Better assemble/disassemble stc
Add in the type, even though it turns out to not be that useful. Add
in support for assembling it. Add some notes based on computerator
experiments. And add support for the indirect a1.x mode that's needed
for storing c64.x and later.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148>
2022-03-17 12:15:45 +00:00
Connor Abbott 3244e659e0 ir3: Implement basic shader preamble intrinsics
These will be used to implement the ir3-specific shader preamble
lowering in NIR. shps is conceptually similar to getone (although it
technically can't be duplicated) and shpe is similar to other barriers,
since it has to happen after any stores to the constant file in the
preamble. Add NIR intrinsics and plumbs them through ir3.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148>
2022-03-17 12:15:45 +00:00
Connor Abbott 7ad57d9af1 ir3: Don't count reserved user consts in ubo_state::size
Previously we included the reserved user consts (for Vulkan push
constants) as part of the pushed UBO contents, but that led to a problem
because when calculating the worst-case space for UBOs we didn't factor
in the reserved user consts. We'll have the same problem when doing the
same thing in the preamble optimization pass. Stop including the
reserved size in ubo_state::size, and have ir3_setup_consts() add it in
instead, so we won't forget to add it anywhere.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148>
2022-03-17 12:15:45 +00:00
Connor Abbott e274354204 ir3: Fix scan.macro valid flags
Right now we don't support any. We could probably support const, but
that's not worth it because we could optimize a reduce of a const better
anyway.

Fixes: 1a78604d20 ("ir3: Add support for subgroup arithmetic")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148>
2022-03-17 12:15:45 +00:00
Emma Anholt 9e9a366cad ci/turnip: Drop alpha_to-coverage flake note on a618.
It's only ever been seen on a630.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14839>
2022-03-16 19:28:04 +00:00
Emma Anholt 2f25d16653 turnip: Use the DRM or KGSL GPU reset status ioctls to report device loss.
ANGLE-on-venus-on-turnip and zink-on-turnip want real data here for EGL's
reset tests.

This required moving the remaining GPU-reset-causing tests from flakes or
xfails to skips.  Otherwise, the rest of the caselist associated with them
ends up being marked as fails as well.  The alternative would be to put
these tests in their own test groups with tests_per_group = 1, but that
didn't seem worth the effort.  Or, we could finally do something with
https://gitlab.freedesktop.org/anholt/deqp-runner/-/issues/14.

Fixes: #5955
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14839>
2022-03-16 19:28:04 +00:00
Emma Anholt add2121969 ci/freedreno: Remove some xfails for tests that now skip.
The last CTS uprev correctly turned them into NotSupported.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14839>
2022-03-16 19:28:04 +00:00
Emma Anholt ffa9438183 ci/freedreno: Drop the skips of spirv_ids_abuse in pre-merge.
The crash was fixed in 62a7acee93, and
runtime of the tests locally is 5-17s each with a hot shader cache, 11-25s
without.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14839>
2022-03-16 19:28:04 +00:00
Emma Anholt 5dd74533b2 ci: Drop skips of spv-stable-pillars-volatile-nontemporal-store
The runtime was fixed in VK-GL-CTS
7cc65f6c02276767407233e74c7174d88dab7919.  Now it's .6s on lvp, 20ms on
turnip a618.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14839>
2022-03-16 19:28:04 +00:00
Emma Anholt 3b90d3997a turnip: use vk_shader_module_to_nir().
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15305>
2022-03-15 23:13:16 +00:00
Connor Abbott a83ea0253f ir3: Use isam for bindless readonly ssbo loads
Since this isn't hooked up in gallium, only do it for bindless for now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15288>
2022-03-15 21:36:38 +00:00