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ir3: Refactor ir3_compiler_create() to take an options struct 

This will let us add more options without creating too much churn.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148>
This commit is contained in:
Connor Abbott 2022-01-26 16:56:45 +01:00 committed by Marge Bot
parent acba08b58f
commit 221a912b8c
9 changed files with 30 additions and 18 deletions
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3
src/freedreno/computerator/a4xx.c
View File

@ -341,7 +341,8 @@ a4xx_init(struct fd_device *dev, const struct fd_dev_id *dev_id)
.emit_grid = a4xx_emit_grid,
};
a4xx_backend->compiler = ir3_compiler_create(dev, dev_id, false);
a4xx_backend->compiler = ir3_compiler_create(dev, dev_id,
&(struct ir3_compiler_options) {});
a4xx_backend->dev = dev;
return &a4xx_backend->base;

3
src/freedreno/computerator/a6xx.c
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@ -537,7 +537,8 @@ a6xx_init(struct fd_device *dev, const struct fd_dev_id *dev_id)
.read_perfcntrs = a6xx_read_perfcntrs,
};
a6xx_backend->compiler = ir3_compiler_create(dev, dev_id, false);
a6xx_backend->compiler = ir3_compiler_create(dev, dev_id,
&(struct ir3_compiler_options){});
a6xx_backend->dev = dev;
a6xx_backend->info = fd_dev_info(dev_id);

12
src/freedreno/ir3/ir3_compiler.c
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@ -70,7 +70,7 @@ ir3_compiler_destroy(struct ir3_compiler *compiler)
ralloc_free(compiler);
}
static const nir_shader_compiler_options options = {
static const nir_shader_compiler_options nir_options = {
.lower_fpow = true,
.lower_scmp = true,
.lower_flrp16 = true,
@ -126,7 +126,7 @@ static const nir_shader_compiler_options options = {
};
/* we don't want to lower vertex_id to _zero_based on newer gpus: */
static const nir_shader_compiler_options options_a6xx = {
static const nir_shader_compiler_options nir_options_a6xx = {
.lower_fpow = true,
.lower_scmp = true,
.lower_flrp16 = true,
@ -189,7 +189,7 @@ static const nir_shader_compiler_options options_a6xx = {
struct ir3_compiler *
ir3_compiler_create(struct fd_device *dev, const struct fd_dev_id *dev_id,
bool robust_ubo_access)
const struct ir3_compiler_options *options)
{
struct ir3_compiler *compiler = rzalloc(NULL, struct ir3_compiler);
@ -204,7 +204,7 @@ ir3_compiler_create(struct fd_device *dev, const struct fd_dev_id *dev_id,
compiler->dev = dev;
compiler->dev_id = dev_id;
compiler->gen = fd_dev_gen(dev_id);
compiler->robust_ubo_access = robust_ubo_access;
compiler->robust_ubo_access = options->robust_ubo_access;
/* All known GPU's have 32k local memory (aka shared) */
compiler->local_mem_size = 32 * 1024;
@ -315,11 +315,11 @@ ir3_compiler_create(struct fd_device *dev, const struct fd_dev_id *dev_id,
compiler->has_shared_regfile = compiler->gen >= 5;
if (compiler->gen >= 6) {
compiler->nir_options = options_a6xx;
compiler->nir_options = nir_options_a6xx;
compiler->nir_options.has_udot_4x8 = dev_info->a6xx.has_dp2acc;
compiler->nir_options.has_sudot_4x8 = dev_info->a6xx.has_dp2acc;
} else {
compiler->nir_options = options;
compiler->nir_options = nir_options;
}
ir3_disk_cache_init(compiler);

12
src/freedreno/ir3/ir3_compiler.h
View File

@ -48,9 +48,6 @@ struct ir3_compiler {
struct nir_shader_compiler_options nir_options;
/* If true, UBO accesses are assumed to be bounds-checked as defined by
* VK_EXT_robustness2 and optimizations may have to be more conservative.
*/
bool robust_ubo_access;
/*
@ -187,10 +184,17 @@ struct ir3_compiler {
bool has_preamble;
};
struct ir3_compiler_options {
/* If true, UBO accesses are assumed to be bounds-checked as defined by
* VK_EXT_robustness2 and optimizations may have to be more conservative.
*/
bool robust_ubo_access;
};
void ir3_compiler_destroy(struct ir3_compiler *compiler);
struct ir3_compiler *ir3_compiler_create(struct fd_device *dev,
const struct fd_dev_id *dev_id,
bool robust_ubo_access);
const struct ir3_compiler_options *options);
void ir3_disk_cache_init(struct ir3_compiler *compiler);
void ir3_disk_cache_init_shader_key(struct ir3_compiler *compiler,

2
src/freedreno/ir3/tests/delay.c
View File

@ -155,7 +155,7 @@ main(int argc, char **argv)
.gpu_id = 630,
};
c = ir3_compiler_create(NULL, &dev_id, false);
c = ir3_compiler_create(NULL, &dev_id, &(struct ir3_compiler_options){});
for (int i = 0; i < ARRAY_SIZE(tests); i++) {
const struct test *test = &tests[i];

3
src/freedreno/ir3/tests/disasm.c
View File

@ -481,7 +481,8 @@ main(int argc, char **argv)
unsigned gen = test->gpu_id / 100;
if (!compilers[gen]) {
dev_ids[gen].gpu_id = test->gpu_id;
compilers[gen] = ir3_compiler_create(NULL, &dev_ids[gen], false);
compilers[gen] = ir3_compiler_create(NULL, &dev_ids[gen],
&(struct ir3_compiler_options){});
}
FILE *fasm =

7
src/freedreno/vulkan/tu_device.c
View File

@ -1736,8 +1736,11 @@ tu_CreateDevice(VkPhysicalDevice physicalDevice,
}
}
device->compiler = ir3_compiler_create(NULL, &physical_device->dev_id,
robust_buffer_access2);
device->compiler =
ir3_compiler_create(NULL, &physical_device->dev_id,
&(struct ir3_compiler_options) {
.robust_ubo_access = robust_buffer_access2,
});
if (!device->compiler) {
result = vk_startup_errorf(physical_device->instance,
VK_ERROR_INITIALIZATION_FAILED,

3
src/gallium/drivers/freedreno/ir3/ir3_cmdline.c
View File

@ -371,7 +371,8 @@ main(int argc, char **argv)
struct fd_dev_id dev_id = {
.gpu_id = gpu_id,
};
compiler = ir3_compiler_create(NULL, &dev_id, false);
compiler = ir3_compiler_create(NULL, &dev_id,
&(struct ir3_compiler_options) {});
if (from_tgsi) {
struct tgsi_token toks[65536];

3
src/gallium/drivers/freedreno/ir3/ir3_gallium.c
View File

@ -548,7 +548,8 @@ ir3_screen_init(struct pipe_screen *pscreen)
{
struct fd_screen *screen = fd_screen(pscreen);
screen->compiler = ir3_compiler_create(screen->dev, screen->dev_id, false);
screen->compiler = ir3_compiler_create(screen->dev, screen->dev_id,
&(struct ir3_compiler_options) {});
/* TODO do we want to limit things to # of fast cores, or just limit
* based on total # of both big and little cores. The little cores