Commit Graph

96382 Commits

Author SHA1 Message Date
Marek Olšák efd72b31cb gallium/radeon: remove r600_atom::num_dw
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-07 18:26:35 +02:00
Marek Olšák f1eb9a9c27 gallium/radeon: remove old r600g code checking chip_class and family
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-07 18:26:35 +02:00
Mark Thompson c4ed39f85b st/va: Implement vaExportSurfaceHandle()
This is a new interface in libva2 to support wider use-cases of passing
surfaces to external APIs.  In particular, this allows export of NV12 and
P010 surfaces.

v2: Convert surfaces to progressive before exporting them (Christian).

v3: Set destination rectangle to match source when converting (Leo).
    Add guards to allow building with libva1.

Signed-off-by: Mark Thompson <sw@jkqxz.net>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-and-Tested-by: Leo Liu <leo.liu@amd.com>
2017-10-07 10:15:14 -04:00
Roland Scheidegger 52b73caaf4 gallivm: don't use pabs intrinsic with llvm version >= 6
The intrinsic is gone, causing shader compilation to crash.
While here, also change the fallback code to match what llvm's auto-updater
of these intrinsics would do (except that there will still be zext/trunc
instructions in there), which should ensure that the sequence gets recognized
and fused back into a pabs in the end (I didn't test this, and it's possible
even the old sequence would get recognized, but I don't see a reason why we
shouldn't use the same sequence in any case).

Tested-by: Vinson Lee <vlee@freedesktop.org>
2017-10-07 00:54:09 +02:00
Tim Rowley 9716c69e22 swr/rast: use proper alignment for debug transposedPrims
Causing a crash in ParaView waveletcontour.py test when
_DEBUG defined due to vector aligned copy with unaligned
address.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-10-06 13:27:39 -05:00
Lionel Landwerlin 0763f814d7 anv/cmd_buffer: Reset state in cmd_buffer_destroy
This ensures that everything gets cleaned up properly. In particular,
it fixes a memory leak where we were leaking the push constants
structs.

Valgrind stats on
dEQP-VK.pipeline.push_constant.graphics_pipeline.range_size_128 :

Before:
HEAP SUMMARY:
    in use at exit: 2,467,513 bytes in 1,305 blocks
  total heap usage: 697,853 allocs, 696,530 frees, 138,466,600 bytes allocated

LEAK SUMMARY:
   definitely lost: 1,068 bytes in 11 blocks
   indirectly lost: 24,669 bytes in 412 blocks
     possibly lost: 0 bytes in 0 blocks
   still reachable: 2,441,776 bytes in 882 blocks
        suppressed: 0 bytes in 0 blocks

After:
HEAP SUMMARY:
    in use at exit: 2,467,381 bytes in 1,304 blocks
  total heap usage: 697,853 allocs, 696,531 frees, 138,466,600 bytes allocated

LEAK SUMMARY:
   definitely lost: 936 bytes in 10 blocks
   indirectly lost: 24,669 bytes in 412 blocks
     possibly lost: 0 bytes in 0 blocks
   still reachable: 2,441,776 bytes in 882 blocks
        suppressed: 0 bytes in 0 blocks

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "17.2 17.1" <mesa-stable@lists.freedesktop.org>
2017-10-06 17:32:34 +01:00
Lionel Landwerlin d296dea54e anv/cmd_buffer: fix push descriptors with set > 0
When writing to set > 0, we were just wrongly writing to set 0. This
commit fixes this by lazily allocating each set as we write to them.

We didn't go for having them directly into the command buffer as this
would require an additional ~45Kb per command buffer.

v2: Allocate push descriptors from system memory rather than in BO
    streams. (Lionel)

Cc: "17.2 17.1" <mesa-stable@lists.freedesktop.org>
Fixes: 9f60ed98e5 ("anv: add VK_KHR_push_descriptor support")
Reported-by: Daniel Ribeiro Maciel <daniel.maciel@gmail.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-06 17:32:13 +01:00
Lionel Landwerlin b24b93d584 anv: enable VK_KHR_sampler_ycbcr_conversion
v2: Make GetImageMemoryRequirements2KHR() iterate over all pInfo
    structs (Lionel)
    Handle VkSamplerYcbcrConversionImageFormatPropertiesKHR (Andrew/Jason)
    Iterator over BindImageMemory2KHR's pNext structs correctly (Jason)

v3: Revert GetImageMemoryRequirements2KHR() change from v2 (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-06 16:34:04 +01:00
Lionel Landwerlin a62a979335 anv: enable multiple planes per image/imageView
This change introduce the concept of planes for image & views. It
matches the planes available in new formats.

We also refactor depth & stencil support through the usage of planes
for the sake of uniformity. In the backend (genX_cmd_buffer.c) we have
to take some care though with regard to auxilliary surfaces.
Multiplanar color buffers can have multiple auxilliary surfaces but
depth & stencil share the same HiZ one (only store in the depth
plane).

v2: by Jason
    Remove unused aspect parameters from anv_blorp.c
    Assert when attempting to resolve YUV images
    Drop redundant logic for plane offset in make_surface()
    Rework anv_foreach_plane_aspect_bit()

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-06 16:32:20 +01:00
Jason Ekstrand 185e719090 anv: Take an image in can_sample_with_hiz
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-10-06 16:32:19 +01:00
Jason Ekstrand 558d8a3979 anv: Take a single aspect in anv_layout_to_aux_usage
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-10-06 16:32:19 +01:00
Jason Ekstrand 3735af0415 anv/cmd_buffer: Make get_fast_clear_state return an address
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-10-06 16:32:19 +01:00
Jason Ekstrand fd146e4f3f anv/blorp: Add a concept of default aux usage
A good chunk of anv_blorp just wants the aux usage from the image.  This
magic aux_usage value means just that.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-10-06 16:32:19 +01:00
Lionel Landwerlin f3e91e78a3 anv: add nir lowering pass for ycbcr textures
This pass implements all the implicit conversions required by the
VK_KHR_sampler_ycbcr_conversion specification.

It also inserts plane sources onto sampling instructions that we then
let the pipeline layout pass deal with, when mapping things correctly
to descriptors.

v2: Add new file to meson build (Lionel)
    Use nir_frcp() rather than (1.0f / x) (Jason)
    Reuse nir_tex_instr_dest_size() rather than handwritten one (Jason)
    Return progress (Jason)
    Account for array of samplers (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-06 16:32:19 +01:00
Lionel Landwerlin 3492d56067 anv: prepare sampler emission code for multiplanar images
New settings from the KHR_sampler_ycbcr_conversion specifications
might require different sampler settings for luma and chroma planes.
This change makes the sampler table emission ready to handle multiple
planes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-06 16:32:19 +01:00
Lionel Landwerlin a2a7846d37 anv/apply_pipeline_layout: Prepare for multi-planar images
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-06 16:32:19 +01:00
Lionel Landwerlin 72aec2060f anv: add new formats KHR_sampler_ycbcr_conversion
Adding new downsampling factors for each planes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-06 11:46:08 +01:00
Lionel Landwerlin bbc3700798 anv: modify the internal concept of format to express multiple planes
A given Vulkan format can now be decomposed into a set of planes. We
now use 'struct anv_format_plane' to represent the format of those
planes.

v2: by Jason
    Rename anv_get_plane_format() to anv_get_format_plane()
    Don't rename anv_get_isl_format()
    Replace ds_fmt() by fmt2()
    Introduce fmt_unsupported()

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-06 11:46:03 +01:00
Lionel Landwerlin 18914715d1 anv: prepare formats to handle disjoints sets
Newer format enums start at offset 1000000000, making it impossible to
have them all in one table. This change splits the formats into sets
that we then access through indirection.

v2: rename format_extract to vk_to_anv_format (Chad/Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-06 11:45:56 +01:00
Lionel Landwerlin 42a8fd1670 isl: fill out layout descriptions for yuv formats
Some description was missing.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-06 11:45:52 +01:00
Lionel Landwerlin f86c1b1595 isl: check whether a format is rgb if colorspace is yuv
Suggested by Chad.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-06 11:45:49 +01:00
Lionel Landwerlin 5e9f52ff4d isl: make format layout channels accessible by index
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-06 11:45:44 +01:00
Lionel Landwerlin c90e50f3a0 vulkan: util: add macros to extract extension/offset number from enums
v2: Simplify offset enum computation (Jason)

v3: capitalize macros (Chad)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-06 11:45:41 +01:00
Samuel Pitoiset c8ea55ddda radv: convert all COMPUTE operations to the RADV_META_SAVE_XXX flags
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-06 09:49:06 +02:00
Samuel Pitoiset 213f86e514 radv: add RADV_META_SAVE_COMPUTE_PIPELINE flag
This will allow use to merge the compute save/restore helpers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-06 09:49:06 +02:00
Samuel Pitoiset ba3dc3519d radv: add radv_meta_save() helper
And merge radv_meta_save_novertex() with
radv_meta_save_graphics_reset_vport_scissor_novertex().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-06 09:49:06 +02:00
Samuel Pitoiset 8d91f4e45f radv: merge radv_meta_{save,restore}_pass() with RADV_META_SAVE_PASS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-06 09:49:06 +02:00
Samuel Pitoiset 55ee532932 radv: convert all GFX operations to the RADV_META_SAVE_XXX flags
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-06 09:49:05 +02:00
Samuel Pitoiset 807f2d4f33 radv: introduce the concept of meta save flags
This will allow us to save/restore the different states on-demand
based on the meta operation. For now, this saves/restores all
states. Compute will follow once the graphics part is done.

The main idea is to merge all save/restore helpers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-06 09:49:05 +02:00
Samuel Pitoiset a3a497c921 radv: remove unused RADV_META_VERTEX_BINDING_COUNT
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-06 09:49:05 +02:00
Samuel Pitoiset b269ed3d94 radv: select the pipeline outside of the loop when decompressing htile
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-06 09:49:05 +02:00
Samuel Pitoiset 507df35939 radv: add radv_htile_enabled() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-06 09:49:05 +02:00
Tapani Pälli 0351638284 i965: pass wanted format to intel_miptree_create_for_dri_image
Change b3a44ae7a4 caused regressions on Android where DRI and renderbuffer
can disagree on the format being used. This patch removes the colorspace
parameter and instead we pass renderbuffer format. For non-winsys images we
still do srgb/linear modification in same manner as change b3a44ae7a4 wanted
but take format from renderbuffer instead of DRI image.

This patch fixes regressions seen with following test sets:

   dEQP-EGL.functional.color_clears*
   dEQP-EGL.functional.render*

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102999
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-06 08:06:13 +03:00
Marek Olšák c4d1a199f8 radeonsi: add a drirc workaround for HTILE corruption in ARK: Survival Evolved
v2: use DB_META | PS_PARTIAL_FLUSH

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102955
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
2017-10-06 02:56:11 +02:00
Marek Olšák 15d918e46f radeonsi: inline struct si_sampler_views
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák 23cdde5138 radeonsi: rename si_textures_info -> si_samplers, si_images_info -> si_images
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák 3dfb375446 radeonsi: fold needs_*_decompress_mask update into si_set_sampler_view
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák bd5509d0a8 radeonsi: simplify a loop in si_update_fb_dirtiness_after_rendering
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák bcd3e761a3 ac: properly document a buffer.store LLVM workaround
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák cceb916456 radeonsi: use f32_0 and f32_1
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák 1516059ab1 radeonsi: fold *gallivm
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák e1b83c67da radeonsi: lp_type::length is always 1
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák 906ee3a3ba radeonsi: don't use bld.elem_type
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák 723a23905f radeonsi: don't use lp_build_const_*
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák b4600b4740 radeonsi: use ctx->ac.context and ctx->types
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák d0751f6c1f radeonsi: use ctx->ac.builder
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák 82dc72c8bd radeonsi: use ctx->i/f32 types more
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák dcbd3d470c radeonsi: use i32_0 and i32_1 more
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák bacdf5a928 radeonsi: use bitcast in a few places
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák ad7305aa96 radeonsi: use ac helpers for bitcasts
Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
2017-10-06 02:56:11 +02:00