Commit Graph

124654 Commits

Author SHA1 Message Date
Samuel Pitoiset e1523b34c2 aco: fix sign-extend 8-bit subgroup operations on GFX6-GFX7
SDWA is GFX8+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5327>
2020-06-05 16:04:05 +02:00
Samuel Pitoiset ee4bc13de2 aco: use v_bfe_u32 for unsigned reductions sign-extension on GFX6-GFX7
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5327>
2020-06-05 16:04:03 +02:00
Eric Engestrom a874132cc4 intel/genxml: drop sort_xml.sh and move the loop directly in gen_sort_tags.py
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5353>
2020-06-05 13:44:18 +00:00
Bas Nieuwenhuizen c67ef7695a radv: Use ac_surface to allocate aux surfaces.
For consistency and a bunch of codesharing.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen 63db31fdfc amd/common: Add total alignment calculation.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen f70b577683 radv: Allocate values/predicates at the end of the image.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen ec671e8718 radv: Disable HTILE in ac_surface.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen f84b4e2639 radv: Disable DCC in ac_surface.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen 81dee6cf8f radv: Use offsets in surface struct.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen ffae3589c9 radv: Rely on ac_surface for avoiding cmask for linear images.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen b5488a863c radv: Enforce the contiguous memory for DCC layers in ac_surface.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen d3db633f6d radv: Pass no_metadata_planes info in to ac_surface.
Also do not allocate aux surfaces for multi-plane images. I may
have messed up and used plane 1 offsets for the other planes as well.
I cannot imagine that sharing aux surfaces between the planes will
work well.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen 599ea341dd radv: Use ac_surface to determine fmask enable.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Christian Gmeiner 4b7de75b4b ci: add U-Boot specific fetch strings
U-Boot's fastboot over udp generates the following output:
  Listening for fastboot command on x.y.z.w

Also add a general 'data abort' error string seen with an
too old U-Boot version:
  https://github.com/u-boot/u-boot/commit/95712af

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5258>
2020-06-05 11:02:35 +00:00
Christian Gmeiner 06d8171994 ci: extend expect-output.sh
We need to support different fastboot fetch strings for different
bootloader solutions. Lets extend expect-output.sh to support
multiple fetch strings (-f) and add support for error catch
strings (-e) to stop the CI run early.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5258>
2020-06-05 11:02:35 +00:00
Rob Clark ef5b8bbc5e freedreno/computerator: fix missing dependency on generated header
Fixes:
```
 ../mesa-freedreno-20.2.0_pre/src/freedreno/computerator/ir3_asm.c:25:10: fatal error: 'ir3/ir3_parser.h' file not found
 #include "ir3/ir3_parser.h"
          ^~~~~~~~~~~~~~~~~~
 1 error generated.
```

Fixes: da467817e3 ("freedreno/ir3: Move ir3 assembler to backend compiler")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5340>
2020-06-05 09:48:47 +00:00
Eric Engestrom 7a68045b5d glapi: remove deprecated .getchildren() that has been replace with an iterator
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3086
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5342>
2020-06-05 09:16:13 +00:00
Samuel Pitoiset c9a9b363ce radv/aco: enable 64-bit atomic features if RADV is linked with LLVM 8
Just in case someone links RADV with this old LLVM 8 and wants ACO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5331>
2020-06-05 07:40:29 +00:00
Neha Bhende ba37d408da svga: Performance fixes
This is a squash commit of in house performance fixes and misc bug fixes
for GL4.1 support.

Performance fixes:
* started using system memory for constant buffer to gain 3X performance boost with metro redux

Misc bug fixes:
* fixed usage of vertexid in shader
* added empty control point phase in hull shader for zero ouput control point
* misc shader signature fixes
* fixed clip_distance input declaration
* clearing the dirty bit for the surface while using direct map if surface is already flushed
  and there is no pending primitive

This patch also uses SVGA_RETRY macro for commands retries. Part of it is already
used in previous patch.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Signed-off-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5317>
2020-06-05 06:36:54 +00:00
Neha Bhende ccb4ea5a43 svga: Add GL4.1(compatibility profile) support in svga driver
This patch is a squash commit of a very long in-house patch series.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Signed-off-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5317>
2020-06-05 06:36:54 +00:00
Neha Bhende 52ce25be87 svga/include: Headers for GL4.1 support
This brings in the new types, enums and #defines for GL 4.1
features in the virtual device.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Signed-off-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5317>
2020-06-05 06:36:54 +00:00
Neha Bhende dc3505f87e winsys/drm: Add GL4.1 support in drm winsys
This is to check whether virtual hardware has SM5 support

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Signed-off-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5317>
2020-06-05 06:36:54 +00:00
Neha Bhende 48a7456f4d util: Add util functionality for GL4.1 support
This patch adds the following tgsi utilities

* tgsi_dynamic_indexing: This utility flattens out the dyanamic indexing of constant buffers
* tgsi_vpos: This utility writes zeros to position at index 0 in vertex shader.
  This utility can be used if there is no shader output in vertex shader
* util_make_tess_ctrl_passthrough_shader: This adds passthough tessellation control shader.
  Input of passthrough tess ctrl shader is output of vertex shader
  and output is input of tessellation eval shader.
  If program has tessellation eval shader but no tessellation control shader,
  this utility can be used to create passthrough tessellation control shader.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Signed-off-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5317>
2020-06-05 06:36:54 +00:00
Rob Clark f1f81abfd4 freedreno/a6xx: more early-z
Technically we only have to do late-z in the alpha-test or discard case
if depth-write is enabled.  If depth write is disabled, the depth read /
test / conditional-write interlock that we need to emulate is not a
problem, so we can still use early-z test.

There is a slightly weird case when there is no zsbuf attachment (see
dEQP-GLES31.functional.fbo.no_attachments.*) where the hw wants us to
use LATE_Z.. not entirely sure if this is an interaction with occlusion
query or just a pecularity of how the hw works when there is no depth
buffer.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5336>
2020-06-05 00:57:44 +00:00
Dave Airlie 4d7ee2749f ci: bump virglrenderer to latest version
Need this for upcoming GL 4.0 llvmpipe support.

Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5323>
2020-06-04 20:05:26 +00:00
Eric Anholt ec98cff6a9 turnip: Simplify vertex buffer bindings.
We were remapping the bindings so the HW binding points were consecutive,
which there's no need for.  Now that we don't shuffle, we can mostly drop
the dependency on the pipeline for this SDS.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5321>
2020-06-04 19:42:54 +00:00
Eric Anholt 5c9728d960 turnip: Don't bother clamping VB size.
From the VK spec: "All elements of pOffsets must be less than the size of
the corresponding element in pBuffers"

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5321>
2020-06-04 19:42:54 +00:00
Eric Anholt 52942f18c6 turnip: Move vertex buffer bindings to SET_DRAW_STATE.
This means that the HW can skip over the vertex buffer state when it's not
used in a bin.  The blob also has this behavior.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5321>
2020-06-04 19:42:54 +00:00
Dave Airlie c8c7450fc7 llvmpipe: move coroutines out of noopt case
the virgl CI code was using the noopt path and crashing with a
wierd can't select llvm.coro.subfn.addr error, turns out we have
to call the cleanup pass no matter what.

This enable a lot more virgl gles31 passes, but we have
to disable tessellation shaders as now they executed, they
crash due to missing OES_gpu_shader5, I should try and reenable
them when llvmpipe is further along

Fixes: d32690b43c ("gallivm: add coroutine pass manager support")

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-by: Elie Tournier <elie.tournier@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5320>
2020-06-04 19:08:34 +00:00
Alyssa Rosenzweig 2d1688345a pan/mdg: Ensure ld_vary_16 is aligned
Otherwise packing may fail.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 5f8dd413bc ("pan/mdg: Handle 16-bit ld_vary")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5339>
2020-06-04 17:46:45 +00:00
Kristian H. Kristensen de8be1de13 freedreno/a6xx: Fix VFD_CONTROL emit
The FETCH_CNT field isn't actually the FETCH count. We don't have a
lot of data where it's different from DECODE_CNT, so there's not much
to go by. It could be number of VFD_DEST_CNTL or maybe DECODE_CNT for
binning.  For now, setting both to number of DEST_CNTL gets Google
Earth working again.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5324>
2020-06-04 15:50:41 +00:00
Clément Guérin 202252566b radv: Always expose non-visible local memory type on dedicated GPUs
DOOM Eternal expects this type, but RADV doesn't expose it when the VRAM
is entirely host-visible, in my case on Fiji. Matches AMDVLK behavior.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/3054
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5308>
2020-06-04 15:16:30 +00:00
Alyssa Rosenzweig 622e3a8510 pan/mdg: Legalize inverts with constants
We need to force src_invert to be in the right place even if we flip
when lowering an embedded->inline constant.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 449e5ded93 ("pan/mdg: Treat inot as a modifier")
Reported-by: Icecream95 <ixn@keemail.me>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5299>
2020-06-04 13:17:11 +00:00
Erik Faye-Lund e61a98877c nir: reuse existing psiz-variable
For shaders where there's already a psiz-variable, we should rather
reuse it than create a second one. This can happen if a shader writes
gl_PointSize, but disables GL_PROGRAM_POINT_SIZE.

Fixes: 878c94288a ("nir: add lowering-pass for point-size mov")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5328>
2020-06-04 09:12:54 +00:00
Lionel Landwerlin 57e4d0aa1c i965: fix export of GEM handles
We reuse DRM file descriptors internally. Therefore when we export a
GEM handle we must do so in the file descriptor used externally.

v2: Fix dmabuf leak
    Fix GEM handle leaks by tracking exported handles

v3: Check os_same_file_description error (Michel)
    Don't create multiple exports for a given GEM table

v4: Add WARN_ONCE (Ken)

v5: Remove blank line (Ian)
    Remove unused field (Ian)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2882
Fixes: 4094558e86 ("i965: share buffer managers across screens")
Tested-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4861>
2020-06-04 07:31:38 +00:00
Lionel Landwerlin aba3aed96e iris: fix export of GEM handles
We reuse DRM file descriptors internally. Therefore when we export a
GEM handle we must do so in the file descriptor used externally.

This change also fixes a file descriptor leak of the FD given at
screen creation.

v2: Don't bother checking fd equals, they're always different
    Fix dmabuf leak
    Fix GEM handle leaks by tracking exported handles

v3: Check os_same_file_description error (Michel)
    Don't create multiple exports for a given GEM table

v4: Add WARN_ONCE (Ken)
    Rename external_fd to winsys_fd

v5: Remove export lock in favor of bufmgr's

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2882
Fixes: 7557f16059 ("iris: share buffer managers accross screens")
Tested-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4861>
2020-06-04 07:31:38 +00:00
Lionel Landwerlin e41e820648 i965: don't forget to set screen on duped image
We'll start using this field more for querying image properties.
Without it we run into a crash.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4861>
2020-06-04 07:31:38 +00:00
Lionel Landwerlin 604a86e46f iris: fix BO destruction in error path
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4861>
2020-06-04 07:31:38 +00:00
Vinson Lee c3025bde19 mesa: Fix NetBSD compiler macro.
Reported-by: Rafał Mikrut <mikrutrafal54@gmail.com>
Fixes: a63b90712a ("mesa: also check for __NetBSD__")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3015
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5191>
2020-06-03 21:09:54 -07:00
Rob Clark e9cda38031 freedreno/a6xx: also consider alpha-test for ztest-mode
Looks like we don't have CI coverage for this (since deqp==GLES) but
alpha test is conceptually the same as frag shaders with discard, and
should be handled as such.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5298>
2020-06-04 02:34:54 +00:00
Rob Clark 1e3731e711 freedreno/a6xx: add early-lrz-late-z mode
Now that we are doing a better job of managing LRZ, add support for the
EARLY_LRZ_LATE_Z mode.  Since we properly disable LRZ write in cases
where we don't know a fragment's z value during the binning pass (or
when blend is enabled in a later draw, meaning we will need the earlier
fragment's color), we can enable a mode that keeps the early-lrz test
when the frag shader has kill/discard.  This will only discard geometry
that is definitely not visible.

This is a pretty big win for games/benchmarks that have a lot of frag
shaders with kill/discard.  More than 10% gain for gfxbench trex/mh and
40% gain for mh31.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5298>
2020-06-04 02:34:54 +00:00
Rob Clark 07887c9f34 freedreno/a6xx: re-work LRZ state tracking
In particular, properly detect reversal of depth-test direction.
With that we can remove a lot of cases where we were unnecessarily
invalidating LRZ, which was simply papering over the direction-
reversal issue in deqp.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5298>
2020-06-04 02:34:54 +00:00
Rob Clark 27e501bcfc freedreno/a6xx: update depth-plane control regs
And document the early-lrz-late-z mode.

Initially I thought this would be two bits to control early-lrz vs
early-z.  But having early-z without early-lrz does not make sense,
and the way the values line up makes an enum fit better.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5298>
2020-06-04 02:34:54 +00:00
Rob Clark f6307426ed freedreno/a6xx: sync registers from envytools
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5298>
2020-06-04 02:34:54 +00:00
Rob Clark ebcf3545db freedreno/ir3: split kill from no_earlyz
Unlike other conditions which prevent early-discard of fragments, kill
does not prevent early LRZ test.  Split `has_kill` from `no_earlyz` so
we can take advantage of this.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5298>
2020-06-04 02:34:54 +00:00
Kristian H. Kristensen 346bb81f40 docs/features.txt: Update for freedreno
We've had GL_OES_texture_cube_map_array for a while for a4xx+ and
support for geometry and tessellation for a6xx+.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5319>
2020-06-04 00:56:20 +00:00
Kristian H. Kristensen 5fb7cad95c freedreno/a6xx: Turn on robustness extensions
With UBO access going through LDC, all memory access uses buffer based
io primitives.  We can then advertise
PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR and
PIPE_CAP_DEVICE_RESET_STATUS_QUERY, which turn on GL_EXT_robustness,
GL_KHR_robust_buffer_access_behavior and GL_KHR_robustness.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5319>
2020-06-04 00:56:20 +00:00
Vinson Lee 8b353524b0 vdpau: Fix wrong calloc sizeof argument.
Fix warning reported by Coverity Scan.

Wrong sizeof argument (SIZEOF_MISMATCH)
suspicious_sizeof: Passing argument 3544UL (sizeof
(vlVdpPresentationQueue)) to function calloc that returns a pointer of
type vlVdpPresentationQueueTarget * is suspicious because a multiple of
sizeof (vlVdpPresentationQueueTarget) /*16*/ is expected.

Fixes: 65fe0866ae ("vl: implemented a few functions and made stubs to get mplayer running")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3026
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5182>
2020-06-03 17:01:47 -07:00
Francisco Jerez 8252bb0ec6 OPTIONAL: iris: Perform BLORP buffer barriers outside of iris_blorp_exec() hook.
The iris_blorp_exec() hook needs to be executed under a single
indivisible sync region, which means that in cases where we need to
emit a PIPE_CONTROL for a buffer barrier we won't be able to track the
subsequent commands separately from the previous commands, which will
prevent us from optimizing out subsequent PIPE_CONTROLs if we
encounter the same buffers again.  In particular I've encountered this
situation in some SynMark test-cases which perform lots of BLORP
operations with the same buffer bound as both source and destination
(in order to generate mipmaps): In such a scenario if the source
requires flushing we'd also end up flushing for the destination
redundantly, even though a single PIPE_CONTROL would have been
sufficient.

This avoids a 4.5% FPS regression in SynMark OglHdrBloom and a 3.5%
FPS regression in SynMark OglMultithread.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez 4b00338bde iris: Remove iris_flush_depth_and_render_caches().
This helper is unused now.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00