Commit Graph

3405 Commits

Author SHA1 Message Date
Samuel Pitoiset dd1f035f6e radv: force RADV_DEBUG=syncshaders when RADV_TRACE_FILE is used
It's a requirement to be able to identify the first bad draw or
dispatch call.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by:  Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6471>
2020-09-01 08:27:46 +02:00
Vinson Lee 50e14c3d25 radv/winsys: Fix memory leak.
Fix warning reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable handles going out of scope leaks the storage it
points to.

Fixes 485ea7d711 ("radv/winsys: pass the buffer list via the CS ioctl for less CPU overhead")

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by:  Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6510>
2020-08-31 17:33:51 -07:00
Samuel Pitoiset 8301a43f27 radv: dump shader stats with VK_KHR_pipeline_executable_properties
Instead of duplicating shader statistics in two different parts
in the driver. This also now reports the LDS size in bytes instead
of blocks with VK_AMD_shader_info.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6406>
2020-08-31 09:42:25 +02:00
Samuel Pitoiset f4d861696d radv: set BIG_PAGE to improve performance on GFX10.3
It reduces traffic between CB, DB and TCP blocks if buffers
respect a certain alignment.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6482>
2020-08-28 05:53:41 +00:00
Samuel Pitoiset d6bc0f26c9 radv: emit {CB,DB}_RMI_L2_CACHE_CONTROL at framebuffer time
The upcoming patch will set BIG_PAGE if needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6482>
2020-08-28 05:53:41 +00:00
Bas Nieuwenhuizen 4d40a719b0 radv: Fix 3d blits.
- the offsets are inclusive-exclusive so the +1 was wrong
- Since the GPU doesn't do the interpolation on depth (as we render
  per layer), we have to add an offset for the pixel center.

CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3073
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6458>
2020-08-27 09:58:59 +00:00
Samuel Pitoiset cacb388b3b radv: print a warning when RADV_TRAP_HANDLER is used
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6468>
2020-08-26 11:27:38 +00:00
Samuel Pitoiset 0d8ae4ac15 radv: fix setting EXCP_EN for different shader stages
While TRAP_PRESENT is always at the same place, EXCP_EN can be
different between shader stages. This sets it properly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6452>
2020-08-26 08:12:22 +02:00
Bas Nieuwenhuizen 83139aca59 radv: Update CTS version.
CC: 20.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6444>
2020-08-25 17:08:40 +00:00
Bas Nieuwenhuizen 4e30191c9d radv: Remove conformance warnings with ACO.
Nobody complained about our conformance submissions.

CC: 20.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6444>
2020-08-25 17:08:40 +00:00
Samuel Pitoiset 0fd33207b7 radv: allocate the TMA BO into 32-bit addr space
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6453>
2020-08-25 13:15:35 +02:00
Samuel Pitoiset d243d21ffc radv: align the TMA BO size to 256
The hardware requires 256 byte-aligned address.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6453>
2020-08-25 13:15:32 +02:00
Samuel Pitoiset 48a910d1f9 radv: use the trap handler to detect faulty shaders/instructions
It should reliably report the faulty shader but the faulty instruction
is inacurate, especially for memory violations because it's reported
when the addr is processed. It will be improved by emitting more
wait-states.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
2020-08-24 11:08:24 +00:00
Samuel Pitoiset 8e97a61cfb radv: enable the trap handler and configure the shader exceptions
When TRAP_PRESENT is not enabled, all traps and exceptions are ignored.
Only EXCP_EN.mem_viol is currently supported because the other
exceptions have to be tested/validated first.

EXCP_EN.mem_viol is used to detect any sort of invalid memory
access like VM fault. When a memory violation is reported, the
hw jumps to the trap handler.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
2020-08-24 11:08:24 +00:00
Samuel Pitoiset af3230e39e radv: add initial trap handler support with RADV_TRAP_HANDLER=1
A trap handler is used to handle shader exceptions like memory
violations, divide by zero etc. The trap handler shader code will
help to identify the faulty shader/instruction and to report
more information for better debugging.

This has only been tested on GFX8, though it should work on GFX6-GFX7.
It seems we need a different implemenation for GFX9+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
2020-08-24 11:08:24 +00:00
Samuel Pitoiset 8fd2f5c16d radv: add a small interface for creating the trap handler shader
Similar to the GS copy shader except that NIR is unused because
the shader is written directly using ACO IR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
2020-08-24 11:08:24 +00:00
Jesse Natalie d3faac7a15 nir: Add options to nir_lower_compute_system_values to control compute ID base lowering
If no options are provided, existing intrinsics are used.
If the lowering pass indicates there should be offsets used for global
invocation ID or work group ID, then those instructions are lowered to
include the offset.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>
2020-08-21 22:07:05 +00:00
Jesse Natalie 2e1df6a17f nir: Move compute system value lowering to a separate pass
The actual variable -> intrinsic lowering stays where it is, but
ops which convert one intrinsic to be implemented in terms of
another have moved.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>
2020-08-21 22:07:05 +00:00
Jesse Natalie 41e4eb9948 nir: Add new system values and intrinsics for dealing with CL work offsets
New intrinsics are added for global invocation IDs and work group IDs to
deal with offsets in both. The only one of these that needs a system value
is global invocation offset, for CL's get_global_offset().

Note that CL requires very large work group sizes, so these intrinsics
are modified to be able to use 64bit values, for 64bit SPIR-V.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>
2020-08-21 22:07:05 +00:00
Samuel Pitoiset f811ddf5d1 radv: ignore BB labels when splitting the disassembly string
Ignore everything that is not an instruction. This should fix
the annotated UMR disassembly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6387>
2020-08-21 10:34:22 +02:00
Eric Anholt b3c822a0a8 radv: Move nir_opt_shrink_vectors() into the opt loop.
Upcoming changes to opt_undef will result in this pass doing more work and
generating vector MOVs that need re-scalarizing (which is inside of the
main opt loop).

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6054>
2020-08-20 16:44:08 +00:00
Rhys Perry b553c7dd96 radv: fix null memcpy and zero-sized malloc
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6206>
2020-08-20 10:52:19 +00:00
Rhys Perry b50ae77014 radv: align pipeline cache entry and header sizes
Fixes UBSan error:
../src/amd/vulkan/radv_pipeline_cache.c:603:42: runtime error: member access within misaligned address 0x00000152ebcc for type 'struct cache_entry', which requires 8 byte alignment

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6206>
2020-08-20 10:52:19 +00:00
Rhys Perry 4f08af6766 radv: don't pass null to _mesa_sha1_update
This could then pass NULL to memcpy. Fixes UBSan error:
../src/util/sha1/sha1.c:140:8: runtime error: null pointer passed as argument 2, which is declared to never be null

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6206>
2020-08-20 10:52:19 +00:00
Samuel Pitoiset e901b901cb radv,aco: report ACO errors/warnings back via VK_EXT_debug_report
To help developers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6318>
2020-08-20 08:15:08 +02:00
Connor Abbott c77716294b radv: Use an input for the layer when lowering input attachments
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5719>
2020-08-19 16:36:43 +00:00
Connor Abbott d243bf1032 nir/lower_input_attachments: Support loading layer id as an input
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5719>
2020-08-19 16:36:43 +00:00
Connor Abbott e72895767b nir/lower_input_attachments: Refactor to use an options struct
While we're at it, fold the details of how to load the fragcoord into
load_fragcoord().

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5719>
2020-08-19 16:36:43 +00:00
Emil Velikov 41bb6459d3 radv: restrict exported symbols with static llvm
Like the gallium --version-script magic but for radv.

The long term goal is to make LLVM support optional, remove it even, so
let's keep the hunk in an if block.

v2: fold if checks (Eric)
v3 (Tomeu): Remove spaces within [] (Dylan)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6203>
2020-08-19 11:19:18 +00:00
Samuel Pitoiset d26f62c667 radv: track and report if a logical device is lost
This currently covers two situations where it's obvious that
the GPU hung:

1) when wait-of-idle doesn't finish in a finite time
2) when a CS submission is cancelled by the kernel

There is still probably some other situations that aren't yet handled.

According to the Vulkan spec, some operations should return
VK_ERROR_DEVICE_LOST when the corresponding logical device is
known to be lost.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5878>
2020-08-19 07:57:51 +00:00
Bas Nieuwenhuizen f038b3a136 radv: Fix handling of attribs 16-31.
We really need to update the enum for consistency, but that involves
a bunch of GL & bitfield work which is error-prone, so since this is
a fix for stable lets do the simple things.

Confirmed that nothing in radv/aco/nir/spirv uses MAX_VERT_ATTRIB
except the one thing I bumped.

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6120>
2020-08-18 20:31:21 +02:00
Bas Nieuwenhuizen 0067f89920 radv: Override the uniform buffer offset alignment for World War Z.
Game does the equivalent of a

ALIGN(..., minUniformBufferOffsetAlignment >> 4)

which breaks when said alignment is <16 with a SIGFPE.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6120>
2020-08-18 20:31:15 +02:00
Bas Nieuwenhuizen a1d4721e21 driconf: Support selection by Vulkan applicationName.
This adds applicationName + version through like engineName.

Rationale: A game (World War Z) includes the store name in the
executable name, so has multiple executable names.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6120>
2020-08-18 20:31:07 +02:00
Pierre-Eric Pelloux-Prayer b7c04b1790 ac/llvm: handle static/shared llvm init separately
Having a single init function works as expected for shared llvm, but
when using a static llvm only one llvm will get initialized.

This commit introduces 2 separate init function:
- shared llvm = single public init function
- static llvm = one init function for each module using llvm

Fixes: 50d20dc055 ("ac/llvm: export ac_init_llvm_once in targets")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3376
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6253>
2020-08-17 10:47:41 +00:00
Dave Airlie 8004fa9c95 vulkan/wsi: add sw support. (v2)
This adds an option to the WSI support for a software path to be
used with the vulkan sw drivers. There is probably some changes
that could be made to improve this and use present, for now
just use put image.

v2: roll out flag across all drivers (Eric)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6082>
2020-08-17 14:30:50 +10:00
Bas Nieuwenhuizen 50b039590e radv: Use getter instead of setter to extract value.
Oops ...

Fixes: 64768111c3 "radv: Handle slightly different image dimensions."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3417
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6337>
2020-08-16 23:40:03 +00:00
Bas Nieuwenhuizen 0980d1d5ab radv: Clean up setting the surface flags.
If we don't give the init function access to the fields we will not
accidentally start setting them.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6274>
2020-08-14 10:29:44 +00:00
Bas Nieuwenhuizen d19bc94e4e radv: When importing an image, redo the layout based on the metadata.
When importing a DMA-BUF, the image layout created in vkImageCreate may
not match the imported BO's. To make this work we redo the layout based
on the metadata of the imported image.

The original patch did a delayed allocation just as for AHB, but that
does not work for images that are not imported (but e.g. exported only).

Original patch by Simon Ser <contact@emersion.fr>

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2801
CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6274>
2020-08-14 10:29:44 +00:00
Samuel Pitoiset 431a3cf239 radv/winsys: add null winsys entries for Sienna Cichild/Navy Flounder
We don't know the PCI ID yet.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6257>
2020-08-12 09:45:57 +00:00
Samuel Pitoiset 638a09b827 radv: fix emitting the border color pointer on the compute queue
This was just missing.

Fixes: 57e796a12a ("radv: Implement VK_EXT_custom_border_color")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: John Galt <johngaltfirstrun@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6276>
2020-08-12 09:13:11 +02:00
Samuel Pitoiset e4c6204d65 radv: limit LATE_ALLOC_GS to prevent a GPU hang on GFX10
Found by inspection, doesn't fix anything known.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6279>
2020-08-11 12:47:33 +00:00
Samuel Pitoiset 0256250547 radv/gfx10: add missing initialization of registers
Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6277>
2020-08-11 13:48:32 +02:00
Bas Nieuwenhuizen e362ccb20c radv: Do not consider layouts fast-clearable on compute queue.
We cannot decompress from the compute queue. While I'm pretty sure
VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL is only useful on the
graphics queue, I cannot find a VU that prevents the transition
from happening on another queue, so we need to be careful here.

This patch ensures we do the decompression on the barrier that changes
the queue ownership.

Another problem was that DCC images were considered fast-clearable
when not DCC compressed, which resulted in a mess with concurrent
queue ownership.

Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3387
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6252>
2020-08-10 16:24:38 +00:00
Bas Nieuwenhuizen 2fa83dc64d radv: Add forcecompress debug flag.
Enables DCC/HTILE/CMASK/FMASK when supported, not just when we think
it is beneficial.

This is helpful to detect compression bugs with CTS.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6252>
2020-08-10 16:24:38 +00:00
Samuel Pitoiset 6d988ad4a2 radv: report a better error message when QueueWaitIdle() failed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6230>
2020-08-10 14:09:23 +02:00
Samuel Pitoiset 3691ef5596 radv: report errors back to the application via VK_EXT_debug_report
Help for debugging.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6230>
2020-08-10 14:09:21 +02:00
Samuel Pitoiset cc4b9c2128 radv: rework the error function helpers a bit
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6230>
2020-08-10 14:09:19 +02:00
Samuel Pitoiset 11781c0e49 radv: report the spirv-nir logs back to the application
Via VK_EXT_debug_report to help debugging various SPIRV->NIR issues.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6223>
2020-08-10 13:19:21 +02:00
Bas Nieuwenhuizen ff4f6202be radv: Fix assert that is too strict.
The added assert fails on MSAA images if we disable FMASK ....

Reordered things.

Fixes: c6aadbae71 "radv: Don't use both DCC and CMASK for single sample images."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3385
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6232>
2020-08-10 09:34:49 +00:00
Bas Nieuwenhuizen 8531830038 radv: Add ETC2 support on RAVEN2.
I did a whole bunch of validation and it essentially works.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6215>
2020-08-07 10:54:58 +00:00