c89e771c9c
radeon/uvd: clear message buffer when reuse
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As required by firmware
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-03-30 14:44:33 +02:00
c836f2ce28
radeon/uvd: adapt gfx9 surface to uvd
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Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-03-30 14:44:33 +02:00
9d5db4e8f4
radeon/uvd: add uvd soc15 register
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Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-03-30 14:44:33 +02:00
474468fbf9
radeonsi/gfx9: disable features that don't work
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
8ea3da0706
radeonsi/gfx9: only allow GL 3.1
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
7695ea0c02
radeonsi/gfx9: add linear address computations for texture transfers
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
172b05a37e
radeonsi/gfx9: don't generate LS and ES states
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these shaders don't exist on GFX9
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
eb22f5bf6f
radeonsi/gfx9: SPI_SHADER_USER_DATA changes
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
f4ab7a5415
winsys/amdgpu: set/get BO tiling flags for GFX9
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
7d88233f84
radeonsi/gfx9: handle pitch and offset overrides for texture_from_handle
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
de55e57e29
radeonsi/gfx9: set/validate GFX9 BO metadata
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
bd1da6b339
radeonsi/gfx9: add radeon_surf.gfx9.surf_offset
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
3685a12bad
radeonsi/gfx9: don't write mipmap level offsets to BO metadata
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GFX9 doesn't have (usable) mipmap offsets.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
9c100bd693
radeonsi/gfx9: flush CB & DB caches with an EOP TS event
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
6e0d64712a
radeonsi/gfx9: use ACQUIRE_MEM
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
81aa21d732
radeonsi/gfx9: only use CE RAM for most-used descriptors
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because the CE RAM size decreased to 4 KB.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
86f13c7363
radeonsi/gfx9: emit FLUSH_DFSM where required
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
ad93d72c34
radeonsi/gfx9: emit BREAK_BATCH in emit_framebuffer_state
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
405bacd820
radeonsi/gfx9: fix MIP0_WIDTH & MIP0_HEIGHT for compressed texture blits
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
354285afa0
radeonsi/gfx9: fix textureSize/imageSize for 1D textures
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
566defad13
radeonsi/gfx9: add a workaround for 1D depth textures
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The same workaround is used by Vulkan.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
fc3c503b5d
radeonsi/gfx9: enable clamping for Z UNORM formats promoted to Z32F
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so that shaders don't have to do it.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
5abf60076c
radeonsi/gfx9: image descriptor changes in mutable fields
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
c8ffec4f4b
radeonsi/gfx9: FMASK image descriptor changes
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
d60f72a9f0
radeonsi/gfx9: image descriptor changes in immutable fields
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The border color swizzle logic was copied from Vulkan. It doesn't make any
sense to me, but it passes all piglits except the stencil ones.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
dfd2b54948
radeonsi/gfx9: DB changes
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
94819a3e6c
radeonsi/gfx9: CB changes
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
272b50a6f4
radeonsi/gfx9: do DCC clears on non-mipmapped textures only
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
aba8e0ea68
radeonsi/gfx9: update can_sample_z/s flags
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
054dcbe42c
radeonsi/gfx9: pass correct parameters to buffer_get_handle
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
710aaed52b
radeonsi/gfx9: update si_set_optimal_micro_tile_mode
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
7fcad40ca5
radeonsi/gfx9: don't check array_mode for allowing TC-compatible HTILE
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GFX9 supports this with all modes except linear.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
6f09b0d076
radeonsi/gfx9: update HTILE/CMASK/FMASK allocators
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
281542c690
radeonsi/gfx9: stub testdma - array_mode_to_string
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
a0e8b73594
radeonsi/gfx9: update r600_print_texture_info
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
b25d7c2cbf
gallium/radeon: move pre-GFX9 radeon_bo_metadata.* to u.legacy.*
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
9b365d497a
winsys/amdgpu: set num_tile_pipes, pipe_interleave_bytes for GFX9
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
493de7f935
winsys/amdgpu: wire up new addrlib for GFX9
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
e572835fea
winsys/amdgpu: update amdgpu_addr_create for GFX9
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
a71139470c
winsys/amdgpu: rename GFX6 surface functions
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
9ca33ab78e
gallium/radeon: add GFX9 surface info to radeon_surf
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
ba2e7c68ce
gallium/radeon: move pre-GFX9 radeon_surf.* members to radeon_surf.u.legacy.*
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
641b79774a
radeonsi/gfx9: allow Z16_UNORM for TC-compatible HTILE
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
a4f0a1099f
radeonsi/gfx9: draw changes
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
b39fade67c
radeonsi/gfx9: pad shader binaries by 128 bytes
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
5271d12a6e
radeonsi/gfx9: trivial shader and ring changes
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
0aae4f4764
radeonsi/gfx9: sampler state changes
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
71eca0780a
radeonsi/gfx9: add a scissor bug workaround
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
b576df4017
radeonsi/gfx9: rasterizer changes
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
be8eba0625
radeonsi/gfx9: disable the 2-bit format fetch fix
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
Leo Liu
Marek Olšák