Implementation based on the classic driver with the following
changes:
- Use auxiliarry function os_get_total_physical_memory to get the
total amount of memory.
- Move the libdrm_intel specific get_aperture_size to the winsys.
Cc: Chia-I Wu <olvaffe@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Implementation based on the classic driver with the following
changes:
- Use auxiliarry function os_get_total_physical_memory to get the
total amount of memory.
- Move the libdrm_intel specific get_aperture_size to the winsys.
Cc: Stephane Marchesin <stephane.marchesin@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Provide the real vendor and and hardcode the device id as
0xffffffff as the devices currently using freedreno are non-pci.
The device features UMA.
Cc: Rob Clark <robclark@freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Namely vendor/device id, accelerated and UMA, which will be used to describe
the underlying renderer.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
v2:
- Drop __DRI2_RENDERER_PREFERRED_PROFILE case.
- Cleanup return statements.
Cc: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
- Create radeon{Vendor,GetRenderer}String helpers.
- Drop __DRI2_RENDERER_PREFERRED_PROFILE case.
- Cleanup return statements.
To be used by the upcomming GLX_MESA_query_renderer implementation.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Printing the TCL involves that context is available at the time of
query. The GLX_MESA_query_renderer states that glGetString(GL_RENDERER)
and glXQueryRendererStringMESA(GLX_RENDERER_DEVICE_ID_MESA) will have
the same format, thus removing the context dependenicy will help us
achieve that.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
- Create nouveau_{vendor,get_renderer}_string helpers.
- Set correct max_gl*version.
- Query the device PCIID via libdrm_nouveau/nouveau_getparam.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Essentially all drivers would like to use to opengl core profile if
available, so avoid duplication by moving the code to a common fallback
within driQueryRendererIntegerCommon.
If a driver uses different approach they can handle it separately.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
The extension is used by GLX_MESA_query_renderer, which
can be provided for by hardware and software drivers.
v2: Use designated initializers.
v3: Move drisw_query_renderer_*() to dri2_query_renderer.c
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Generate a GL error and return rather than crashing on a null
ctx->Driver.CopyImageSubData pointer (gallium). This allows apitraces
with glCopyImageSubData() calls to continue rather than crash.
Plus, fix a comment typo.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Similar to the problem described in 2c50212b14, if we copy the clear
value through a regular assignment via a floating point value, then if an
integer clear value is being used that happens to contain a signalling NaN
value then it would get converted to a quiet NaN when stored via the x87
floating-point registers. This would corrupt the integer value. Instead we
should use a memcpy to ensure the exact bit representation is preserved.
This bug can be triggered on 32-bit builds with optimisations by using an
integer clear color with a value like 0x7f817f81.
Reviewed-by: Matt Turner <mattst88@gmail.com>
V2: Set force_writemask_all on ADD; this *is* necessary in the VS case
too.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
For now, assume that the addressed sampler can be in any of the
16-sampler banks. If we preserved range information this far, we
could avoid emitting these instructions if the sampler were known
to be contained within one bank.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
We're about to be using this infrastructure to build descriptors in
src1 of non-send instructions, when preparing to do an indirect send.
Don't accidentally clobber the conditionalmod field of those
instructions with SFID bits, which aren't part of the descriptor.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
This provides a reasonable place to enforce the hardware restriction
that indirect descriptors must be in a0.0
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
The pass breaks live ranges of virtual registers by allocating new
registers when it sees an assignment to a virtual GRF it's already seen
written.
total instructions in shared programs: 4337879 -> 4335014 (-0.07%)
instructions in affected programs: 343865 -> 341000 (-0.83%)
GAINED: 46
LOST: 1
[mattst88]: Make pass not break in presence of control flow.
invalidate_live_intervals() only if progress.
Fix up delta_x/delta_y.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Commit c66d928f2c ("i965: Enable INTDIV
in SIMD16 mode.") began using generate_math_gen6 to break SIMD16 INTDIV
into two SIMD8 operations.
generate_math_gen6 takes two registers - for unary operations, we pass
ARF null for the second operand. Prior to Broadwell, real operands were
always GRF. But now they can be IMM as well.
So, check for != ARF instead of == GRF.
+12 piglits.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This reverts commit af13cf609f, which
appears to cause huge performance problems on Ivybridge. I'd missed
that the FFTID bits are in the low byte. The documentation doesn't
indicate that the URB write message header actually wants FFTID - it
just labels those bits as "Reserved." But it appears necessary.
This does slightly more than revert the original change: originally,
Broadwell had separate code generation, which used MOV, and this patch
only changed it for Gen4-7. Now that both are unified, reverting this
also makes Broadwell use OR. Which should be fine.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
The extension says GL 4.0 is required. We'll meet the spirit
of that restriction by enabling on just those generations which will
soon support GL 4.0 (Gen7+), although it's technically supportable on
all generations.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
The quality level (fine/coarse/dont-care) is plumbed through to the
generator as a constant in src1.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
The quadop-based method we currently use on all chipsets already
provides the fine version of the derivatives.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
Reviewed-by: Roland Scheidegger <sroland@vmware.com> (v1)
v2: Reuse opcode gaps as suggested by Marek
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
This extension is identical to NV_texture_barrier. Alias
glTextureBarrier to the existing glTextureBarrierNV and use the existing
NV_texture_barrier extension bit.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Emil Velikov
Brian Paul
Neil Roberts
Glenn Kennard
Chris Forbes
Kenneth Graunke
Ilia Mirkin