Commit Graph

118683 Commits

Author SHA1 Message Date
Ross Zwisler cabcbb4db0 intel: limit shader geometry on BDW GT1
Similar to the SKL GT1 fix introduced here:

b1ba7ffdbd

we need to limit the .urb.max_entries[MESA_SHADER_GEOMETRY] on BDW GT1
to address failures in these two tests:

dEQP-GLES31.functional.geometry_shading.layered.render_with_default_layer_3d
dEQP-GLES31.functional.geometry_shading.layered.render_with_default_layer_2d_array

The value 690 was found via bisection.  691 is the actual max on the
hardware I'm using, but 690 seemed like a nice round number.

Signed-off-by: Ross Zwisler <zwisler@google.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3173>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3173>
2019-12-20 10:47:52 +00:00
Alyssa Rosenzweig c57337bbd3 pan/midgard: Lower txd with lower_tex
This is a hack since we do have native gradient stuff, but for the
moment I'm more interested in conformance and the lowered code is good
enough. Fixes
dEQP-GLES3.functional.shaders.texture_functions.texturegrad.sampler2d_fixed_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3169>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3169>
2019-12-20 09:10:39 +01:00
Alyssa Rosenzweig da73651da4 pan/midgard: Fix crash with txs
This regressed since we implemented RECT textures natively, oops.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3169>
2019-12-20 09:10:36 +01:00
Alyssa Rosenzweig ccbc9a4e67 pan/midgard: Implement textureOffset for 2D textures
Fixes dEQP-GLES3.functional.shaders.texture_functions.textureoffset.sampler2d_fixed_fragment.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3169>
2019-12-20 09:10:26 +01:00
Samuel Pitoiset 2eef9e050f radv: ignore pColorBlendState if rasterization is disabled
Or if the subpass has no color attachments.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3167>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3167>
2019-12-20 08:21:02 +01:00
Samuel Pitoiset 021c7b5309 radv: tidy up radv_pipeline_init_blend_state()
This is needed for the next commit because pColorBlendState can
actually be NULL but some fields might have to be initialized
(eg. alpha to coverage with no color attachments).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3167>
2019-12-20 08:20:58 +01:00
Samuel Pitoiset ebc7a77869 radv: ignore pDepthStencilState if rasterization is disabled
Or if the subpass has no depth stencil attachment.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3167>
2019-12-20 08:20:55 +01:00
Samuel Pitoiset ce67e41535 radv: ignore pTessellationState if the pipeline doesn't use tess
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3167>
2019-12-20 08:20:52 +01:00
Samuel Pitoiset 7735f314b7 radv: ignore pMultisampleState if rasterization is disabled
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3167>
2019-12-20 08:20:49 +01:00
Samuel Pitoiset 589bfcbde3 radv: init a default multisample state for the resolve FS path
pMultisampleState must be a valid pointer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3167>
2019-12-20 08:20:44 +01:00
Caio Marcelo de Oliveira Filho 4fbc99c124 spirv: Implement SPV_KHR_non_semantic_info
Do nothing for OpExtInst from extended instruction sets that name
start with "NonSemantic.".

Since they can be used within the "preamble" to annotate global
decorations, also don't stop iterating when one of them is found.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3154>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3154>
2019-12-19 22:49:39 -08:00
Jonathan Marek 13adce2845 turnip: disable B8G8R8 vertex formats
Looks like swap doesn't work as expected on these, disable them.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3170>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3170>
2019-12-19 19:03:02 -05:00
Jonathan Marek 54f72c83d6 util/format: add missing vulkan formats
Add some missing vulkan formats to util/format, this solves all the missing
pipe format cases for the formats that turnip supports.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3170>
2019-12-19 19:03:02 -05:00
Jonathan Marek b9d4c10e4b turnip: minor warning fixes
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3177>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3177>
2019-12-19 23:21:01 +00:00
Andreas Baierl d71cd245d7 lima: Rotate dump files after each finished pp frame
This rotates the dump files like the mali-syscall-tracker does.

After each finished pp frame a new file is generated. They are
numbered like lima.dump.0000, lima.dump.0001 ...
The filename and path can be given with the new environment
variable LIMA_DUMP_FILE.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3175>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3175>
2019-12-19 23:53:22 +01:00
Vasily Khoruzhick 039f3f6adb lima: drop suballocator
Since we're using a separate per-draw BO for GP outputs we don't
need suballocator anymore.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3158>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3158>
2019-12-19 14:28:32 -08:00
Vasily Khoruzhick 9f72d7195a lima: use single BO for GP outputs
Varyings, gl_Position and gl_PointSize are all GP outputs, so we
can use a single BO for them all. Also that allows us to get rid
of suballocator.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3158>
2019-12-19 14:28:32 -08:00
Jonathan Marek 06ae0674fd nir: fix assign_io_var_locations for vertex inputs
Also fixes fragment inputs using the wrong "base" value (which was working
only because FRAG_RESULT_DATA0 is less than VARYING_SLOT_VAR0)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3108>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3108>
2019-12-19 21:26:52 +00:00
Jonathan Marek e9a32af3bf turnip: implement secondary command buffers
Uses a new "tu_cs_add_entries" function because tu_cs_emit_call doesn't
work inside draw_cs (which is already called by tu_cs_emit_call).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3075>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3075>
2019-12-19 20:42:08 +00:00
Jonathan Marek 85fff42d08 turnip: compute gmem offsets at renderpass creation time
This makes it easier to implement secondary command buffers, since we no
longer need to know the render area to set the gmem offsets for input
attachments and CmdClearAttachments.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3075>
2019-12-19 20:42:08 +00:00
Jonathan Marek f81c41a812 turnip: emit_compute_driver_params fixes
Offset was wrong, it is in vec4 not dwords.

There's a hole between DP_NUM_WORK_GROUPS_Z and DP_LOCAL_GROUP_SIZE_X so
use the IR3 enums.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3162>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3162>
2019-12-19 15:13:40 -05:00
Jonathan Marek bb134c5316 turnip: emit base instance vs driver param
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3162>
2019-12-19 15:13:40 -05:00
Jonathan Marek a3a70588c0 freedreno/ir3: support load_base_instance
Not supported by hardware, uses same mechanism as base vertex.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3162>
2019-12-19 15:13:40 -05:00
Jonathan Marek 5c17d9b9ca freedreno/registers: document vertex/instance id offset bits
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3162>
2019-12-19 15:13:40 -05:00
Neha Bhende 83ad2e5084 st/mesa: release tgsi tokens for shader states
Since we are using st_common_variant while creating variant for vertext
program, we can release tokens created in st_create_vp_variant which
are already stored in respective states.
This fix memory leak found with piglit tests

Fixes bc99b22a30 ('st/mesa: use a separate VS variant for the draw module')

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-12-19 14:40:08 -05:00
Juan A. Suarez Romero 7f821289cb Revert "nir/lower_double_ops: relax lower mod()"
This reverts commit 8172b1fa03.

This commit was done taking in account Vulkan spec, but did not realize
it was affecting OpenGL too.

Closes: #2252
2019-12-19 20:01:16 +01:00
Kristian H. Kristensen a4db9a1512 freedreno/a6xx: Set up multisample sysmem MRTs correctly
We had an extra factor of num_samples in the stride.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
2019-12-19 09:56:05 -08:00
Kristian H. Kristensen e688a16e2b freedreno/a6xx: Rewrite compressed blits in a helper function
Similar to how we handle zs blits.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
2019-12-19 09:56:05 -08:00
Kristian H. Kristensen f8c0ea61e4 freedreno/a6xx: Move handle_rgba_blit() up
If we move this function up, we don't have to forward declare it.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
2019-12-19 09:56:05 -08:00
Kristian H. Kristensen 183d482f7f freedreno/a6xx: Handle srgb blits on the blitter
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
2019-12-19 09:56:05 -08:00
Kristian H. Kristensen 3a18e5d420 freedreno/a6xx: Use A6XX_SP_2D_SRC_FORMAT_MASK macro
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
2019-12-19 09:56:05 -08:00
Kristian H. Kristensen e4c2bb6a93 freedreno/a6xx: RB6_R8G8B8 is actually 32 bit RGBX
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
2019-12-19 09:56:05 -08:00
Kristian H. Kristensen 8089fb2e62 freedreno/a6xx: Use blitter for resolve blits
We have a SAMPLES_AVERAGE bit that does what we need for resolving
multisample buffers - let's use it.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
2019-12-19 09:56:05 -08:00
Kristian H. Kristensen 1d7267fc91 freedreno/a6xx: Add fd_resource_swap() helper
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
2019-12-19 09:56:05 -08:00
Kristian H. Kristensen e0ebaa819d freedreno/a6xx: Pick blitter swap based on resource tiling
The linear levels in a tiled resource are stored in the canonical
swap, WZYX.  We need to pick the swap based on whether or not the
resource is tiled, not whether the the level in question is tiled.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
2019-12-19 09:56:05 -08:00
Kristian H. Kristensen b59222640e freedreno/a6xx: Program sampler swap based on resource tiling
It doesn't matter whether or not the level in question is linear.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
2019-12-19 09:56:05 -08:00
Kristian H. Kristensen a2f6c44a1c freedreno: Add debug flag for forcing linear layouts
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
2019-12-19 09:56:05 -08:00
Kristian H. Kristensen d908a2ab18 freedreno/a6xx: Make DEBUG_BLIT_FALLBACK only dump fallbacks
Use new macro, DEBUG_BLIT, for dumping all blits.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
2019-12-19 09:56:05 -08:00
Jonathan Marek fe4a8df9a8 freedreno/ir3: fix vertex shader sysvals with pre_assign_inputs
The first pre_assign_inputs loop doesn't pre-assign sysvals, so skip the
second part for sysvals.

The sysvals don't need to be pre-assigned since the state for those isn't
shared between binning / nonbinning shaders.

Fixes assert failures in cases where the sysvals didn't end up in the same
registers for binning / nonbinning.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3168>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3168>
2019-12-19 11:31:12 -05:00
Thong Thai 2add63060b st/va: Convert interlaced NV12 to progressive
In vlVaDeriveImage, convert interlaced NV12 buffers to progressive.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1193
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3157>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3157>
2019-12-19 15:49:09 +00:00
Alyssa Rosenzweig 5710250074 pan/midgard: Add uniform/work heuristic
Uniform/work registers are partitioned on a shader-by-shader basis as
determined by the compiler. We add a simple heuristic here running
before scheduling that prioritizes mitigating spilling at all costs.

A more sophisticated heuristic should run *after* scheduling, doing a
dry run of the register allocator itself to determine spilling. Fitting
this into our current scheduling model is difficult, so while this
heuristic does hurt some shaders, overall the results are acceptable:

total instructions in shared programs: 50065 -> 38747 (-22.61%)
instructions in affected programs: 37187 -> 25869 (-30.44%)
helped: 59
HURT: 77
helped stats (abs) min: 1 max: 757 x̄: 198.46 x̃: 151
helped stats (rel) min: 0.48% max: 62.89% x̄: 32.95% x̃: 36.27%
HURT stats (abs)   min: 1 max: 9 x̄: 5.08 x̃: 6
HURT stats (rel)   min: 0.92% max: 14.29% x̄: 6.71% x̃: 4.60%
95% mean confidence interval for instructions value: -111.15 -55.29
95% mean confidence interval for instructions %-change: -14.33% -6.67%
Instructions are helped.

total bundles in shared programs: 30606 -> 19157 (-37.41%)
bundles in affected programs: 23907 -> 12458 (-47.89%)
helped: 58
HURT: 74
helped stats (abs) min: 6 max: 757 x̄: 203.09 x̃: 152
helped stats (rel) min: 5.19% max: 77.00% x̄: 49.38% x̃: 53.79%
HURT stats (abs)   min: 1 max: 9 x̄: 4.46 x̃: 5
HURT stats (rel)   min: 1.85% max: 26.32% x̄: 11.70% x̃: 9.57%
95% mean confidence interval for bundles value: -115.46 -58.01
95% mean confidence interval for bundles %-change: -20.87% -9.41%
Bundles are helped.

total quadwords in shared programs: 31305 -> 32027 (2.31%)
quadwords in affected programs: 20471 -> 21193 (3.53%)
helped: 0
HURT: 133
HURT stats (abs)   min: 1 max: 9 x̄: 5.43 x̃: 5
HURT stats (rel)   min: 0.76% max: 15.15% x̄: 5.47% x̃: 4.65%
95% mean confidence interval for quadwords value: 5.00 5.86
95% mean confidence interval for quadwords %-change: 4.85% 6.08%
Quadwords are HURT.

total registers in shared programs: 2256 -> 2545 (12.81%)
registers in affected programs: 708 -> 997 (40.82%)
helped: 0
HURT: 95
HURT stats (abs)   min: 1 max: 8 x̄: 3.04 x̃: 3
HURT stats (rel)   min: 12.50% max: 100.00% x̄: 39.41% x̃: 37.50%
95% mean confidence interval for registers value: 2.64 3.45
95% mean confidence interval for registers %-change: 34.62% 44.19%
Registers are HURT.

total threads in shared programs: 1776 -> 1709 (-3.77%)
threads in affected programs: 134 -> 67 (-50.00%)
helped: 0
HURT: 67
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
95% mean confidence interval for threads value: -1.00 -1.00
95% mean confidence interval for threads %-change: -50.00% -50.00%
Threads are HURT.

total spills in shared programs: 3868 -> 2 (-99.95%)
spills in affected programs: 3868 -> 2 (-99.95%)
helped: 60
HURT: 0

total fills in shared programs: 6456 -> 4 (-99.94%)
fills in affected programs: 6456 -> 4 (-99.94%)
helped: 60
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3150>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3150>
2019-12-19 15:22:39 +00:00
Samuel Pitoiset 13b4e9adcf ac: declare an enum for the OOB select field on GFX10
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3147>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3147>
2019-12-19 15:15:32 +01:00
Samuel Pitoiset f3cccd05d9 radv/gfx10: fix the out-of-bounds check for vertex descriptors
When stride is 0, it should check against the offset not the index.

This fixes black character models with Beat Saber and missing snow
with Dragon Quest.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2233
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1975
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3147>
2019-12-19 15:15:30 +01:00
Juan A. Suarez Romero 8172b1fa03 nir/lower_double_ops: relax lower mod()
Currently when lowering mod() we add an extra instruction so if
mod(a,b) == b then 0 is returned instead of b, as mathematically
mod(a,b) is in the interval [0, b).

But Vulkan spec has relaxed this restriction, and allows the result to
be in the interval [0, b].

This commit takes this in account to remove the extra instruction
required to return 0 instead.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2922>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2922>
2019-12-19 12:36:30 +00:00
Erik Faye-Lund af65bfb38f zink: implement nir_texop_txd
This lets us enable PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD, which in turns
gives us ARB_shader_texture_lod.

Still fails one piglit test on ANV, namely
spec@arb_shader_texture_lod@execution@arb_shader_texture_lod-texgradcube,
but with 33 new passing tests, I think this is worth it.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3140>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3140>
2019-12-19 13:14:29 +01:00
Erik Faye-Lund b31d1b73bc zink: enable PIPE_CAP_MIXED_COLORBUFFER_FORMATS
This just works in Vulkan, there's no work neeed to enable it.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3148>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3148>
2019-12-19 10:08:13 +01:00
Jonathan Marek 5785bcc8a0 turnip: don't set SP_FS_CTRL_REG0_VARYING if only fragcoord is used
Fixes artifacts in the subpasses demo, which has a shader using fragcoord
without any varyings. It looks like setting this bit when there are no
varyings can cause weirdness in some cases (without this change, if the
previous shader had <= 8 varyings it would work, but with 9 varyings it
would have artifacts).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3143>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3143>
2019-12-18 19:03:37 -05:00
Jonathan Marek 4a59bc6df2 turnip: add cache invalidate to fix input attachment cases
Fixes artifacts in the subpasses demo.

Workaround texture cache with input attachments from GMEM by adding a cache
invalidate between subpasses.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3143>
2019-12-18 19:03:37 -05:00
Lionel Landwerlin fc2552b644 loader: fix close on uninitialized file descriptor value
Using a drm syscall layer faking a kernel driver :

  ==581460== Conditional jump or move depends on uninitialised value(s)
  ==581460==    by 0x48A4C2B: close (drm-hooks.cpp:185)
  ==581460==    by 0x5A815F1: dri3_alloc_render_buffer (loader_dri3_helper.c:1469)
  ==581460==    by 0x5A82050: dri3_get_buffer (loader_dri3_helper.c:1827)
  ==581460==    by 0x5A82662: loader_dri3_get_buffers (loader_dri3_helper.c:2028)
  ==581460==    by 0x6C78109: intel_update_image_buffers (brw_context.c:1870)
  ==581460==    by 0x6C77805: intel_update_renderbuffers (brw_context.c:1499)
  ==581460==    by 0x6C7789D: intel_prepare_render (brw_context.c:1520)
  ==581460==    by 0x6C773D4: intelMakeCurrent (brw_context.c:1341)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 069fdd5f9f ("egl/x11: Support DRI3 v1.1")
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3152>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3152>
2019-12-19 00:51:36 +02:00
Connor Abbott 648cc22afb freedreno: Fix CP_MEM_TO_REG flag definitions
These actually mean something completely different, at least on A5xx
and A6xx. The only other usage of the old flags on something older than
A6xx was a typo, so I don't know if it was always this way, but at the
same time it means that we don't have to worry too much about that.

Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3116>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3116>
2019-12-18 23:09:05 +01:00