Commit Graph

124353 Commits

Author SHA1 Message Date
Eric Anholt b678568a5e ci: Disable the firmware loader user helper option in arm64 kernels.
We won't have a user helper, so don't block for 60 seconds for it to show
up.  Speeds up debug of new kernel builds.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
2020-05-29 16:46:44 +00:00
Samuel Pitoiset 9d645a19eb radv/aco: enable VK_KHR_subgroup_extended_types on GFX8+
Should be working now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
2020-05-29 11:20:58 +00:00
Samuel Pitoiset e22567089c aco: sign-extend input/indentity for 32-bit reduce ops on GFX10
Because some 16-bit instructions are already VOP3 on GFX10, we use
the 32-bit variants to remove the temporary VGPR and to use DDP with
the arithmetic instructions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
2020-05-29 11:20:58 +00:00
Samuel Pitoiset 83dcd1690b aco: allow gfx10_wave64_bpermute with 8-bit/16-bit input
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
2020-05-29 11:20:58 +00:00
Samuel Pitoiset 8ece71507d aco: allocate a temp VGPR for some 8-bit/16-bit reduction ops on GFX10
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
2020-05-29 11:20:58 +00:00
Samuel Pitoiset 2e0ea9bcca aco: implement 8-bit/16-bit reductions on GFX10
Some 16-bit instructions are VOP3 on GFX10 and we have to emit a
32-bit DPP mov followed by the ALU instruction.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
2020-05-29 11:20:58 +00:00
Samuel Pitoiset 75a730ced5 aco: fix register allocation for subdword instructions on GFX10
Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
2020-05-29 11:20:58 +00:00
Bas Nieuwenhuizen ad609bf55a frontend/dri: Implement mapping individual planes.
It is kinda surprising that

image2 = fromPlanar(image, 2, NULL)
mapImage(..., image2, ...)

does not map the third plane.

This implements that behavior in the case where the DRI frontend
lowers the multi-planar textures.

In the case it doesn't this would need driver support. AFAIU at
least etnaviv is impacted, and while it looks possible, I don't
have the etnaviv knowledge to implement it.

Instead of silently returning weird results (either always plane 0
or possibly something interleaved) this adds an error return on
mapping multi-planar textures otherwise.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5200>
2020-05-29 09:12:33 +00:00
Vinson Lee a2ee293422 zink: Check fopen result.
Fix warning reported by Coverity.

Dereference null return value (NULL_RETURNS)
dereference: Dereferencing a pointer that might be NULL fp when calling
fwrite.

Fixes: 8d46e35d16 ("zink: introduce opengl over vulkan")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5235>
2020-05-29 08:59:19 +00:00
Samuel Pitoiset 7503863fe2 radv/aco: enable VK_EXT_subgroup_size_control
ACO should already support Wave32 on GFX10 with all shader stages
and CTS pass. RADV currently only allows Wave32 with the compute
shader stage.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5056>
2020-05-29 10:12:26 +02:00
Rob Clark 6f39126200 freedreno/a6xx: document LRZ flag buffer
Doesn't seem to be a big win, although I could still be missing
something in my implementation.  But might as well add the
documentation.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5217>
2020-05-29 00:38:28 +00:00
Rob Clark a3947f9d24 freedreno/a6xx: LRZ fix for alpha-test
Similarly to stencil-test, if alpha-test is enabled, we don't know
necessarily whether the fragment will pass.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3045
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5217>
2020-05-29 00:38:28 +00:00
Neha Bhende 838666a41d util: Initialize pipe_shader_state for passthrough and transform shaders
mesa/st is initializing pipe_shader_state for user define shaders.
This patch intialized pipe_shader_state for all passthough
and transform shaders.

This fixes crashes for several opengl apps. Issue is found in vmware
internal testing

Fixes: f01c0565bb ("draw: free the NIR IR.")

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5240>
2020-05-28 23:27:53 +00:00
Chris Wilson 034329128b iris: Rename iris_seqno to iris_fine_fence
Rename iris_seqno to iris_fine_fence, borrowed from si_fine_fence, to
avoid introducing any confusion with any other seqno used for tracking
pipelines.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5233>
2020-05-28 12:47:19 -07:00
Gert Wollny 682e14d3ea nir: lower_tex: Don't normalize coordinates for TXF with RECT
v2: remove the option to actually request normalization and its
    application in Intel < Gen6 (Jason)

v3: Also don't lower for query operations (Jason)

Fixes: 1ce8060c25
    nir/lower_tex: support for lowering RECT textures

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5105>
2020-05-28 18:39:29 +00:00
Eric Anholt f0c102c075 ci: Quick exit qpa extraction for non-matching qpas.
When you're bringing up a new driver in CI with significant number of
failures (or when a CI run breaks a driver), the QPA extraction can easily
take the whole job timeout as we go about processing each QPA (100 of them
in my early VK CI fails) per unexpected result we're saving (50), which
involves reading and each line of the file in shell.  By quickly filtering
out the QPA files not including our test, we can save all that shell
overhead, bringing QPA extract time down to a couple of minutes.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
2020-05-28 16:23:59 +00:00
Eric Anholt 46d9b500f4 ci: Move baremetal DEQP_NO_SAVE_RESULTS setup to the yml.
I'm going to want it unset (artifacts enabled) for the cheza jobs.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
2020-05-28 16:23:59 +00:00
Eric Anholt 33e0821a99 ci: Add DEQP_EXPECTED_RENDERER support for VK tests.
I used this to debug what was going on with freedreno VK in CI.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
2020-05-28 16:23:59 +00:00
Eric Anholt 6766d51c15 ci: Auto-detect the architecture for VK ICD filenames.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
2020-05-28 16:23:59 +00:00
Eric Anholt 044f50b9fd ci: Drop old comment about enabling --deqp-watchdog.
The parallel deqp runner does its own 60s watchdog.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
2020-05-28 16:23:59 +00:00
Eric Anholt c343d00ede ci: Drop double ".txt" suffix on the unexpected results file.
Just a cosmetic fix in reviewing logs.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
2020-05-28 16:23:59 +00:00
Samuel Pitoiset 10c4a7cf59 spirv,radv,anv: implement no-op VK_GOOGLE_user_type
This extension only allows HLSL shader compilers to optionally embed
unambiguous type information which can be safely ignored by the driver.

This fixes a crash with the recent Vulkan backend of Path Of Exile
(it uses the extension without checking if it's supported).

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5237>
2020-05-28 17:30:24 +02:00
Rhys Perry 01ce7887bf aco: fix 64-bit shared_atomic_exchange
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4880>
2020-05-28 10:34:03 +00:00
Rhys Perry 1f2fd9c62e aco: don't reorder barriers in the scheduler
Unless we're reordering it around a barrier of the same type

No shader-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4880>
2020-05-28 10:34:03 +00:00
Rhys Perry e1900ee2c7 aco: preserve more fields when combining additions into SMEM
Totals from 11 (0.01% of 127638) affected shaders:

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 93c8ebfa78 ('aco: Initial commit of independent AMD compiler')
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4880>
2020-05-28 10:34:03 +00:00
Rhys Perry 95d5c1b8a1 aco: check instruction format before waiting for a previous SMEM store
Totals from 7 (0.01% of 127638) affected shaders:
CodeSize: 40336 -> 40320 (-0.04%)
Instrs: 7807 -> 7803 (-0.05%)
Cycles: 118588 -> 118344 (-0.21%); split: -0.23%, +0.02%
SMEM: 331 -> 339 (+2.42%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 1749953ea3 ('aco/gfx10: Wait for pending SMEM stores before loads')
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4880>
2020-05-28 10:34:03 +00:00
Rhys Perry 5ccc7c277c aco: consider SDWA during value numbering
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 23ac24f5b1
   ('aco: add missing conversion operations for small bitsizes')

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5164>
2020-05-28 09:55:58 +00:00
Rhys Perry 8aa98cebc1 aco: fix interaction with 3f branch workaround and p_constaddr
The offset was incorrect if we inserted a nop before the p_constaddr.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 93c8ebfa ('aco: Initial commit of independent AMD compiler')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5164>
2020-05-28 09:55:58 +00:00
Michel Dänzer 1fc1b87762 gitlab-ci: Pull in GCC 9 from Debian testing in x86_test-gl/vk images
The GCC 8 packages from buster are no longer compatible with libc6 from
testing. We could use the GCC 8 packages from testing instead, but this
is easier.

v2:
* Update piglit-quick_gl test results, due to the piglit issue fixed by
  https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/294

Reviewed-by: Eric Anholt <eric@anholt.net> # v1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5186>
2020-05-28 08:01:24 +00:00
Michel Dänzer c2366f01fd gitlab-ci: x86_test-base image as common base for x86_test-gl/vk
Making use of the relatively recent FDO_BASE_IMAGE feature of the
templates, the x86_test-base image contents are shared as a separate
layer by the x86_test-gl/vk images (meaning the former only needs to be
downloaded once for either or both of the latter). This should be more
efficient in terms of overall network bandwidth and storage, in
particular if the base image changes less often than the -gl/vk ones.

v2:
* List x86_test-base in needs: along with x86_test-gl/vk (see parent
  commit)
* Always put $STABLE/TESTING_EPHEMERAL on separate lines, will make it
  easier to add any non-ephemeral packages

Reviewed-by: Eric Anholt <eric@anholt.net> # v1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5186>
2020-05-28 08:01:24 +00:00
Michel Dänzer 43111ea745 gitlab-ci: Also list arm/x86_build in needs: of test jobs
Without this, the test jobs may spuriously run if the arm/x86_build
jobs fail.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5186>
2020-05-28 08:01:24 +00:00
Caio Marcelo de Oliveira Filho bccf2a25a8 intel: Add helper to calculate GPGPU_WALKER::RightExecutionMask
Suggested by Jason.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho 78e400d4a5 iris, i965: Update limits for ARB_compute_variable_group_size
The CS compiler now produces multiple SIMD variants, so the previous
trade-off between "always using SIMD32" and "having a smaller max
invocations" is now gone.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho 46b428074f iris, i965: Drop max_variable_local_size
This was used to decide which SIMD width to generate code for
ARB_compute_variable_group_size.  Now that compiler will generate
multiple SIMD widths, this information is unused.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho 90ec26a800 intel/fs: Generate multiple CS SIMD variants for variable group size
This will make the GL drivers pick the right SIMD variant for a given
group size set during dispatch.  The heuristic implemented in
brw_cs_simd_size_for_group_size() is the same as in brw_compile_cs().

The cs_prog_data::simd_size field was removed.  The generated SIMD
sizes are marked in a bitmask, which is already used via
brw_cs_simd_size_for_group_size() by the drivers.

When in variable group size, it is OK if larger SIMD shader spill,
since we'd need it for the cases where the smaller one can't hold all
the invocations.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho 9b8347c988 anv: Use new helper functions to pick SIMD variant for CS
Also combine the existing individual anv helpers into a single one for
all CS related parameters.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho 594374dd8d iris: Use new helper functions to pick SIMD variant for CS
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho c9f4bda6ce iris: Set CS KernelStatePointer at dispatch
There's an update for INTERFACE_DESCRIPTOR_DATA at dispatch, so we can
just move the KSP assignment there.  This flexibility will later allow
variable group size to pick the right SIMD variant.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho ee0fc0f6dc i965: Use new helper functions to pick SIMD variant for CS
Also expand the existing i965 helper to return the other CS related
paramters.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho cb26d9c311 intel/fs: Add helper to get prog_offset and simd_size
This indirection will be used by the variable group size case in a
later change.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho 5b5e77caa7 intel/fs: Support INTEL_DEBUG=no8,no32 in compute shaders
The "no32" flag will have precedence over "do32", like is done for FS.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho 10d0f39beb intel/fs: Remove min_dispatch_width spilling decision from RA
Move the decision one level up, let brw_compile_*() functions use the
spilling information to decide whether or not a certain width
compilation can spill (passed via run_*() functions).

The min_dispatch_width was used to compare with the dispatch_width and
decide whether "a previous shader is already available, so don't
accept spill".

This is replaced by:

- Not calling run_*() functions if it is know beforehand a smaller width
  already spilled -- since the larger width will spill and fail;

- Explicitly passing whether or not a shader is allowed to spill.  For
  the cases where the smaller width is available and haven't spilled,
  the larger width will be compiled but is only useful if it won't
  spill.

Moving the decision to this level will be useful later for variable
group size, which is a case where we want all the widths to be allowed
to spill.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Eric Engestrom 9526e14b5c docs: update calendar, add news item, and link releases notes for 20.1.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5234>
2020-05-27 23:34:32 +00:00
Eric Engestrom e94a811a46 docs: Add release notes for 20.1.0
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5234>
2020-05-27 23:34:32 +00:00
Mike Blumenkrantz dff1bac634 zink: always use logical eq ops in ntv with 1bit inputs
integer and float compare ops cannot take boolean types, so the bit size
of the inputs should be checked here so that we can swap to the logical
equality functions if we're being passed a bool value

resolves tons of validator errors in glsl piglit tests

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5231>
2020-05-27 23:20:22 +00:00
Vinson Lee df2c68ee4f pan/bi: Initialize struct fma_op_info member extended.
Fix warning reported by Coverity Scan.

Uninitialized scalar variable (UNINIT)
uninit_use: Using uninitialized value info. Field info.extended is
uninitialized.

Fixes: 8c79c710d4 ("pan/bi: Identify extended FMA opcodes")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5224>
2020-05-27 15:41:21 -07:00
Erico Nunes b3023055e0 lima/ppir: use a ready list in node_to_instr
After the recent optimizations in ppir lowering that increase options
for combining, node_to_instr now may have multiple options of nodes to
insert and needs to decide which is better.
For example, if an instruction uses both a varying and a texture, there
are two nodes nodes that can be inserted to the load varying slot in the
same instruction (ld_var and ld_coords). It is much more advantageous to
pipeline the load texture coords since that enables the higher precision
path for texture coordinates. However, with the current recursive
expansion, this cannot be influenced.

This simple ready list implementation in node_to_instr allows it to
choose the next node to expand based on a priority score, rather than
relying on the random order coming from the recursive expansion.

Other than preferring nodes with pipeline output (which covers ld_coords
vs ld_var), nodes using later slots in the pipeline are now expanded
first, allowing node_to_instr to make all of the earlier (pipelineable)
nodes available in the ready list so the best one can be chosen when
picking nodes for the earlier slots.

Fixes: 632a921bd0 lima/ppir: optimize tex loads with single successor

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5092>
2020-05-27 21:15:33 +00:00
Alyssa Rosenzweig 9ae8b4af75 pan/bi: Suppress inf/nan for now
This is a (hopefully temporary) hack. The blob does it for ES2 at any
rate.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:58:00 -04:00
Alyssa Rosenzweig 6f589f4e04 pan/bi: Add CSEL.16 packing tests
Passing but let's increase coverage.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:45 -04:00
Alyssa Rosenzweig 87ca1c1eea pan/bi: Pack compact vertex texturing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:45 -04:00