Commit Graph

139679 Commits

Author SHA1 Message Date
Tony Wasserka c0f4bb9a22 util: add support for defining bitwise operators on strongly typed enums
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10784>
2021-05-14 11:00:52 +00:00
Jordan Justen df5b14969f intel: Add 2 ADL-S pci-ids
Cc: mesa-stable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10781>
2021-05-14 08:59:18 +00:00
Daniel Schürmann c62d58c80f driconf: set vk_x11_strict_image_count for Metro: Exodus
Otherwise, the game crashes on startup under xwayland.

Closes: #4650
Cc: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10750>
2021-05-14 07:59:50 +00:00
Mike Blumenkrantz 776ddfc858 util/queue: don't require a fence when adding a job
sometimes we just want to fire jobs off into the void and don't care
if or when they finish

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10719>
2021-05-14 06:49:31 +00:00
Icecream95 4da88060d0 panfrost: Skip blit shader labelling if the buffer has no space
Fixes stack corruption in dEQP-GLES31.functional.draw_buffers_indexed.
random.max_implementation_draw_buffers.10

Fixes: 8ba2f9f698 ("panfrost: Create a blitter library to replace the existing preload helpers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10792>
2021-05-14 06:39:05 +00:00
Lionel Landwerlin 938e52a6e8 anv: handle spirv parsing failure
v2: don't leak spec_entries

v3: Also switch to VK_ERROR_UNKNOWN when parsing fails

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10790>
2021-05-14 06:32:03 +00:00
Jordan Justen e435511b58 intel/dev: Add device info for ADL GT2
Cc: mesa-stable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9465>
2021-05-14 06:10:47 +00:00
Jordan Justen 89f3312625 intel/isl: Add Wa_22011186057 to disable CCS on ADL GT2 A0
Cc: mesa-stable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9465>
2021-05-14 06:10:47 +00:00
Daniel Stone e1d74c9cfd CI: Disable all Panfrost/AMD/Iris automatic jobs
The power in Cambridge is unstable; disable these jobs until it's back
clear.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10797>
2021-05-14 04:18:17 +00:00
Mike Blumenkrantz d1e30ca120 zink: immediately return false when getting query result if it's not gonna happen
this is a small optimization for the no-wait case when unflushed usage
exists since it's impossible for a qbo update to happen instantly

no functionality will be fixed by this, it's just a very minor optimization

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10796>
2021-05-14 03:15:09 +00:00
Mike Blumenkrantz cf3f17a643 lavapipe: fix fencing when submitting multiple cmdbufs
a fence applies to all the submitted cmdbufs, so it's necessary to do
the flush which creates the user fence after all the cmdbufs have been
processed in order to avoid creating a fence that only applies to the
first cmdbuf

Fixes: b38879f8c5 ("vallium: initial import of the vulkan frontend")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10795>
2021-05-14 03:03:32 +00:00
Mike Blumenkrantz 719e4fb369 zink: fix DrawParameters shader cap usage
this is for vertex shaders and covers more than just baseinstance

Fixes: dcb9e4ddb4 ("zink: emit cap early")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10788>
2021-05-13 21:44:59 +00:00
Mike Blumenkrantz 8e2ac24482 zink: stop overwriting buffer map pointers for stream uploader
this breaks the driver!

the uploader always maps its own pointer, so modifying that at any
point just explodes things later

Fixes: d179c5d28e ("zink: implement threaded context")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10787>
2021-05-13 21:37:15 +00:00
Caio Marcelo de Oliveira Filho c0dc6affdc intel/compiler: Clarify why VUE is recomputed by FS
FS will get the last geometry VUE, but it still needs to recompute in
case the number of position slots assigned by geometry is larger than
one -- this happens when Primitive Replication is used.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10653>
2021-05-13 12:10:26 -07:00
Danylo Piliaiev 5a133ef1f2 ci/turnip: drop fail annotation for image.extend_operands_spirv1p4.*
They were fixed in
ed20e69b "vtn: Handle ZeroExtend/SignExtend image operands"

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10783>
2021-05-13 17:18:48 +00:00
Danylo Piliaiev 9a477ccbea ci/turnip: drop fail annotation for float_control tests
These tests are NotSupported and therefore cannot fail.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10783>
2021-05-13 17:18:48 +00:00
Lionel Landwerlin 2cebb1b5b3 anv: fix perf query pass with command buffer batching
We've only considered the perf query pool change previously. But we
also need to pay attention to the pass index.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0a7224f3ff ("anv: group as many command buffers into a single execbuf")
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10301>
2021-05-13 17:02:41 +00:00
Lionel Landwerlin 2c2de4d60e intel/mi_builder: fix resolve call
Giving NULL for anv_combine_address() triggers an assert in that
function.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 8525ebe6e3 ("intel/mi_builder: Return an address from __gen_get_batch_address")
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10301>
2021-05-13 17:02:41 +00:00
Abel García Dorta f88dd7ed4d i915g: add HW atomic counters as unsupported
Closes: #4772
Fixes: 2a06423c00 ("gallium: add CAPs to support HW atomic counters. (v3)")
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10776>
2021-05-13 16:29:07 +00:00
Tony Wasserka 80ee9d3947 aco/scheduler: Verify register demand invariants in debug mode
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10644>
2021-05-13 15:27:57 +00:00
Tony Wasserka 50ba919d37 aco/scheduler: Fix register demand computation for upwards moves
The initial value needs to be taken from the instruction that is being
moved over, not the one to be moved.

Additionally the parameter of this function was removed because it was
misleading. Setting it to any value other than source_idx would cause
register_demand to be initialized incorrectly. (Instead, the maximum
demand among the covered instructions would need to be determined.)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10644>
2021-05-13 15:27:57 +00:00
Tony Wasserka c528af1076 aco/scheduler: Fix register demand computation for downwards moves
Previously, changes in total_demand_clause were not always propagated to
total_demand. For instance, clause moves do not change the local register
demand at the end of a clause, yet they may still affect the total maximum.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 8235bc6411 ("aco: try to group together VMEM loads of the same resource")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4533
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10644>
2021-05-13 15:27:57 +00:00
Daniel Schürmann c7d679f0f7 aco: relax validation rules for p_reduce dst RegType
By exposing a subgroupSize of 64, reductions with
cluster_size 32 in wave32 might be considered divergent,
and thus, result in a VGPR.

Fixes: dEQP-VK.subgroups.clustered.graphics.subgroupclustered* with wave32

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10769>
2021-05-13 15:10:24 +00:00
Tapani Pälli 343d90b6ab isl: require hiz for depth surface in isl_surf_get_ccs_surf
Fixes: 752eefdb ("intel/isl: Refactor isl_surf_get_ccs_surf")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10768>
2021-05-13 17:18:54 +03:00
Jose Fonseca 6bb7d3bbc0 wgl: Remove opengl32.mingw.def.
MinGW DEF parsing is even more broken than before, and 32-bits import
libs are broken regardless one uses opengl32.mingw.def or opengl32.def.

This change removes opengl32.mingw.def and addresses the issue differently:

- link opengl32.dll with --enable-stdcall-fixup

- use the systems opengl32 import lib (libopengl32.a/opengl32.lib)
  instead of our own

This change also gets test_wgl built with MinGW (even if it's never tested),
which I used to verify this; and to not link against internal libraries.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>

v2: Revert back to shared_library.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10767>
2021-05-13 13:18:16 +00:00
Mike Blumenkrantz 4791738d1d zink: always do maybe_flush after draw/compute
this is a bit more sensible since a forced flush is going to require
refs and layouts be reapplied

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10760>
2021-05-13 10:31:59 +00:00
Mike Blumenkrantz 9fc2b47870 zink: check for a work_count-based stall in zink_maybe_flush_or_stall()
put all the maybes in one place

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10760>
2021-05-13 10:31:59 +00:00
Mike Blumenkrantz afb837523d zink: flush every 100k draws/computes
this ensures more consistent throughput in e.g., drawoverhead

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10760>
2021-05-13 10:31:59 +00:00
Timothy Arceri 5aabc91273 glsl: add missing support for explicit components in interface blocks
From the ARB_enhanced_layouts spec:

   "As with input layout qualifiers, all shaders except compute shaders
   allow *location* layout qualifiers on output variable declarations,
   output block declarations, and output block member declarations.  Of
   these, variables and block members (but not blocks) additionally
   allow the *component* layout qualifier."

We previously had compile tests in piglit to make sure this was not a
compile error but no execution tests.

Fixes: d99a040bbf ("i965: enable ARB_enhanced_layouts for gen8+")

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10763>
2021-05-13 08:07:53 +00:00
Timothy Arceri 1a71d6aa6e glsl: create validate_component_layout_for_type() helper
This will be used in the following patch.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10763>
2021-05-13 08:07:53 +00:00
Ryan Houdek 2908aba828 Update release notes with mention that x87 is no longer used on x86
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9868>
2021-05-13 06:06:42 +00:00
Ryan Houdek a57d937654 Switch u_format_test to passed on i386
Switching from x87 to SSE resolves the rounding behaviour in this test.

It was some of the dxt formats failing and now they are not.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9868>
2021-05-13 06:06:42 +00:00
Ryan Houdek 855ffa7c46 Default enable SSE2 on mesa builds.
With the idea of branching classic device support in to its own tree now would be a good time to also raise the minimum
requirements to something that is more "modern" on x86.
SSE2 was introduced in 2000(!) by default let's make it the minimum spec now
All the old hardware that is moving to the maintenance branch will finally be out of the way.

For the 64-bit side of the discussion there isn't much changed.
* GCC already enables -msse and -msse2 by default
* Same with clang
* fpmath=sse might remove some extraneous x87 usage
** Clang implies fpmath=sse ALWAYS

For the 32-bit side of things is where the exciting details change
* GCC by default doesn't enable sse1 or sse2
** Does all `float`, `double`, and `long double` math with x87
** -msse2 enables sse2 and sse1, gcc still uses x87 even with those enabled
** -mfpmath=sse moves away from using x87 and instead uses sse1 and sse2
* Clang already default enables sse1/sse2 which then turns on their implied fpmath=sse

What does this mean for users?
On Linux raises the default minimum processor spec to SSE2 supporting CPUs
* Intel requirements raise from P5 (1993) to Netburst (2000)
* AMD requirements raise from Athlon(1999/2000) to Athlon 64 (2003)
* Via requirements raise from C3(2001) to C7 (2005)

What does it mean for package maintainers?
For x86-64 distributions that have i386/i686 multilib, then nothing changes. You're already on a platform guaranteed to support SSE2.
For i386/i686 distributions they will need to weigh their min spec against this. Not sure how many still support classic processors.

Who is left out in the cold?
* Intel Quark (2013)
** Embedded board, doesn't have a GPU, Technically has 1x PCIe 2.0 lane that someone could plug a GPU in to
* Some older transmeta CPUs, but they had a followup that also had SSE2.
** Anyone hacking on these with a modern GPU? I'm guessing they know how to turn this option off

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9868>
2021-05-13 06:06:42 +00:00
Vinson Lee 57721591de nv50/ir: Add ConstantFolding constructor.
Fix defect reported by Coverity Scan.

Uninitialized scalar field (UNINIT_CTOR)
member_not_init_in_gen_ctor: The compiler-generated constructor for this
class does not initialize foldCount.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10713>
2021-05-13 05:56:13 +00:00
Vinson Lee c892412111 nvc0/ir: Initialize CodeEmitterGK110 member progType in constructor.
Fix defect reported by Coverity Scan.

Uninitialized scalar field (UNINIT_CTOR)
uninit_member: Non-static class member progType is not initialized in
this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10715>
2021-05-12 22:18:30 -07:00
Chia-I Wu 77d959814c venus: get rid of #ifdef's in vn_CreateImage
No real change after compiler optimizations.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10779>
2021-05-12 22:37:05 +00:00
Lionel Landwerlin f46aa1b9d7 intel/fs: use the final destination type for regioning restrictions
This is most likely a rebase mistake :(

Fixes: f3e5cd813a ("intel/fs: Handle regioning restrictions of split FP/DP pipelines.")
Ref: aa53665fda ("intel/fs/copy_prop: check stride constraints with actual final type")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10764>
2021-05-12 21:19:11 +00:00
Ezequiel Garcia e1959f0f59 panfrost: Add GPU IDs for G52 1-Core-2EE (RK3568/RK3566)
Rockchip SoCs RK3566 and RK3568 have a Gondul with
one shader core and two execution engines, with product ID 0x7402.

Quoting the datasheet:

Mali-G52 1-Core-2EE
* Support 1600Mpix/s fill rate when 800MHz clock frequency
* Support 38.4GLOPs when 800MHz clock frequency

To distinguish it from other variants of G52, we agreed
to call this "G52L", L is for Little.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10771>
2021-05-12 20:45:44 +00:00
Alyssa Rosenzweig 01ef56a7e4 pan/mdg: Use smaller LD_UNIFORM instructions
If we only read 8 bytes from a UBO, we need to use LD_UNIFORM.64 as
opposed to LD_UNIFORM.128. In addition to probably being faster, this
fixes a buffer overrun manifesting as MMU faults with source ID
0x500/0x600/0x700, visible in WebGL Aquarium.

This is essentially the same patch as 616394cf31 ("pan/mdg: Use
appropriate sizes for global loads/stores"), only this is for UBOs where
that was for SSBOs.

Before enabling PACKED_UNIFORMS, this bug was not visible since we could
guarantee the UBO size was a multiple of 16. We no longer have that
invariant, and in rare cases the last 8 bytes of the last 16-byte slot
of a mapped uniform buffer would overrun the BO and trigger a fault,
even if the result is unused.

Fixes: 24d7c413fe ("panfrost: Enable packed uniforms.")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10772>
2021-05-12 20:04:21 +00:00
Alyssa Rosenzweig df3edfc729 panfrost: Don't upload empty push uniform table
Instead zero out the pointer in this case.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10772>
2021-05-12 20:04:21 +00:00
Alyssa Rosenzweig 5c069ff512 panfrost: Clean up cases for emit_fbd
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10774>
2021-05-12 19:46:59 +00:00
Alyssa Rosenzweig dbdbbd29c9 panfrost: Remove spurious assignment
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10774>
2021-05-12 19:46:59 +00:00
Alyssa Rosenzweig 55959da24a panfrost: Don't translate compare funcs
Matches Gallium.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10774>
2021-05-12 19:46:59 +00:00
Alyssa Rosenzweig 65a00b5199 panfrost: Hide CAP_INT16 behind is_deqp
The GLSL precision lowering is still buggy (see !10729), no other driver
enables all the CAPs yet. I don't know enough GLSL IR to be the one to
fix this. In the mean time, this is a hotfix to expose the same set of
CAPs that radeonsi does.

By keeping it with is_deqp, we still get CI coverage of int16.

Closes: #4759
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10777>
2021-05-12 19:31:34 +00:00
Rob Clark 6c530ebf40 freedreno/ir3: Don't force RTNE if rounding mode is undefined
Forcing round-to-nearest-even results in loss of opportunities for
conversion folding, causing a regression in gfxbench gl_alu2.

Fixes: de195671bd ("ir3: nir_op_f2f16 should round to even")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10773>
2021-05-12 19:05:27 +00:00
Leo Liu 052335a180 frontends/va: fix multi planes for external memeory type
For the multi planes case, only the first plane is required with the
template buffer formats, and shouldn't fail for other planes.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10751>
2021-05-12 18:55:35 +00:00
Rob Clark 57c8164389 gallium/u_threaded: Add call logging
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10753>
2021-05-12 16:09:51 +00:00
Rob Clark 3b69cbe06c gallium/u_threaded: Add to_call() helper
Add helper for casting the call, which when asserts are enabled will
sanity check the call size to detect corruption.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10753>
2021-05-12 16:09:51 +00:00
Erik Faye-Lund e8640fef90 ci: Uprev piglit to 3351e8952 ("max-texture-size: report merged results")
This pulls in a fix for the max-texture-size test using piglit-runner,
among other things.

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10749>
2021-05-12 15:47:35 +00:00
Marek Olšák 5818380f86 gallium/u_threaded: fix 32-bit breakage due to incorrect pointer arithmetic
Fixes: 1233c90ab4 - gallium/u_threaded: rewrite slot layout to reduce wasted space
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4755
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4758
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10746>
2021-05-12 15:25:46 +00:00