Commit Graph

44292 Commits

Author SHA1 Message Date
Alex Deucher eca3e910ed r600g: VGT_PRIMITIVE_TYPE is special
It's a special reg and does not require a flush like
the other CONFIG regs.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-06-09 16:54:23 -04:00
Alex Deucher 8681ebcf7f r600g: Handle CONFIG regs properly
CONFIG regs (byte offsets 0x8000-0xac00) are single state and the pipeline
must be flushed and hw idle when they are changed.  Border color regs
are in the CONFIG range and this is why a flush is required when changing
them.  CONTEXT regs (byte offset 0x28000+) are multi-state and those do
not require flushes when changing them.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-06-09 16:26:50 -04:00
Eric Anholt 6861a70177 i965/gen6: Add support for gl_PointCoord.
This is just like PointSprite overrides, but it's always on for that
attribute.

Fixes glsl-fs-pointcoord, gtf/point_sprites.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2011-06-09 08:41:54 -07:00
Eric Anholt f304bb8a5d i965/gen6: Fix point sprite texture coordinate overrides.
We were assuming that the input attribute n to the FS was
FRAG_ATTRIB_TEXn, which happened to be true often enough for our
testcases.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2011-06-09 08:41:51 -07:00
Eric Anholt e7280b16d6 i965/gen6: Refactor SF setup a bit to handle overrides in one place.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2011-06-09 08:41:45 -07:00
Marek Olšák da8b4c0798 r300g: fix texturing with non-3D textures and wrap R mode set to sample border
If the wrap R (3rd) mode is set to CLAMP or CLAMP_TO_BORDER and the texture
isn't 3D, r300 always samples the border color regardless of texture
coordinates.

I HATE THIS HARDWARE.

NOTE: This is a candidate for the 7.10 branch.
2011-06-09 04:19:03 +02:00
Marek Olšák 466ce95ddf r300g: don't enable aniso with nearest filtering 2011-06-09 04:19:03 +02:00
Dave Airlie 04554c7d3a r600g: adjust vs/ps gprs on r600/r700 cards when needed.
Ideally we'd have a compiler and register spilling and all that
but this is good enough for now to avoid the gpu hang in piglit,

glsl-vs-vec4-indexing-temp-dst-in-nested-loop-combined

on r600/r700 cards.

based on r600c patch
Andre Maasikas <amaasikas@gmail.com>
r600c: bump sq gpr resources if a shader needs more than default

Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-06-09 11:25:02 +10:00
Marek Olšák d56fe67c62 r600g: remove unused variable 2011-06-09 01:34:24 +02:00
Marek Olšák 578d4539ba r300g: fix draw_vbo splitting on r3xx-r4xx
NOTE: This is a candidate for the 7.10 branch.
2011-06-09 01:25:52 +02:00
Marek Olšák f48412c39f r300g: make translate_primitive table-driven 2011-06-09 01:25:52 +02:00
Roland Scheidegger d302804deb util: fix strict aliasing issues in u_format_r11g11b10f.h 2011-06-09 01:14:51 +02:00
Roland Scheidegger c1090f3019 mesa: get rid of homegrown logbase2 implementation in drivers
Some of the logbase2 functions did just the same as _mesa_logbase2,
though they were taking signed numbers (but it shouldn't matter for them).
2011-06-09 01:14:51 +02:00
Roland Scheidegger da009212fe mesa: fix gcc version check for _mesa_bitcount
The version check was bogus, and only inside a non-gcc block anyway.
2011-06-09 01:14:50 +02:00
Roland Scheidegger b537f54b3a mesa: use __builtin_clz for logbase2 when available
Also rename to _mesa_logbase2 and move to imports.h to keep the ugly
ifdef GNUC stuff outside other files (also to allow reuse).
2011-06-09 01:14:50 +02:00
Roland Scheidegger b3d5822e93 util: add gcc version check for builtins
Looks like only next_power_of_two, logbase2 and bitcount use builtins
requiring gcc 3.4, so maybe everything else compiles with older gcc.
2011-06-09 01:14:50 +02:00
Benjamin Bellec 894db40f12 util: better logbase2/next_power_of_two implementations
Use __builtin_clz when available for logbase/next_power_of_two,
and replace next_power_of_two with faster implementation otherwise.
2011-06-09 01:14:50 +02:00
José Fonseca 9f865646f1 glx/xlib: Handle glXCreateContextAttribsARB in glXGetProcAddress. 2011-06-08 22:53:27 +01:00
Kenneth Graunke 4ef8464068 i965/gen7: Call gen7_create_constant_surface instead of brw_[...].
Fixes 17 piglit tests:
- glsl-vs-arrays-3
- glsl-vs-texturematrix-2
- glsl-vs-uniform-array-2
- arl
- nv-arl
- nv-init-zero-addr
- vp-address-01
- vp-arl-constant-array
- vp-arl-constant-array-huge
- vp-arl-constant-array-huge-offset
- vp-arl-constant-array-huge-offset-neg
- vp-arl-constant-array-huge-relative-offset
- vp-arl-constant-array-huge-varying
- vp-arl-env-array
- vp-arl-local-array
- vp-arl-neg-array
- vp-arl-neg-array-2

Fixes 4 glean tests:
- glsl1-constant array of vec4 with variable indexing, vertex shader
- glsl1-constant array with variable indexing, vertex shader
- glsl1-constant array with variable indexing, vertex shader (2)
- vp1-ARL test

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-06-08 14:51:11 -07:00
Kenneth Graunke acf82657f4 i965/gen7: Enable SIMD16 fragment shader dispatch.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-06-08 14:51:11 -07:00
Kenneth Graunke 2a63807616 i965/gen7: Don't emit 3DSTATE_GS_SVB_INDEX on Ivybridge.
According to vol2a.07, it only applies from Cantiga to Sandybridge.

I found this in my ringbuffers while investigating various GPU hangs.
While it may not have been the cause, it seemed wise to remove it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-06-08 14:51:11 -07:00
Kenneth Graunke 626440add5 i965/gen7: Program stencil buffers on Ivybridge.
Thanks to Chad's hard work implementing separate stencil and HiZ
support, this is entirely straightforward.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-06-08 14:51:11 -07:00
Kenneth Graunke 53b53a141e i965/gen7: Add a prepare_depthbuffer function.
We need to call add_validated_bo to do proper aperture space accounting.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-06-08 14:50:38 -07:00
Kenneth Graunke a00ca90815 i965/gen7: gen7_emit_depthbuffer needs the _NEW_DEPTH dirty bit.
For ctx->Depth.Mask.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-06-08 14:31:12 -07:00
Kenneth Graunke bd265201da i965/gen7: Remove stencil renderbuffer from gen7_depth_format.
Since Gen7 doesn't support packed depth/stencil, the stencil buffer
can't possibly be relevant for determining the depth format.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-06-08 14:31:04 -07:00
Brian Paul e37e196151 st/mesa: more helpful debug message in destroy_program_variants_cb() 2011-06-08 15:15:07 -06:00
Brian Paul 2d22186ca8 svga: fix typos, update comments 2011-06-08 15:08:19 -06:00
Jeremy Huddleston 3b23cf43a4 glx: Remove some GLX_USE_APPLEGL guards around glapi
Now that we're using glapi, we don't need some GLX_USE_APPLEGL ifdef-foo

Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
2011-06-08 12:03:10 -07:00
Jeremy Huddleston 1b90d7d36b darwin: Use -fvisibility=hidden to set default symbol visibility
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
2011-06-08 11:47:00 -07:00
Jeremy Huddleston 2835c5112d darwin: mklib: Make the real file match the id
This makes mesa more consistent with glibtool and XCode where the
generated file matches the dylib id rather using an extra symlink

Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
2011-06-08 11:24:26 -07:00
Chad Versace aea2236af6 intel: Request DRI2 buffers for separate stencil and hiz
When it is sensible to do so,
    1) intelCreateBuffer() now attaches separate depth and stencil
       buffers
       to the framebuffer it creates.
    2) intel_update_renderbuffers() requests for the framebuffer
       a separate stencil buffer (DRI2BufferStencil).

The criteria for "sensible" is:
    - The GLX config has nonzero depth and stencil bits.
    - The hardware supports separate stencil.
    - The X driver supports separate stencil, or its support has not yet
      been determined.

If the hardware supports hiz too, then intel_update_renderbuffers()
also requests DRI2BufferHiz.

If after requesting DRI2BufferStencil we determine that X driver did not
actually support separate stencil, we clean up the mistake and never ask
for DRI2BufferStencil again.

CC: Ian Romanick <idr@freedesktop.org>
CC: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-06-08 10:06:40 -07:00
Chad Versace f4efb7ff4f intel: Add assertions to intelCreateBuffer()
Assert that the GLX config has an expected depth/stencil bit combination:
one of d24/s8, d16/s0, d0/s0. These are the only depth/stencil
configurations that we advertise.

Remove the check for software stencil, because given the assertions'
constraints the check always fails.

CC: Ian Romanick <idr@freedesktop.org>
CC: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-06-08 10:06:40 -07:00
Chad Versace 89d34cfd3e intel: Refactor intel_update_renderbuffers()
Extract the code that queries DRI2 to obtain the DRIdrawable's buffers
into intel_query_dri2_buffers_no_separate_stencil().

Extract the code that assigns the DRI buffer's DRM region to the
corresponding renderbuffer into
intel_process_dri2_buffer_no_separate_stencil().

Rationale
---------
The next commit enables intel_update_renderbuffers() to query for separate
stencil and hiz buffers. Without separating the separate-stencil and
no-separate-stencil paths, intel_update_renderbuffers() degenerates into
an impenetrable labyrinth of if-trees.

CC: Ian Romanick <idr@freedesktop.org>
CC: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-06-08 10:06:40 -07:00
Chad Versace 84294fe26c intel: Add function intel_renderbuffer_set_hiz_region()
It's the analog of intel_renderbuffer_set_region(), but for the hiz region
of course.

CC: Ian Romanick <idr@freedesktop.org>
CC: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-06-08 10:06:40 -07:00
Chad Versace beb8b7da20 intel/intel_context.c: Remove unused functions
Remove functions intel_override_hiz() and
intel_override_separate_stencil(). They are now located in intel_screen.c.

CC: Ian Romanick <idr@freedesktop.org>
CC: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-06-08 10:06:40 -07:00
Chad Versace 6b2bf272ee intel: Add flags to intel_screen for hiz and separate stencil
Add the fields below to intel_screen. The expression in parens is the
value to which intelInitScreen2() currently sets the field.
    GLboolean hw_has_separate_stencil      (true iff gen >= 7)
    GLboolean hw_must_use_separate_stencil (true iff gen >= 7)
    GLboolean hw_has_hiz                   (always false)
    enum intel_dri2_has_hiz dri2_has_hiz   (INTEL_DRI2_HAS_HIZ_UNKNOWN)

The analogous fields in intel_context now inherit their values from
intel_screen.

When hiz and separate stencil become completely implemented for a given
chipset, then the respective fields need to be enabled.

CC: Ian Romanick <idr@freedesktop.org>
CC: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-06-08 10:06:40 -07:00
Chad Versace df9f533c67 intel: Define enum intel_dri2_has_hiz
... which indicates if the X driver supports DRI2BufferHiz and
DRI2BufferStencil.

I'm placing this in its own commit due to the large comment block.

CC: Ian Romanick <idr@freedesktop.org>
CC: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-06-08 10:06:40 -07:00
Chad Versace 4501a5d6e8 dri2: Add token for DRI2BufferHiz
CC: Ian Romanick <idr@freedesktop.org>
CC: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-06-08 10:06:40 -07:00
Chad Versace ff99103c0a intel: Define span functions for S8 renderbuffers
Since the stencil buffer is interleaved, the generic Mesa renderbuffer
accessors do not suffice. Custom span functions are necessary.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-06-08 10:06:39 -07:00
Chad Versace 2abc8cae87 i965/brw: Emit state for hiz and separate stencil buffers
When emitting 3DSTATE_DEPTH_BUFFER, also emit 3DSTATE_HIER_DEPTH_BUFFER if
there is a hiz buffer. Ditto for 3DSTATE_STENCIL_BUFFER and a separate
stencil buffer.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-06-08 10:06:39 -07:00
Chia-I Wu 6b492d0976 st/egl: set EGL_ALPHA_MASK_SIZE 2011-06-09 00:23:24 +08:00
Chia-I Wu 4bb748b609 mesa: merge glapidispatch.h into dispatch.h
glapidispatch.h was located in glapi and shared with mesa core.  Because
the way it was shared, mesa core must include it indirectly via
main/dispatch.h.

Now that it is no longer needed by glapi and is located in core mesa,
merging it with main/dispatch.h to avoid wrong uses.
2011-06-08 23:19:01 +08:00
Chia-I Wu 0dc45374f2 mesa: fix function remapping for dlist
glapidispatch.h should not be included directly.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36282
2011-06-08 23:18:57 +08:00
Chia-I Wu fed482f5e3 mesa: fix GLES remap table setup again
Generate different glapidispatch.h's for GL and GLES.  For GLES, we want
a local remap table.

This reverts commit 5af46e8360.  The
commit will break GL remap table setup when main/glapidispatch.h is
regenerated.
2011-06-08 23:17:57 +08:00
Alex Deucher fe3a343441 r600g: fix mixup in GPR resource reg setup
GLOBAL_GPR regs should be 0.  Need to set the
number of temp regs in SQ_GPR_RESOURCE_MGMT_1.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-06-08 10:50:18 -04:00
Brian Paul 7c2847a972 vbo: run 'indent' on vbo_save_api.c 2011-06-08 08:05:41 -06:00
Brian Paul 9404835ccd mesa: add include/c99/*.h files to tarballs
See https://bugs.freedesktop.org/show_bug.cgi?id=36238

NOTE: This is a candidate for the 7.10 branch.
2011-06-08 08:05:41 -06:00
Brian Paul f1733d16de vbo: rename DO_FALLBACK -> dlist_fallback 2011-06-08 08:05:41 -06:00
Brian Paul 62811057f4 vbo: remove node->count > 0 test in vbo_save_playback_vertex_list()
See piglit dlist-fdo31590.c test and
http://bugs.freedesktop.org/show_bug.cgi?id=31590

In this case we had node->prim_count=1 but node->count==0 because the
display list started with glBegin() but had no vertices.  The call to
glEvalCoord1f() triggered the DO_FALLBACK() path.  When replaying the
display list, the old condition basically no-op'd the call to
vbo_save_playback_vertex_list call().  That led to the invalid operation
error being raised in glEnd().

NOTE: This is a candidate for the 7.10 branch.
2011-06-08 08:05:41 -06:00
Brian Paul f1cdce95f6 vbo: check array indexes to prevent negative indexing
See the piglit dlist-fdo31590.c test

NOTE: This is a candidate for the 7.10 branch.
2011-06-08 08:05:41 -06:00